Commit graph

6 commits

Author SHA1 Message Date
Boris Brezillon e55668914d ARM: at91/dt: define the HLCDC node available on sama5d3 SoCs
Define the HLCDC (HLCD Controller) IP available on some sama5d3 SoCs
(i.e. sama5d31, sama5d33, sama5d34 and sama5d36) in sama5d3 dtsi file.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Tested-by: Anthony Harivel <anthony.harivel@emtrion.de>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2015-03-23 15:37:35 +01:00
Boris Brezillon ee839fdd9f ARM: at91/dt: add alternative pin muxing for sama5d3 lcd pins
Define alternative pin muxing for the LCDC pins.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Tested-by: Anthony Harivel <anthony.harivel@emtrion.de>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2015-03-23 15:37:34 +01:00
Boris Brezillon 42be876539 ARM: at91/dt: split sama5d3 lcd pin definitions to match RGB mode configs
The HLCDC (HLCD Controller) IP supports 4 different output mode (RGB444,
RGB565, RGB666 and RGB888) and the pin muxing will depend on the chosen
RGB mode.

Split pin definitions to be able to set pin config according to the
selected mode.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Tested-by: Anthony Harivel <anthony.harivel@emtrion.de>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2015-03-23 15:37:34 +01:00
Nicolas Ferre 8dafaa1f28 ARM: at91/dt/trivial: correct file headers for SAMA5D3 SoC peripherals
File name had at91 prefix, which is not the case anymore for SAMA5D3.
AT91SAM9x5 was mentioned instead of SAMA5D3 SoC.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2015-03-04 18:36:10 +01:00
Boris BREZILLON d2e8190b79 ARM: at91/dt: define sama5d3 clocks
Define sama5d3 clocks in sama5d3 device tree.
Add references to the appropriate clocks in each peripheral.

Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-12-02 15:31:28 +01:00
Boris BREZILLON d7d1d45cc4 ARM: at91/dt: split sama5d3 peripheral definitions
This patch splits the sama5d3 SoCs definition:
- a common base for all sama5d3 SoCs (sama5d3.dtsi)
- several optional peripheral definitions which will be included by sama5d3
  specific SoCs (sama5d3_'periph name'.dtsi)
- sama5d3 specific SoC definitions (sama5d3x.dtsi)

This provides a better representation of the real hardware (drop unneed
dt nodes) and avoids peripheral id conflict (which is not the case for
current sama5d3 SoCs, but could be if other SoCs of this family are
released).

Signed-off-by: Boris BREZILLON <b.brezillon@overkiz.com>
[nicolas.ferre@atmel.com: add more "sama5d3?" compatibility strings]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2013-10-16 15:47:08 +02:00