The #address-cells and #size-cells are only relevant for nodes that have
childs with reg properties. Otherwise, DTC will emit a warning saying that
those properties are unnecessary.
Remove them when needed.
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
The I2C and MMC controllers have only one muxing option in the SoC. In such a
case, we can just move the muxing into the DTSI, and remove it from
the DTS.
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Some GPIO pinctrl nodes cannot be easily removed, because they would also
change the pin configuration, for example to add a pull resistor or change
the current delivered by the pin.
Those nodes still have underscores and unit-addresses in their node names
in our DTs, so adjust their name to remove the warnings. Use that occasion
to also fix some poorly chosen node-names.
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
All our pinctrl nodes were using a node name convention with a unit-address
to differentiate the different muxing options. However, since those nodes
didn't have a reg property, they were generating warnings in DTC.
In order to accomodate for this, convert the old nodes to the syntax we've
been using for the new SoCs, including removing the letter suffix of the
node labels to the bank of those pins to make things more readable.
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Boards usually have an external pull-up on the card-detect signal, so
there's no need to add another one.
This also removes a DTC warning.
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
The gpio pinctrl nodes are redundant and as such useless most of the times.
Since they will also generate warnings in DTC, we can simply remove most of
them.
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Using the cd-inverted property is not useful when GPIOs are used as card
detects since the polarity can be specified with the usual
GPIO_ACTIVE_(HIGH|LOW) GPIO flags. It has also caused confusion for
U-Boot developers, so migrate all sunxi boards away from cd-inverted.
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
All the A20 devices I own have standard HDMI connectors wired
to the dedicated HDMI pins on the SoC:
- Bananapi M1+
- Cubieboard 2
- Cubietruck
- Lamobo R1 (or Bananapi R1)
Development boards from Olimex also have standard HDMI connectors.
Schematics for them are publicly available. Enable HDMI on them as
well.
- Olimex A20-OLinuXino-LIME
- Olimex A20-OLinuXino-LIME2
- Olimex A20-OLinuXino-MICRO
Enable the display pipeline and HDMI output for them.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Tested-by: Priit Laes <plaes@plaes.org> # Cubietruck, A20-OLinuXino-MICRO
Tested-by: Olliver Schinagl <oliver@schinagl.nl> # A20-OLinuXino-LIME2
Tested-by: Jonathan Liu <net147@gmail.com> # A20-OLinuXino-LIME
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The Lamobo R1 board connected the ACIN of the AXP209 PMIC to a MicroUSB
port, and the battery input is connected to a generic connector.
Enable these two power supplies in the device tree.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
As part of our effort to move pinctrl/GPIO interlocking into the
driver where it belongs, this patch drops the definition and usage
of the pinmux settings for the common regulators defined in
sunxi-common-regulators.dtsi.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Device-tree continues to see lots of updates. The majority of patches
here are smaller changes for new hardware on existing platforms, and
there are a few larger changes worth pointing out.
Major new platforms:
- Gemini has been ported to DT, so a handful of "new" platforms moved over
from board files
- Rockchip RK3288 support for Tinkerboard and Phytec phyCORE-RK3288 SoM and RDK
- A bunch of embedded platforms, several Linksys platforms, Synology DS116,
- Motorola Droid4 (really old OMAP-based phone) support is added.
Some refactorings, i.e. Allwinner H3/H5 support is commonalized.
And lots of smaller changes, cleanups, etc. See shortlog for more description
We're adding ability to cross-include DT files between arm and arm64,
by creating appropriate links in the dt-include directory, and using arm/
and arm64/ as include prefixes. This will avoid other local hacks such as
per-file links between the two arch trees (this broke for external mirroring
of DT contents). Now they can just provide their own appropriate dt-include
hierarcy per platform.
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Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM Device-tree updates from Olof Johansson:
"Device-tree continues to see lots of updates. The majority of patches
here are smaller changes for new hardware on existing platforms, and
there are a few larger changes worth pointing out.
Major new platforms:
- Gemini has been ported to DT, so a handful of "new" platforms moved
over from board files
- Rockchip RK3288 support for Tinkerboard and Phytec phyCORE-RK3288
SoM and RDK
- A bunch of embedded platforms, several Linksys platforms, Synology
DS116,
- Motorola Droid4 (really old OMAP-based phone) support is added.
Some refactorings, i.e. Allwinner H3/H5 support is commonalized.
And lots of smaller changes, cleanups, etc. See shortlog for more
description
We're adding ability to cross-include DT files between arm and arm64,
by creating appropriate links in the dt-include directory, and using
arm/ and arm64/ as include prefixes. This will avoid other local hacks
such as per-file links between the two arch trees (this broke for
external mirroring of DT contents). Now they can just provide their
own appropriate dt-include hierarcy per platform"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (349 commits)
ARM: dts: exynos: Use - instead of @ for DT OPP entries
arm: spear6xx: add DT description of the ADC on SPEAr600
arm: spear6xx: remove unneeded pinctrl properties in spear600-evb
arm: spear6xx: switch spear600-evb to the new flash partition DT binding
arm: spear6xx: fix spaces in spear600-evb.dts
arm: spear6xx: use node labels in spear600-evb.dts
arm: spear6xx: add labels to various nodes in spear600.dtsi
ARM: dts: vexpress: fix few unit address format warnings
ARM: dts: at91: sama5d3_xplained: not all ADC channels are available
ARM: dts: at91: sama5d3_xplained: fix ADC vref
ARM: dts: at91: add envelope detector mux to the Axentia TSE-850
ARM: dts: armada-38x: label USB and SATA nodes
ARM: dts: imx6q-utilite-pro: add hpd gpio
ARM: dts: imx6qp-sabresd: Set reg_arm regulator supply
ARM: dts: imx6qdl-sabresd: Set LDO regulator supply
ARM: dts: imx: add Gateworks Ventana GW5903 support
ARM: dts: i.MX25: add AIPS control registers
ARM: dts: imx7-colibri: add Carrier Board 3.3V/5V regulators
ARM: dts: imx7-colibri: remove 1.8V fixed regulator
ARM: dts: imx7-colibri: allow to disable Ethernet rail
...
All dts files for the sunxi platform have been switched to the generic
pinconf bindings. As a result, the sunxi specific pinctrl macros are
no longer used.
Remove the #include entry with the following command:
sed --follow-symlinks -i -e '/pinctrl\/sun4i-a10.h/D' \
arch/arm/boot/dts/sun?i*.*
arch/arm/boot/dts/sun9i-a80.dtsi was then edited to remove the extra
empty line.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The CPU port of the BCM53125 is configured with RGMII (no delays) but
this should actually be RGMII with transmit delay (rgmii-txid) because
STMMAC takes care of inserting the transmitter delay. This fixes
occasional packet loss encountered.
Fixes: d7b9eaff5f ("ARM: dts: sun7i: Add BCM53125 switch nodes to the lamobo-r1 board")
Reported-by: Hartmut Knaack <knaack.h@gmx.de>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Now that we can handle the generic pinctrl bindings, convert our DT to it.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
The allwinner,pull property set to NO_PULL was really considered our
default (and wasn't even changing the default value in the code).
Remove these properties to make it obvious that we do not set anything in
such a case.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
The allwinner,drive property set to 10mA was really considered as our
default. Remove all those properties entirely to make that obvious.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Lamobo R1 has a headphone jack for audio output, and an onboard
microphone. These are tied to the SoC's internal audio codec.
Enable the audio codec.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
reg_ahci_5v uses a GPIO in active high mode. Use the proper macro,
instead of just 0 for the GPIO flags.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
USB1 VBUS is directly tied to the 5V rail on the board. It is not
individually controllable. Drop the regulator.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
On the Lamobo R1, USB2 is connected to the RTL8192CU WiFi module.
The power enable pin is connected to PH12.
Fix the enable pin the reg_usb2_vbus.
Also disable ohci1, as the WiFi module is USB 2.0 capable.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Now that we have a proper binding for Ethernet switches hanging off
different buses, and a driver for the BCM53125 switch, add its Device
Tree as a child MDIO node, at MDIO address 30 (Broadcom pseudo-PHY
address) and describe the ports layout of the Lamobo R1 board.
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
The lamobo-r1 board, sometimes called the BPI-R1 but not labelled as such
on the PCB, is meant as a A20 based router board. As such the board comes
with a built-in switch chip giving it 5 gigabit ethernet ports, and it
has a large empty area on the pcb with mounting holes which will fit a
2.5 inch harddisk. To complete its networking features it has a
Realtek RTL8192CU for WiFi 802.11 b/g/n.
Signed-off-by: Jelle de Jong <jelledejong@powercraft.nl>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
