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4 commits

Author SHA1 Message Date
Florian Fainelli a62ea5a75f net: phy: bcm7xxx: properly clear AFE_RX_LP_COUNTER
The AFE_RX_LP_COUNTER kept the last 3 bits set, which would not properly
clear the EEE LPI mode errors bits. Make sure that those bits are set to
0 to ensure the PHY timing is always good even during EEE wake-up.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2014-03-26 16:19:24 -04:00
Florian Fainelli 9918542e2d net: phy: bcm7xxx: fix spurious MDIO failures during workaround
Writing first to the AFE registers, and then the VCO, RCAL, RC_CAL
registers turned out to unveil some spurious MDIO read/write failures
which would make the workaround partially applied. The fix is to write
first to the VCO, RCAL, RC_CAL registers, and then write to the AFE
registers.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2014-03-26 16:19:24 -04:00
Florian Fainelli a3622f2c82 net: phy: bcm7xxx: define constants for our registers
Define constants for the various registers used in
bcm7xxx_28nm_afe_config_init() to help clarify what this workaround is
about.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2014-03-26 16:19:23 -04:00
Florian Fainelli b560a58c45 net: phy: add Broadcom BCM7xxx internal PHY driver
This patch adds support for the Broadcom BCM7xxx Set Top Box SoCs
internal PHYs. This driver supports the following generation of SoCs:

- BCM7366, BCM7439, BCM7445 (28nm process)
- all 40nm and 65nm (older MIPS-based SoCs)

The PHYs on these SoCs require a bunch of workarounds to operate
correctly, both during configuration time and at suspend/resume time,
the driver handles that for us.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2014-02-14 00:27:58 -05:00