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11 Commits (dc2535be1fd547fbd56aff091370280007b0a1af)

Author SHA1 Message Date
Stephen Boyd efb1e0b071 Merge branches 'clk-ingenic', 'clk-mtk-mux', 'clk-qcom-sdm845-pcie', 'clk-mtk-crit' and 'clk-mtk' into clk-next
* clk-ingenic:
  clk: ingenic: Remove set but not used variable 'enable'
  clk: ingenic: Fix doc of ingenic_cgu_div_info
  clk: ingenic: Fix round_rate misbehaving with non-integer dividers
  clk: ingenic: jz4740: Fix gating of UDC clock

* clk-mtk-mux:
  clk: mediatek: using CLK_MUX_ROUND_CLOSEST for the clock of dpi1_sel
  clk: mediatek: add MUX_GATE_FLAGS_2

* clk-qcom-sdm845-pcie:
  clk: qcom: gcc-sdm845: Define parent of PCIe PIPE clocks

* clk-mtk-crit:
  clk: mediatek: Mark bus and DRAM related clocks as critical
  clk: mediatek: Add flags to mtk_gate
  clk: mediatek: Add MUX_FLAGS macro

* clk-mtk:
  clk: mediatek: correct cpu clock name for MT8173 SoC
2019-03-08 10:29:30 -08:00
Jasper Mattsson 5a1cc4c27a clk: mediatek: Add flags to mtk_gate
This is required to mark gates as CLK_IS_CRITICAL.

Signed-off-by: Jasper Mattsson <jasu@njomotys.info>
Acked-by: Mars Cheng <mars.cheng@mediatek.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-02-26 09:53:39 -08:00
chunhui dai b026a7eca1 clk: mediatek: add MUX_GATE_FLAGS_2
Add MUX_GATE_FLAGS_2 for the clock which needs to set two falgs.
Such as some mux need to set the flags of "CLK_MUX_ROUND_CLOSEST".

Signed-off-by: chunhui dai <chunhui.dai@mediatek.com>
Signed-off-by: wangyan wang <wangyan.wang@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-02-25 09:19:32 -08:00
Rob Herring 1667393126 clk: Convert to using %pOF instead of full_name
Now that we have a custom printf format specifier, convert users of
full_name to use %pOF instead. This is preparation to remove storing
of the full path string for each node.

Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@codeaurora.org>
Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com>
Cc: Alexandre Torgue <alexandre.torgue@st.com>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Matthias Brugger <matthias.bgg@gmail.com>
Cc: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Chen-Yu Tsai <wens@csie.org>
Cc: "Emilio López" <emilio@elopez.com.ar>
Cc: Peter De Schrijver <pdeschrijver@nvidia.com>
Cc: Prashant Gaikwad <pgaikwad@nvidia.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Jonathan Hunter <jonathanh@nvidia.com>
Cc: Tero Kristo <t-kristo@ti.com>
Cc: linux-clk@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-mediatek@lists.infradead.org
Cc: linux-renesas-soc@vger.kernel.org
Cc: linux-tegra@vger.kernel.org
Cc: linux-omap@vger.kernel.org
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: James Liao <jamesjj.liao@mediatek.com>
Acked-by: Alexandre TORGUE <alexandre.torgue@st.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-07-21 15:49:54 -07:00
Shunli Wang e986211827 clk: mediatek: Add MT2701 clock support
Add MT2701 clock support, include topckgen, apmixedsys,
infracfg, pericfg and subsystem clocks.

Signed-off-by: Shunli Wang <shunli.wang@mediatek.com>
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Signed-off-by: Erin Lo <erin.lo@mediatek.com>
Tested-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-11-08 15:59:49 -08:00
James Liao 928f3bfb81 clk: mediatek: remove __init from clk registration functions
Remove __init from functions that will be used by init functions
that support probe deferral.

Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Signed-off-by: Erin Lo <erin.lo@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-08-18 17:15:30 -07:00
Stephen Boyd 3d08f1564b clk: mediatek: Remove CLK_IS_ROOT
This flag is a no-op now. Remove usage of the flag.

Acked-by: James Liao <jamesjj.liao@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-03-02 17:44:06 -08:00
James Liao 4974259e18 clk: mediatek: Fix memory leak on clock init fail
mtk_clk_register_composite() may leak memory due to some error
handling path don't free all allocated memory. This patch
free all pointers that may allocate memory before error return.
And it's safe because kfree() can handle NULL pointers.

Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-01-29 13:02:51 -08:00
James Liao 4fa043806a clk: mediatek: Add fixed clocks support for Mediatek SoC.
This patch adds fixed clocks support by using CCF fixed-rate
clock implementation.

Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
2015-10-01 12:04:49 +08:00
James Liao e02940fc9e clk: mediatek: Add __initdata and __init for data and functions
Add __init for clock registration functions, and add __initdata for
mtk_gate_regs initial structures.

Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
2015-10-01 12:04:49 +08:00
James Liao 9741b1a680 clk: mediatek: Add initial common clock support for Mediatek SoCs.
This patch adds common clock support for Mediatek SoCs, including plls,
muxes and clock gates.

Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Signed-off-by: Henry Chen <henryc.chen@mediatek.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
[sboyd@codeaurora.org: Squelch checkpatch warning in clk-mtk.h]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-05-05 22:50:31 -07:00