Fix the phy address to 7 for Ethernet PHY on SAMA5D27 SOM1. No
connection established if phy address 0 is used.
The board uses the 24 pins version of the KSZ8081RNA part, KSZ8081RNA
pin 16 REFCLK as PHYAD bit [2] has weak internal pull-down. But at
reset, connected to PD09 of the MPU it's connected with an internal
pull-up forming PHYAD[2:0] = 7.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Fixes: 2f61929eb1 ("ARM: dts: at91: at91-sama5d27_som1: fix PHY ID")
Cc: Ludovic Desroches <ludovic.desroches@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Cc: <stable@vger.kernel.org> # 4.14+
There is an EEPROM on at91-sama5d27_som1 connected to i2c0. i2c0 node
has to be moved from at91-sama5d27_som1_ek to at91-sama5d27_som1.
Enable the i2c EEPROM found on at91-sama5d27_som1. Add an alias for the
i2c node.
Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Tested-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Link: https://lore.kernel.org/r/20200403061222.1277147-5-tudor.ambarus@microchip.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Add SoM1 flash mapping, identical with the other SPI NOR flash
mappings found on the other at91 boards.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Tested-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Link: https://lore.kernel.org/r/20200403061222.1277147-2-tudor.ambarus@microchip.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Specify the SoC SDCAL pin connection that is used in the
sama5d27c 128MiB SiP on the SAMA5D27 SOM1.
This will put in place a software workaround that would reduce power
consumption on all boards using this SoM, including the SAMA5D27 SOM1 EK.
Uses property introduced in 5cd41fe897 ("dt-bindings: sdhci-of-at91:
add the microchip,sdcal-inverted property")
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20191205113604.9000-1-nicolas.ferre@microchip.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
External E-Mail
The X11 license text [1] is explicitly for the X Consortium and has a
couple of extra clauses. The MIT license text [2] is actually what the
current DT files claim.
[1] https://spdx.org/licenses/X11.html
[2] https://spdx.org/licenses/MIT.html
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
The PHY ID is incorrect. It leads to troubles when resuming from standby
or mem power states.
Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Fixes: af690fa37e ("ARM: dts: at91: at91-sama5d27_som1: add sama5d27 SoM1 support")
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Claudiu Beznea