Commit graph

7 commits

Author SHA1 Message Date
Gabriel FERNANDEZ de6e0f84be phy: miphy28lp: Pass sysconfig register offsets via syscfg dt property.
Based on Arnds review comments here https://lkml.org/lkml/2014/11/13/161,
update the miphy28lp phy driver to access sysconfig register offsets via
syscfg dt property.

This is because the reg property should not be mixing address spaces like
it does currently for miphy28lp. This change then also aligns us to how other
platforms such as keystone and bcm7445 pass there syscon offsets via DT.

I have updated the miphy28lp phy driver same way as Peter's implementation.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2015-01-21 15:23:06 +05:30
Dan Carpenter 4e038e8919 phy: miphy28lp: unlock on error in miphy28lp_init()
We need to unlock before returning the -EINVAL here.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Acked-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2014-12-23 15:44:31 +05:30
Heikki Krogerus dbc98635e0 phy: remove the old lookup method
The users of the old method are now converted to the new one.

Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
[ kishon@ti.com : made phy-berlin-usb.c and phy-miphy28lp.c to use the updated
		  devm_phy_create API.]
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2014-11-22 13:58:39 +05:30
Gabriel FERNANDEZ 28ba384dc5 phy: miphy28lp: Tune tx impedance across Soc cuts
This patch to compensate tx impedance (Sata, PCIe)
depending on Soc cuts the kernel is built for.

Signed-off-by: Giuseppe Condorelli <giuseppe.condorelli@st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2014-11-12 18:40:13 +05:30
Gabriel FERNANDEZ a2108dee3c phy: miphy28lp: Add SSC support for PCIE
SSC is the technique of modulating the operating frequency of a signal
slightly to spread its radiated emissions over a range of frequencies.
This reduction in the maximum emission for a given frequency helps meet
radiated emission requirements.
These settings are applicable for PCIE with Internal clock.

Signed-off-by: Harsh Gupta <harsh.gupta@st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2014-11-12 18:40:12 +05:30
Gabriel FERNANDEZ 2b041b27a8 phy: miphy28lp: Add SSC support for SATA
This patch to tune on/off the ssc on miphy sata setup.
User can now enable ssc via dt blob, it is useful to reduce
effects of EMI.

Signed-off-by: Giuseppe Condorelli <giuseppe.condorelli@st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2014-11-12 18:40:12 +05:30
Gabriel FERNANDEZ 2c14e9be0c phy: miphy28lp: Provide support for the MiPHY28lp Generic PHY
The MiPHY28lp is a Generic PHY which can serve various SATA or PCIe
or USB3 devices.

Signed-off-by: alexandre torgue <alexandre.torgue@st.com>
Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2014-11-12 18:40:12 +05:30