..
vdso
riscv: delete temporary files
2020-01-18 13:22:13 -08:00
.gitignore
RISC-V: Build Infrastructure
2017-09-26 15:26:49 -07:00
Makefile
riscv: add nommu support
2019-11-17 15:17:39 -08:00
asm-offsets.c
riscv: abstract out CSR names for supervisor vs machine mode
2019-11-05 09:20:42 -08:00
cacheinfo.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286
2019-06-05 17:36:37 +02:00
clint.c
riscv: provide native clint access for M-mode
2019-11-17 15:17:39 -08:00
cpu.c
RISC-V: Remove unsupported isa string info print
2019-10-28 11:13:59 -07:00
cpufeature.c
riscv: add missing header file includes
2019-10-28 00:46:01 -07:00
entry.S
riscv: reject invalid syscalls below -1
2019-12-27 21:50:57 -08:00
fpu.S
riscv: abstract out CSR names for supervisor vs machine mode
2019-11-05 09:20:42 -08:00
ftrace.c
riscv: ftrace: correct the condition logic in function graph tracer
2020-01-03 00:56:37 -08:00
head.S
riscv: make sure the cores stay looping in .Lsecondary_park
2020-01-15 18:07:54 -08:00
head.h
riscv: add prototypes for assembly language functions from head.S
2019-10-28 00:46:00 -07:00
irq.c
riscv: prefix IRQ_ macro names with an RV_ namespace
2020-01-04 21:48:59 -08:00
mcount-dyn.S
riscv/ftrace: Add DYNAMIC_FTRACE_WITH_REGS support
2018-04-02 19:59:13 -07:00
mcount.S
RISC-V: remove the unused return_to_handler export
2018-10-22 17:38:12 -07:00
module-sections.c
riscv: add missing header file includes
2019-10-28 00:46:01 -07:00
module.c
riscv: Use pr_warn instead of pr_warning
2019-10-18 10:48:36 +02:00
module.lds
RISC-V: Add section of GOT.PLT for kernel module
2018-04-02 20:00:54 -07:00
perf_callchain.c
riscv: abstract out CSR names for supervisor vs machine mode
2019-11-05 09:20:42 -08:00
perf_event.c
RISC-V: Access CSRs using CSR numbers
2019-05-16 20:42:11 -07:00
perf_regs.c
riscv: Add support for perf registers sampling
2019-09-05 00:48:58 -07:00
process.c
riscv: Implement copy_thread_tls
2020-01-07 13:31:23 +01:00
ptrace.c
seccomp updates for v5.5
2019-11-30 17:23:16 -08:00
reset.c
riscv: cleanup the default power off implementation
2019-11-13 13:22:52 -08:00
riscv_ksyms.c
riscv: fix compile failure with EXPORT_SYMBOL() & !MMU
2019-12-27 21:44:36 -08:00
sbi.c
riscv: cleanup the default power off implementation
2019-11-13 13:22:52 -08:00
setup.c
riscv: provide native clint access for M-mode
2019-11-17 15:17:39 -08:00
signal.c
riscv: add nommu support
2019-11-17 15:17:39 -08:00
smp.c
riscv: provide native clint access for M-mode
2019-11-17 15:17:39 -08:00
smpboot.c
riscv: provide native clint access for M-mode
2019-11-17 15:17:39 -08:00
stacktrace.c
riscv: Add perf callchain support
2019-09-04 12:43:00 -07:00
sys_riscv.c
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286
2019-06-05 17:36:37 +02:00
syscall_table.c
riscv: add missing header file includes
2019-10-28 00:46:01 -07:00
time.c
riscv: add missing header file includes
2019-10-28 00:46:01 -07:00
traps.c
riscv: abstract out CSR names for supervisor vs machine mode
2019-11-05 09:20:42 -08:00
vdso.c
riscv: add missing header file includes
2019-10-28 00:46:01 -07:00
vmlinux.lds.S
vmlinux.lds.h: Replace RW_DATA_SECTION with RW_DATA
2019-11-04 15:57:41 +01:00
95f4d9cced