Greentime Hu daf646fd32 riscv: Add sfence.vma after early page table changes ... [ Upstream commit 21190b74bc ] This invalidates local TLB after modifying the page tables during early init as it's too early to handle suprious faults as we otherwise do. Fixes: f2c17aabc9 ("RISC-V: Implement compile-time fixed mappings") Reported-by: Syven Wang <syven.wang@sifive.com> Signed-off-by: Syven Wang <syven.wang@sifive.com> Signed-off-by: Greentime Hu <greentime.hu@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org> [Palmer: Cleaned up the commit text] Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com> Signed-off-by: Sasha Levin <sashal@kernel.org>		2020-09-23 12:40:43 +02:00
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Makefile	riscv: move the TLB flush logic out of line	2019-09-05 01:54:51 -07:00
cacheflush.c	riscv: export flush_icache_all to modules	2020-01-17 19:49:04 +01:00
context.c	riscv: add missing header file includes	2019-10-28 00:46:01 -07:00
extable.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 120	2019-05-24 17:39:02 +02:00
fault.c	riscv: add prototypes for assembly language functions from head.S	2019-10-28 00:46:00 -07:00
hugetlbpage.c	riscv: Introduce huge page support for 32/64bit kernel	2019-07-03 15:23:38 -07:00
init.c	riscv: Add sfence.vma after early page table changes	2020-09-23 12:40:43 +02:00
ioremap.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286	2019-06-05 17:36:37 +02:00
sifive_l2_cache.c	riscv: mark some code and data as file-static	2019-10-28 00:46:01 -07:00
tlbflush.c	riscv: move the TLB flush logic out of line	2019-09-05 01:54:51 -07:00