237 lines
7.1 KiB
C
237 lines
7.1 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2019~2020 NXP
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*/
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#include <linux/clk-provider.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <linux/pm_domain.h>
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#include <linux/pm_runtime.h>
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#include "clk.h"
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#include "clk-scu.h"
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#include "clk-imx-acm-utils.h"
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#include <dt-bindings/clock/imx8-clock.h>
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struct imx8dxl_acm_priv {
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struct clk_imx_acm_pm_domains dev_pm;
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void __iomem *reg;
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u32 regs[0x20];
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};
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static const char *aud_clk_sels[] = {
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"aud_rec_clk0_lpcg_clk",
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"aud_rec_clk1_lpcg_clk",
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"ext_aud_mclk0",
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"ext_aud_mclk1",
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"dummy",
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"dummy",
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"dummy",
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"dummy",
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"spdif0_rx",
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"sai0_rx_bclk",
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"sai0_tx_bclk",
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"sai1_rx_bclk",
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"sai1_tx_bclk",
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"sai2_rx_bclk",
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"sai3_rx_bclk",
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};
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static const char *mclk_out_sels[] = {
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"aud_rec_clk0_lpcg_clk",
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"aud_rec_clk1_lpcg_clk",
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"dummy",
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"dummy",
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"spdif0_rx",
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"dummy",
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"dummy",
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"dummy",
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};
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static const char *sai_mclk_sels[] = {
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"aud_pll_div_clk0_lpcg_clk",
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"aud_pll_div_clk1_lpcg_clk",
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"acm_aud_clk0_sel",
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"acm_aud_clk1_sel",
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};
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static const char *spdif_mclk_sels[] = {
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"aud_pll_div_clk0_lpcg_clk",
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"aud_pll_div_clk1_lpcg_clk",
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"acm_aud_clk0_sel",
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"acm_aud_clk1_sel",
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};
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static const char *mqs_mclk_sels[] = {
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"aud_pll_div_clk0_lpcg_clk",
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"aud_pll_div_clk1_lpcg_clk",
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"acm_aud_clk0_sel",
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"acm_aud_clk1_sel",
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};
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static int imx8dxl_acm_clk_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct device_node *np = dev->of_node;
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struct clk_onecell_data *clk_data;
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struct imx8dxl_acm_priv *priv;
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struct resource *res;
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struct clk **clks;
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void __iomem *base;
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int ret;
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int i;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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base = devm_ioremap(dev, res->start, resource_size(res));
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if (!base)
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return -ENOMEM;
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priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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priv->reg = base;
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platform_set_drvdata(pdev, priv);
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clk_data = devm_kzalloc(&pdev->dev, sizeof(*clk_data), GFP_KERNEL);
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if (!clk_data)
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return -ENOMEM;
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clk_data->clks = devm_kcalloc(&pdev->dev, IMX_ADMA_ACM_CLK_END,
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sizeof(*clk_data->clks), GFP_KERNEL);
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if (!clk_data->clks)
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return -ENOMEM;
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clk_data->clk_num = IMX_ADMA_ACM_CLK_END;
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clks = clk_data->clks;
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ret = clk_imx_acm_attach_pm_domains(&pdev->dev, &priv->dev_pm);
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if (ret)
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return ret;
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pm_runtime_enable(&pdev->dev);
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pm_runtime_get_sync(&pdev->dev);
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clks[IMX_ADMA_EXT_AUD_MCLK0] = imx_clk_fixed("ext_aud_mclk0", 0);
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clks[IMX_ADMA_EXT_AUD_MCLK1] = imx_clk_fixed("ext_aud_mclk1", 0);
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clks[IMX_ADMA_SPDIF0_RX] = imx_clk_fixed("spdif0_rx", 0);
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clks[IMX_ADMA_SAI0_RX_BCLK] = imx_clk_fixed("sai0_rx_bclk", 0);
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clks[IMX_ADMA_SAI0_TX_BCLK] = imx_clk_fixed("sai0_tx_bclk", 0);
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clks[IMX_ADMA_SAI1_RX_BCLK] = imx_clk_fixed("sai1_rx_bclk", 0);
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clks[IMX_ADMA_SAI1_TX_BCLK] = imx_clk_fixed("sai1_tx_bclk", 0);
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clks[IMX_ADMA_SAI2_RX_BCLK] = imx_clk_fixed("sai2_rx_bclk", 0);
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clks[IMX_ADMA_SAI3_RX_BCLK] = imx_clk_fixed("sai3_rx_bclk", 0);
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clks[IMX_ADMA_ACM_AUD_CLK0_SEL] = imx_dev_clk_mux(dev, "acm_aud_clk0_sel", base+0x000000, 0, 5, aud_clk_sels, ARRAY_SIZE(aud_clk_sels));
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clks[IMX_ADMA_ACM_AUD_CLK1_SEL] = imx_dev_clk_mux(dev, "acm_aud_clk1_sel", base+0x010000, 0, 5, aud_clk_sels, ARRAY_SIZE(aud_clk_sels));
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clks[IMX_ADMA_ACM_MCLKOUT0_SEL] = imx_dev_clk_mux(dev, "acm_mclkout0_sel", base+0x020000, 0, 3, mclk_out_sels, ARRAY_SIZE(mclk_out_sels));
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clks[IMX_ADMA_ACM_MCLKOUT1_SEL] = imx_dev_clk_mux(dev, "acm_mclkout1_sel", base+0x030000, 0, 3, mclk_out_sels, ARRAY_SIZE(mclk_out_sels));
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clks[IMX_ADMA_ACM_SAI0_MCLK_SEL] = imx_dev_clk_mux(dev, "acm_sai0_mclk_sel", base+0x0E0000, 0, 2, sai_mclk_sels, ARRAY_SIZE(sai_mclk_sels));
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clks[IMX_ADMA_ACM_SAI1_MCLK_SEL] = imx_dev_clk_mux(dev, "acm_sai1_mclk_sel", base+0x0F0000, 0, 2, sai_mclk_sels, ARRAY_SIZE(sai_mclk_sels));
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clks[IMX_ADMA_ACM_SAI2_MCLK_SEL] = imx_dev_clk_mux(dev, "acm_sai2_mclk_sel", base+0x100000, 0, 2, sai_mclk_sels, ARRAY_SIZE(sai_mclk_sels));
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clks[IMX_ADMA_ACM_SAI3_MCLK_SEL] = imx_dev_clk_mux(dev, "acm_sai3_mclk_sel", base+0x110000, 0, 2, sai_mclk_sels, ARRAY_SIZE(sai_mclk_sels));
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clks[IMX_ADMA_ACM_SPDIF0_TX_CLK_SEL] = imx_dev_clk_mux(dev, "acm_spdif0_mclk_sel", base+0x1A0000, 0, 2, spdif_mclk_sels, ARRAY_SIZE(spdif_mclk_sels));
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clks[IMX_ADMA_ACM_MQS_TX_CLK_SEL] = imx_dev_clk_mux(dev, "acm_mqs_mclk_sel", base+0x1C0000, 0, 2, mqs_mclk_sels, ARRAY_SIZE(mqs_mclk_sels));
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for (i = 0; i < clk_data->clk_num; i++) {
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if (IS_ERR(clks[i]))
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pr_warn("i.MX clk %u: register failed with %ld\n",
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i, PTR_ERR(clks[i]));
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}
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ret = of_clk_add_provider(np, of_clk_src_onecell_get, clk_data);
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pm_runtime_put_sync(&pdev->dev);
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return ret;
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}
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static int imx8dxl_acm_clk_remove(struct platform_device *pdev)
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{
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struct imx8dxl_acm_priv *priv = dev_get_drvdata(&pdev->dev);
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pm_runtime_disable(&pdev->dev);
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clk_imx_acm_detach_pm_domains(&pdev->dev, &priv->dev_pm);
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return 0;
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}
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static const struct of_device_id imx8dxl_acm_match[] = {
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{ .compatible = "nxp,imx8dxl-acm", },
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{ /* sentinel */ }
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};
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static int __maybe_unused imx8dxl_acm_runtime_suspend(struct device *dev)
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{
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struct imx8dxl_acm_priv *priv = dev_get_drvdata(dev);
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priv->regs[0] = readl_relaxed(priv->reg + 0x000000);
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priv->regs[1] = readl_relaxed(priv->reg + 0x010000);
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priv->regs[2] = readl_relaxed(priv->reg + 0x020000);
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priv->regs[3] = readl_relaxed(priv->reg + 0x030000);
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priv->regs[14] = readl_relaxed(priv->reg + 0x0E0000);
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priv->regs[15] = readl_relaxed(priv->reg + 0x0F0000);
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priv->regs[16] = readl_relaxed(priv->reg + 0x100000);
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priv->regs[17] = readl_relaxed(priv->reg + 0x110000);
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priv->regs[26] = readl_relaxed(priv->reg + 0x1A0000);
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priv->regs[28] = readl_relaxed(priv->reg + 0x1C0000);
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return 0;
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}
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static int __maybe_unused imx8dxl_acm_runtime_resume(struct device *dev)
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{
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struct imx8dxl_acm_priv *priv = dev_get_drvdata(dev);
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writel_relaxed(priv->regs[0], priv->reg + 0x000000);
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writel_relaxed(priv->regs[1], priv->reg + 0x010000);
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writel_relaxed(priv->regs[2], priv->reg + 0x020000);
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writel_relaxed(priv->regs[3], priv->reg + 0x030000);
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writel_relaxed(priv->regs[14], priv->reg + 0x0E0000);
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writel_relaxed(priv->regs[15], priv->reg + 0x0F0000);
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writel_relaxed(priv->regs[16], priv->reg + 0x100000);
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writel_relaxed(priv->regs[17], priv->reg + 0x110000);
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writel_relaxed(priv->regs[26], priv->reg + 0x1A0000);
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writel_relaxed(priv->regs[28], priv->reg + 0x1C0000);
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return 0;
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}
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const struct dev_pm_ops imx8dxl_acm_pm_ops = {
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SET_RUNTIME_PM_OPS(imx8dxl_acm_runtime_suspend,
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imx8dxl_acm_runtime_resume, NULL)
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SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
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pm_runtime_force_resume)
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};
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static struct platform_driver imx8dxl_acm_clk_driver = {
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.driver = {
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.name = "imx8dxl-acm",
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.of_match_table = imx8dxl_acm_match,
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.pm = &imx8dxl_acm_pm_ops,
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.suppress_bind_attrs = true,
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},
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.probe = imx8dxl_acm_clk_probe,
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.remove = imx8dxl_acm_clk_remove,
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};
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static int __init imx8dxl_acm_init(void)
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{
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return platform_driver_register(&imx8dxl_acm_clk_driver);
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}
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fs_initcall(imx8dxl_acm_init);
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MODULE_LICENSE("GPL v2");
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