148 lines
4.4 KiB
C
148 lines
4.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright 2018 NXP
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* Dong Aisheng <aisheng.dong@nxp.com>
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*/
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#ifndef _IMX8QXP_LPCG_H
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#define _IMX8QXP_LPCG_H
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/*LSIO SS */
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#define LSIO_PWM_0_LPCG 0x00000
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#define LSIO_PWM_1_LPCG 0x10000
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#define LSIO_PWM_2_LPCG 0x20000
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#define LSIO_PWM_3_LPCG 0x30000
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#define LSIO_PWM_4_LPCG 0x40000
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#define LSIO_PWM_5_LPCG 0x50000
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#define LSIO_PWM_6_LPCG 0x60000
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#define LSIO_PWM_7_LPCG 0x70000
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#define LSIO_GPIO_0_LPCG 0x80000
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#define LSIO_GPIO_1_LPCG 0x90000
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#define LSIO_GPIO_2_LPCG 0xa0000
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#define LSIO_GPIO_3_LPCG 0xb0000
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#define LSIO_GPIO_4_LPCG 0xc0000
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#define LSIO_GPIO_5_LPCG 0xd0000
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#define LSIO_GPIO_6_LPCG 0xe0000
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#define LSIO_GPIO_7_LPCG 0xf0000
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#define LSIO_FSPI_0_LPCG 0x120000
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#define LSIO_FSPI_1_LPCG 0x130000
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#define LSIO_GPT_0_LPCG 0x140000
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#define LSIO_GPT_1_LPCG 0x150000
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#define LSIO_GPT_2_LPCG 0x160000
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#define LSIO_GPT_3_LPCG 0x170000
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#define LSIO_GPT_4_LPCG 0x180000
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#define LSIO_OCRAM_LPCG 0x190000
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#define LSIO_KPP_LPCG 0x1a0000
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#define LSIO_ROMCP_LPCG 0x100000
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/* Connectivity SS */
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#define CONN_USDHC_0_LPCG 0x00000
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#define CONN_USDHC_1_LPCG 0x10000
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#define CONN_USDHC_2_LPCG 0x20000
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#define CONN_ENET_0_LPCG 0x30000
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#define CONN_ENET_1_LPCG 0x40000
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#define CONN_DTCP_LPCG 0x50000
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#define CONN_MLB_LPCG 0x60000
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#define CONN_USB_2_LPCG 0x70000
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#define CONN_USB_3_LPCG 0x80000
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#define CONN_NAND_LPCG 0x90000
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#define CONN_EDMA_LPCG 0xa0000
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/* ADMA SS */
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#define ADMA_ASRC_0_LPCG 0x400000
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#define ADMA_ESAI_0_LPCG 0x410000
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#define ADMA_SPDIF_0_LPCG 0x420000
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#define ADMA_SAI_0_LPCG 0x440000
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#define ADMA_SAI_1_LPCG 0x450000
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#define ADMA_SAI_2_LPCG 0x460000
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#define ADMA_SAI_3_LPCG 0x470000
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#define ADMA_GPT_5_LPCG 0x4b0000
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#define ADMA_GPT_6_LPCG 0x4c0000
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#define ADMA_GPT_7_LPCG 0x4d0000
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#define ADMA_GPT_8_LPCG 0x4e0000
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#define ADMA_GPT_9_LPCG 0x4f0000
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#define ADMA_GPT_10_LPCG 0x500000
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#define ADMA_HIFI_LPCG 0x580000
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#define ADMA_OCRAM_LPCG 0x590000
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#define ADMA_EDMA_0_LPCG 0x5f0000
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#define ADMA_ASRC_1_LPCG 0xc00000
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#define ADMA_SAI_4_LPCG 0xc20000
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#define ADMA_SAI_5_LPCG 0xc30000
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#define ADMA_AMIX_LPCG 0xc40000
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#define ADMA_MQS_LPCG 0xc50000
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#define ADMA_ACM_LPCG 0xc60000
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#define ADMA_REC_CLK0_LPCG 0xd00000
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#define ADMA_REC_CLK1_LPCG 0xd10000
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#define ADMA_PLL_CLK0_LPCG 0xd20000
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#define ADMA_PLL_CLK1_LPCG 0xd30000
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#define ADMA_MCLKOUT0_LPCG 0xd50000
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#define ADMA_MCLKOUT1_LPCG 0xd60000
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#define ADMA_EDMA_1_LPCG 0xdf0000
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#define ADMA_LPSPI_0_LPCG 0x1400000
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#define ADMA_LPSPI_1_LPCG 0x1410000
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#define ADMA_LPSPI_2_LPCG 0x1420000
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#define ADMA_LPSPI_3_LPCG 0x1430000
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#define ADMA_LPUART_0_LPCG 0x1460000
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#define ADMA_LPUART_1_LPCG 0x1470000
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#define ADMA_LPUART_2_LPCG 0x1480000
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#define ADMA_LPUART_3_LPCG 0x1490000
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#define ADMA_LCD_LPCG 0x1580000
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#define ADMA_PWM_LPCG 0x1590000
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#define ADMA_LPI2C_0_LPCG 0x1c00000
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#define ADMA_LPI2C_1_LPCG 0x1c10000
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#define ADMA_LPI2C_2_LPCG 0x1c20000
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#define ADMA_LPI2C_3_LPCG 0x1c30000
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#define ADMA_ADC_0_LPCG 0x1c80000
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#define ADMA_FTM_0_LPCG 0x1ca0000
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#define ADMA_FTM_1_LPCG 0x1cb0000
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#define ADMA_FLEXCAN_0_LPCG 0x1cd0000
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#define ADMA_FLEXCAN_1_LPCG 0x1ce0000
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#define ADMA_FLEXCAN_2_LPCG 0x1cf0000
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/* CM40 SS */
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#define CM40_I2C_LPCG 0x60000
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/* HSIO SS */
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#define HSIO_PCIEA_LPCG 0x00000
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#define HSIO_PCIEB_LPCG 0x10000
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#define HSIO_SATA0_LPCG 0x20000
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#define HSIO_PHYX2_LPCG 0x30000
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#define HSIO_PHYX1_LPCG 0x40000
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#define HSIO_CRR_0_LPCG 0x50000
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#define HSIO_CRR_1_LPCG 0x60000
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#define HSIO_CRR_2_LPCG 0x70000
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#define HSIO_CRR_3_LPCG 0x80000
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#define HSIO_CRR_4_LPCG 0x90000
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#define HSIO_CRR_5_LPCG 0xa0000
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#define HSIO_GPIO_LPCG 0xb0000
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/* IMG SS */
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#define IMG_PDMA0_LPCG 0x00000
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#define IMG_PDMA1_LPCG 0x10000
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#define IMG_PDMA2_LPCG 0x20000
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#define IMG_PDMA3_LPCG 0x30000
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#define IMG_PDMA4_LPCG 0x40000
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#define IMG_PDMA5_LPCG 0x50000
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#define IMG_PDMA6_LPCG 0x60000
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#define IMG_PDMA7_LPCG 0x70000
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#define IMG_MIPI_CSI0_LPCG 0x80000
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#define IMG_MIPI_CSI1_LPCG 0x90000
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/* CSI SS */
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#define CSI_CSI0_CORE_LPCG 0x18
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#define CSI_CSI0_ESC_LPCG 0x1C
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#define CSI_CSI0_I2C0_LPCG 0x14
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#define CSI_CSI1_CORE_LPCG 0x18
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#define CSI_CSI1_ESC_LPCG 0x1C
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#define CSI_CSI1_I2C0_LPCG 0x14
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/* Parallel Interface SS */
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#define PI_PI0_PIXEL_LPCG 0x18
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#define PI_PI0_IPG_LPCG 0x04
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#define PI_PI0_MISC_LPCG 0x1C
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/* DC0 SS */
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/* TODO: ADD DC LPCGs */
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#endif /* _IMX8QXP_LPCG_H */
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