602 lines
16 KiB
C
602 lines
16 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* i.MX drm driver - LVDS display bridge
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*
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* Copyright (C) 2012 Sascha Hauer, Pengutronix
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*/
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#include <linux/clk.h>
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#include <linux/component.h>
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#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
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#include <linux/module.h>
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#include <linux/of_device.h>
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#include <linux/of_graph.h>
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#include <linux/regmap.h>
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#include <linux/videodev2.h>
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#include <video/of_display_timing.h>
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#include <video/of_videomode.h>
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#include <drm/bridge/fsl_imx_ldb.h>
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#include <drm/drm_atomic.h>
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_fb_helper.h>
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#include <drm/drm_of.h>
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#include <drm/drm_probe_helper.h>
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#include "imx-drm.h"
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#define DRIVER_NAME "imx-ldb"
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#define LDB_CH0_MODE_EN_TO_DI0 (1 << 0)
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#define LDB_CH0_MODE_EN_TO_DI1 (3 << 0)
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#define LDB_CH0_MODE_EN_MASK (3 << 0)
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#define LDB_CH1_MODE_EN_TO_DI0 (1 << 2)
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#define LDB_CH1_MODE_EN_TO_DI1 (3 << 2)
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#define LDB_CH1_MODE_EN_MASK (3 << 2)
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#define LDB_BGREF_RMODE_INT (1 << 15)
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struct imx_ldb;
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struct imx_ldb_channel {
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struct ldb_channel base;
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struct imx_ldb *imx_ldb;
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struct drm_connector connector;
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struct drm_encoder encoder;
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struct i2c_adapter *ddc;
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void *edid;
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int edid_len;
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struct drm_display_mode mode;
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int mode_valid;
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u32 bus_flags;
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};
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static inline struct imx_ldb_channel *con_to_imx_ldb_ch(struct drm_connector *c)
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{
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return container_of(c, struct imx_ldb_channel, connector);
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}
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static inline struct imx_ldb_channel *enc_to_imx_ldb_ch(struct drm_encoder *e)
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{
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return container_of(e, struct imx_ldb_channel, encoder);
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}
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struct bus_mux {
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int reg;
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int shift;
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int mask;
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};
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struct imx_ldb {
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struct ldb base;
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struct imx_ldb_channel channel[2];
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struct clk *clk[2]; /* our own clock */
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struct clk *clk_sel[4]; /* parent of display clock */
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struct clk *clk_parent[4]; /* original parent of clk_sel */
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struct clk *clk_pll[2]; /* upstream clock we can adjust */
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const struct bus_mux *lvds_mux;
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};
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static int imx_ldb_connector_get_modes(struct drm_connector *connector)
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{
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struct imx_ldb_channel *imx_ldb_ch = con_to_imx_ldb_ch(connector);
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int num_modes = 0;
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if (!imx_ldb_ch->edid && imx_ldb_ch->ddc)
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imx_ldb_ch->edid = drm_get_edid(connector, imx_ldb_ch->ddc);
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if (imx_ldb_ch->edid) {
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drm_connector_update_edid_property(connector,
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imx_ldb_ch->edid);
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num_modes = drm_add_edid_modes(connector, imx_ldb_ch->edid);
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}
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if (imx_ldb_ch->mode_valid) {
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struct drm_display_mode *mode;
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mode = drm_mode_create(connector->dev);
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if (!mode)
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return -EINVAL;
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drm_mode_copy(mode, &imx_ldb_ch->mode);
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mode->type |= DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
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drm_mode_probed_add(connector, mode);
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num_modes++;
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}
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return num_modes;
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}
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static struct drm_encoder *imx_ldb_connector_best_encoder(
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struct drm_connector *connector)
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{
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struct imx_ldb_channel *imx_ldb_ch = con_to_imx_ldb_ch(connector);
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return &imx_ldb_ch->encoder;
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}
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static void imx_ldb_set_clock(struct imx_ldb *imx_ldb, int mux, int chno,
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unsigned long serial_clk, unsigned long di_clk)
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{
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struct ldb *ldb = &imx_ldb->base;
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int ret;
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dev_dbg(ldb->dev, "%s: now: %ld want: %ld\n", __func__,
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clk_get_rate(imx_ldb->clk_pll[chno]), serial_clk);
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clk_set_rate(imx_ldb->clk_pll[chno], serial_clk);
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dev_dbg(ldb->dev, "%s after: %ld\n", __func__,
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clk_get_rate(imx_ldb->clk_pll[chno]));
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dev_dbg(ldb->dev, "%s: now: %ld want: %ld\n", __func__,
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clk_get_rate(imx_ldb->clk[chno]),
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(long int)di_clk);
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clk_set_rate(imx_ldb->clk[chno], di_clk);
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dev_dbg(ldb->dev, "%s after: %ld\n", __func__,
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clk_get_rate(imx_ldb->clk[chno]));
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/* set display clock mux to LDB input clock */
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ret = clk_set_parent(imx_ldb->clk_sel[mux], imx_ldb->clk[chno]);
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if (ret)
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dev_err(ldb->dev,
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"unable to set di%d parent clock to ldb_di%d\n", mux,
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chno);
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}
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static void imx_ldb_encoder_enable(struct drm_encoder *encoder)
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{
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struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
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struct imx_ldb *imx_ldb = imx_ldb_ch->imx_ldb;
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struct ldb_channel *ldb_ch = &imx_ldb_ch->base;
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struct ldb *ldb = &imx_ldb->base;
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int mux = drm_of_encoder_active_port_id(ldb_ch->child, encoder);
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if (ldb->dual) {
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clk_set_parent(imx_ldb->clk_sel[mux], imx_ldb->clk[0]);
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clk_set_parent(imx_ldb->clk_sel[mux], imx_ldb->clk[1]);
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clk_prepare_enable(imx_ldb->clk[0]);
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clk_prepare_enable(imx_ldb->clk[1]);
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} else {
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clk_set_parent(imx_ldb->clk_sel[mux],
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imx_ldb->clk[ldb_ch->chno]);
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}
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if (imx_ldb_ch == &imx_ldb->channel[0] || ldb->dual) {
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ldb->ldb_ctrl &= ~LDB_CH0_MODE_EN_MASK;
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if (mux == 0 || imx_ldb->lvds_mux)
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ldb->ldb_ctrl |= LDB_CH0_MODE_EN_TO_DI0;
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else if (mux == 1)
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ldb->ldb_ctrl |= LDB_CH0_MODE_EN_TO_DI1;
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}
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if (imx_ldb_ch == &imx_ldb->channel[1] || ldb->dual) {
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ldb->ldb_ctrl &= ~LDB_CH1_MODE_EN_MASK;
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if (mux == 1 || imx_ldb->lvds_mux)
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ldb->ldb_ctrl |= LDB_CH1_MODE_EN_TO_DI1;
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else if (mux == 0)
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ldb->ldb_ctrl |= LDB_CH1_MODE_EN_TO_DI0;
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}
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if (imx_ldb->lvds_mux) {
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const struct bus_mux *lvds_mux = NULL;
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if (imx_ldb_ch == &imx_ldb->channel[0])
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lvds_mux = &imx_ldb->lvds_mux[0];
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else if (imx_ldb_ch == &imx_ldb->channel[1])
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lvds_mux = &imx_ldb->lvds_mux[1];
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regmap_update_bits(ldb->regmap, lvds_mux->reg, lvds_mux->mask,
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mux << lvds_mux->shift);
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}
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}
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static void
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imx_ldb_encoder_atomic_mode_set(struct drm_encoder *encoder,
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struct drm_crtc_state *crtc_state,
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struct drm_connector_state *connector_state)
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{
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struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
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struct imx_ldb *imx_ldb = imx_ldb_ch->imx_ldb;
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struct ldb_channel *ldb_ch = &imx_ldb_ch->base;
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struct ldb *ldb = &imx_ldb->base;
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struct drm_display_mode *mode = &crtc_state->adjusted_mode;
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unsigned long serial_clk;
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unsigned long di_clk = mode->clock * 1000;
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int mux = drm_of_encoder_active_port_id(ldb_ch->child, encoder);
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if (mode->clock > 170000) {
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dev_warn(ldb->dev,
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"%s: mode exceeds 170 MHz pixel clock\n", __func__);
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}
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if (mode->clock > 85000 && !ldb->dual) {
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dev_warn(ldb->dev,
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"%s: mode exceeds 85 MHz pixel clock\n", __func__);
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}
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if (ldb->dual) {
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serial_clk = 3500UL * mode->clock;
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imx_ldb_set_clock(imx_ldb, mux, 0, serial_clk, di_clk);
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imx_ldb_set_clock(imx_ldb, mux, 1, serial_clk, di_clk);
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} else {
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serial_clk = 7000UL * mode->clock;
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imx_ldb_set_clock(imx_ldb, mux, ldb_ch->chno, serial_clk,
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di_clk);
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}
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if (!ldb_ch->bus_format) {
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struct drm_connector *connector = connector_state->connector;
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struct drm_display_info *di = &connector->display_info;
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if (di->num_bus_formats)
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ldb_ch->bus_format = di->bus_formats[0];
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}
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}
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static void imx_ldb_encoder_disable(struct drm_encoder *encoder)
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{
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struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
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struct imx_ldb *imx_ldb = imx_ldb_ch->imx_ldb;
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struct ldb *ldb = &imx_ldb->base;
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int mux, ret;
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if (imx_ldb_ch == &imx_ldb->channel[0] || ldb->dual)
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ldb->ldb_ctrl &= ~LDB_CH0_MODE_EN_MASK;
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if (imx_ldb_ch == &imx_ldb->channel[1] || ldb->dual)
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ldb->ldb_ctrl &= ~LDB_CH1_MODE_EN_MASK;
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regmap_write(ldb->regmap, IOMUXC_GPR2, ldb->ldb_ctrl);
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if (ldb->dual) {
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clk_disable_unprepare(imx_ldb->clk[0]);
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clk_disable_unprepare(imx_ldb->clk[1]);
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}
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if (imx_ldb->lvds_mux) {
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const struct bus_mux *lvds_mux = NULL;
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if (imx_ldb_ch == &imx_ldb->channel[0])
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lvds_mux = &imx_ldb->lvds_mux[0];
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else if (imx_ldb_ch == &imx_ldb->channel[1])
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lvds_mux = &imx_ldb->lvds_mux[1];
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regmap_read(ldb->regmap, lvds_mux->reg, &mux);
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mux &= lvds_mux->mask;
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mux >>= lvds_mux->shift;
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} else {
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mux = (imx_ldb_ch == &imx_ldb->channel[0]) ? 0 : 1;
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}
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/* set display clock mux back to original input clock */
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ret = clk_set_parent(imx_ldb->clk_sel[mux], imx_ldb->clk_parent[mux]);
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if (ret)
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dev_err(ldb->dev,
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"unable to set di%d parent clock to original parent\n",
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mux);
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}
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static int imx_ldb_encoder_atomic_check(struct drm_encoder *encoder,
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struct drm_crtc_state *crtc_state,
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struct drm_connector_state *conn_state)
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{
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struct imx_crtc_state *imx_crtc_state = to_imx_crtc_state(crtc_state);
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struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
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struct ldb_channel *ldb_ch = &imx_ldb_ch->base;
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struct drm_display_info *di = &conn_state->connector->display_info;
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u32 bus_format = ldb_ch->bus_format;
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/* Bus format description in DT overrides connector display info. */
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if (!bus_format && di->num_bus_formats) {
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bus_format = di->bus_formats[0];
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imx_crtc_state->bus_flags = di->bus_flags;
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} else {
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bus_format = ldb_ch->bus_format;
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imx_crtc_state->bus_flags = imx_ldb_ch->bus_flags;
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}
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switch (bus_format) {
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case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:
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imx_crtc_state->bus_format = MEDIA_BUS_FMT_RGB666_1X18;
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break;
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case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:
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case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:
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imx_crtc_state->bus_format = MEDIA_BUS_FMT_RGB888_1X24;
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break;
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default:
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return -EINVAL;
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}
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imx_crtc_state->di_hsync_pin = 2;
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imx_crtc_state->di_vsync_pin = 3;
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return 0;
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}
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static const struct drm_connector_funcs imx_ldb_connector_funcs = {
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.fill_modes = drm_helper_probe_single_connector_modes,
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.destroy = imx_drm_connector_destroy,
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.reset = drm_atomic_helper_connector_reset,
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.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
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.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
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};
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static const struct drm_connector_helper_funcs imx_ldb_connector_helper_funcs = {
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.get_modes = imx_ldb_connector_get_modes,
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.best_encoder = imx_ldb_connector_best_encoder,
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};
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static const struct drm_encoder_funcs imx_ldb_encoder_funcs = {
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.destroy = imx_drm_encoder_destroy,
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};
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static const struct drm_encoder_helper_funcs imx_ldb_encoder_helper_funcs = {
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.atomic_mode_set = imx_ldb_encoder_atomic_mode_set,
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.enable = imx_ldb_encoder_enable,
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.disable = imx_ldb_encoder_disable,
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.atomic_check = imx_ldb_encoder_atomic_check,
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};
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static int imx_ldb_get_clk(struct imx_ldb *imx_ldb, int chno)
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{
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struct ldb *ldb = &imx_ldb->base;
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struct device *dev = ldb->dev;
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char clkname[16];
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snprintf(clkname, sizeof(clkname), "di%d", chno);
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imx_ldb->clk[chno] = devm_clk_get(dev, clkname);
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if (IS_ERR(imx_ldb->clk[chno]))
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return PTR_ERR(imx_ldb->clk[chno]);
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snprintf(clkname, sizeof(clkname), "di%d_pll", chno);
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imx_ldb->clk_pll[chno] = devm_clk_get(dev, clkname);
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return PTR_ERR_OR_ZERO(imx_ldb->clk_pll[chno]);
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}
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static struct bus_mux imx6q_lvds_mux[2] = {
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{
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.reg = IOMUXC_GPR3,
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.shift = 6,
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.mask = IMX6Q_GPR3_LVDS0_MUX_CTL_MASK,
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}, {
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.reg = IOMUXC_GPR3,
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.shift = 8,
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.mask = IMX6Q_GPR3_LVDS1_MUX_CTL_MASK,
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}
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};
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/*
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* For a device declaring compatible = "fsl,imx6q-ldb", "fsl,imx53-ldb",
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* of_match_device will walk through this list and take the first entry
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* matching any of its compatible values. Therefore, the more generic
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* entries (in this case fsl,imx53-ldb) need to be ordered last.
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*/
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static const struct of_device_id imx_ldb_dt_ids[] = {
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{ .compatible = "fsl,imx6q-ldb", .data = imx6q_lvds_mux, },
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{ .compatible = "fsl,imx53-ldb", .data = NULL, },
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{ }
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};
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MODULE_DEVICE_TABLE(of, imx_ldb_dt_ids);
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static int imx_ldb_panel_ddc(struct device *dev,
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struct imx_ldb_channel *imx_ldb_ch, struct device_node *child)
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{
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struct ldb_channel *ldb_ch = &imx_ldb_ch->base;
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struct device_node *ddc_node;
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const u8 *edidp;
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int ret;
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ddc_node = of_parse_phandle(child, "ddc-i2c-bus", 0);
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if (ddc_node) {
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imx_ldb_ch->ddc = of_find_i2c_adapter_by_node(ddc_node);
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of_node_put(ddc_node);
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if (!imx_ldb_ch->ddc) {
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dev_warn(dev, "failed to get ddc i2c adapter\n");
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return -EPROBE_DEFER;
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}
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}
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if (!imx_ldb_ch->ddc) {
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/* if no DDC available, fallback to hardcoded EDID */
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dev_dbg(dev, "no ddc available\n");
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edidp = of_get_property(child, "edid",
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&imx_ldb_ch->edid_len);
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if (edidp) {
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imx_ldb_ch->edid = kmemdup(edidp,
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imx_ldb_ch->edid_len,
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GFP_KERNEL);
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} else if (!ldb_ch->panel) {
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/* fallback to display-timings node */
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ret = of_get_drm_display_mode(child,
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&imx_ldb_ch->mode,
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&imx_ldb_ch->bus_flags,
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OF_USE_NATIVE_MODE);
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if (!ret)
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imx_ldb_ch->mode_valid = 1;
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}
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}
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return 0;
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}
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static int imx_ldb_register(struct drm_device *drm,
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struct imx_ldb_channel *imx_ldb_ch)
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{
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struct imx_ldb *imx_ldb = imx_ldb_ch->imx_ldb;
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struct ldb *ldb = &imx_ldb->base;
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struct ldb_channel *ldb_ch = &imx_ldb_ch->base;
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struct drm_encoder *encoder = &imx_ldb_ch->encoder;
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int ret;
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|
|
|
ret = imx_drm_encoder_parse_of(drm, encoder, ldb_ch->child);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = imx_ldb_get_clk(imx_ldb, ldb_ch->chno);
|
|
if (ret)
|
|
return ret;
|
|
|
|
if (ldb->dual) {
|
|
ret = imx_ldb_get_clk(imx_ldb, 1);
|
|
if (ret)
|
|
return ret;
|
|
}
|
|
|
|
if (!ldb_ch->next_bridge) {
|
|
/* panel ddc only if there is no bridge */
|
|
ret = imx_ldb_panel_ddc(ldb->dev, imx_ldb_ch, ldb_ch->child);
|
|
if (ret)
|
|
return ret;
|
|
|
|
/*
|
|
* We want to add the connector whenever there is no bridge
|
|
* that brings its own, not only when there is a panel. For
|
|
* historical reasons, the ldb driver can also work without
|
|
* a panel.
|
|
*/
|
|
drm_connector_helper_add(&imx_ldb_ch->connector,
|
|
&imx_ldb_connector_helper_funcs);
|
|
drm_connector_init(drm, &imx_ldb_ch->connector,
|
|
&imx_ldb_connector_funcs,
|
|
DRM_MODE_CONNECTOR_LVDS);
|
|
drm_connector_attach_encoder(&imx_ldb_ch->connector, encoder);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int imx_ldb_bind(struct device *dev, struct device *master, void *data)
|
|
{
|
|
struct drm_device *drm = data;
|
|
const struct of_device_id *of_id =
|
|
of_match_device(imx_ldb_dt_ids, dev);
|
|
struct imx_ldb *imx_ldb = dev_get_drvdata(dev);
|
|
struct ldb *ldb;
|
|
struct ldb_channel *ldb_ch;
|
|
struct drm_encoder *encoder[LDB_CH_NUM];
|
|
int ret;
|
|
int i;
|
|
|
|
imx_ldb->lvds_mux = of_id ? of_id->data : NULL;
|
|
|
|
ldb = &imx_ldb->base;
|
|
ldb->dev = dev;
|
|
ldb->ctrl_reg = IOMUXC_GPR2;
|
|
/*
|
|
* The output port is port@4 with an external 4-port mux or
|
|
* port@2 with the internal 2-port mux or port@1 without mux.
|
|
*/
|
|
ldb->output_port = imx_ldb->lvds_mux ? 4 : 2;
|
|
|
|
for (i = 0; i < LDB_CH_NUM; i++) {
|
|
imx_ldb->channel[i].imx_ldb = imx_ldb;
|
|
ldb->channel[i] = &imx_ldb->channel[i].base;
|
|
}
|
|
|
|
/*
|
|
* There are three different possible clock mux configurations:
|
|
* i.MX53: ipu1_di0_sel, ipu1_di1_sel
|
|
* i.MX6q: ipu1_di0_sel, ipu1_di1_sel, ipu2_di0_sel,
|
|
* ipu2_di1_sel
|
|
* i.MX6dl: ipu1_di0_sel, ipu1_di1_sel, lcdif_sel
|
|
* Map them all to di0_sel...di3_sel.
|
|
*/
|
|
for (i = 0; i < 4; i++) {
|
|
char clkname[16];
|
|
|
|
sprintf(clkname, "di%d_sel", i);
|
|
imx_ldb->clk_sel[i] = devm_clk_get(dev, clkname);
|
|
if (IS_ERR(imx_ldb->clk_sel[i])) {
|
|
ret = PTR_ERR(imx_ldb->clk_sel[i]);
|
|
imx_ldb->clk_sel[i] = NULL;
|
|
break;
|
|
}
|
|
|
|
imx_ldb->clk_parent[i] =
|
|
clk_get_parent(imx_ldb->clk_sel[i]);
|
|
}
|
|
if (i == 0)
|
|
return ret;
|
|
|
|
for (i = 0; i < LDB_CH_NUM; i++) {
|
|
encoder[i] = &imx_ldb->channel[i].encoder;
|
|
|
|
drm_encoder_helper_add(encoder[i],
|
|
&imx_ldb_encoder_helper_funcs);
|
|
drm_encoder_init(drm, encoder[i], &imx_ldb_encoder_funcs,
|
|
DRM_MODE_ENCODER_LVDS, NULL);
|
|
}
|
|
|
|
ret = ldb_bind(ldb, encoder);
|
|
if (ret)
|
|
return ret;
|
|
|
|
for (i = 0; i < LDB_CH_NUM; i++) {
|
|
ldb_ch = &imx_ldb->channel[i].base;
|
|
if (!ldb_ch->is_valid) {
|
|
drm_encoder_cleanup(encoder[i]);
|
|
continue;
|
|
}
|
|
|
|
ret = imx_ldb_register(drm, &imx_ldb->channel[i]);
|
|
if (ret)
|
|
return ret;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void imx_ldb_unbind(struct device *dev, struct device *master,
|
|
void *data)
|
|
{
|
|
struct imx_ldb *imx_ldb = dev_get_drvdata(dev);
|
|
int i;
|
|
|
|
for (i = 0; i < LDB_CH_NUM; i++) {
|
|
struct imx_ldb_channel *imx_ldb_ch = &imx_ldb->channel[i];
|
|
|
|
kfree(imx_ldb_ch->edid);
|
|
i2c_put_adapter(imx_ldb_ch->ddc);
|
|
}
|
|
}
|
|
|
|
static const struct component_ops imx_ldb_ops = {
|
|
.bind = imx_ldb_bind,
|
|
.unbind = imx_ldb_unbind,
|
|
};
|
|
|
|
static int imx_ldb_probe(struct platform_device *pdev)
|
|
{
|
|
struct imx_ldb *imx_ldb;
|
|
|
|
imx_ldb = devm_kzalloc(&pdev->dev, sizeof(*imx_ldb), GFP_KERNEL);
|
|
if (!imx_ldb)
|
|
return -ENOMEM;
|
|
|
|
platform_set_drvdata(pdev, imx_ldb);
|
|
|
|
return component_add(&pdev->dev, &imx_ldb_ops);
|
|
}
|
|
|
|
static int imx_ldb_remove(struct platform_device *pdev)
|
|
{
|
|
component_del(&pdev->dev, &imx_ldb_ops);
|
|
return 0;
|
|
}
|
|
|
|
static struct platform_driver imx_ldb_driver = {
|
|
.probe = imx_ldb_probe,
|
|
.remove = imx_ldb_remove,
|
|
.driver = {
|
|
.of_match_table = imx_ldb_dt_ids,
|
|
.name = DRIVER_NAME,
|
|
},
|
|
};
|
|
|
|
module_platform_driver(imx_ldb_driver);
|
|
|
|
MODULE_DESCRIPTION("i.MX LVDS driver");
|
|
MODULE_AUTHOR("Sascha Hauer, Pengutronix");
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_ALIAS("platform:" DRIVER_NAME);
|