252 lines
8.7 KiB
C
252 lines
8.7 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* s32v234 pinctrl driver based on imx pinmux and pinconf core
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*
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* Copyright 2015-2016 Freescale Semiconductor, Inc.
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* Copyright 2017, 2019 NXP
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*/
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#include <linux/err.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/pinctrl/pinctrl.h>
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#include <dt-bindings/pinctrl/s32v234-pinctrl.h>
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#include "pinctrl-s32v.h"
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/* Pad names for the pinmux subsystem */
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static const struct pinctrl_pin_desc s32v234_pinctrl_pads[] = {
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S32V_PINCTRL_PIN(S32V234_MSCR_PA0),
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S32V_PINCTRL_PIN(S32V234_MSCR_PA1),
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S32V_PINCTRL_PIN(S32V234_MSCR_PA2),
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S32V_PINCTRL_PIN(S32V234_MSCR_PA3),
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S32V_PINCTRL_PIN(S32V234_MSCR_PA4),
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S32V_PINCTRL_PIN(S32V234_MSCR_PA5),
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S32V_PINCTRL_PIN(S32V234_MSCR_PA6),
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S32V_PINCTRL_PIN(S32V234_MSCR_PA7),
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S32V_PINCTRL_PIN(S32V234_MSCR_PA8),
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S32V_PINCTRL_PIN(S32V234_MSCR_PA9),
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S32V_PINCTRL_PIN(S32V234_MSCR_PA10),
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S32V_PINCTRL_PIN(S32V234_MSCR_PA11),
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S32V_PINCTRL_PIN(S32V234_MSCR_PA12),
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S32V_PINCTRL_PIN(S32V234_MSCR_PA13),
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S32V_PINCTRL_PIN(S32V234_MSCR_PA14),
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S32V_PINCTRL_PIN(S32V234_MSCR_PA15),
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S32V_PINCTRL_PIN(S32V234_MSCR_PB0),
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S32V_PINCTRL_PIN(S32V234_MSCR_PB1),
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S32V_PINCTRL_PIN(S32V234_MSCR_PB2),
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S32V_PINCTRL_PIN(S32V234_MSCR_PB3),
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S32V_PINCTRL_PIN(S32V234_MSCR_PB4),
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S32V_PINCTRL_PIN(S32V234_MSCR_PB5),
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S32V_PINCTRL_PIN(S32V234_MSCR_PB6),
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S32V_PINCTRL_PIN(S32V234_MSCR_PB7),
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S32V_PINCTRL_PIN(S32V234_MSCR_PB8),
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S32V_PINCTRL_PIN(S32V234_MSCR_PB9),
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S32V_PINCTRL_PIN(S32V234_MSCR_PB10),
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S32V_PINCTRL_PIN(S32V234_MSCR_PB11),
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S32V_PINCTRL_PIN(S32V234_MSCR_PB12),
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S32V_PINCTRL_PIN(S32V234_MSCR_PB13),
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S32V_PINCTRL_PIN(S32V234_MSCR_PB14),
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S32V_PINCTRL_PIN(S32V234_MSCR_PB15),
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S32V_PINCTRL_PIN(S32V234_MSCR_PC0),
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S32V_PINCTRL_PIN(S32V234_MSCR_PC1),
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S32V_PINCTRL_PIN(S32V234_MSCR_PC2),
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S32V_PINCTRL_PIN(S32V234_MSCR_PC3),
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S32V_PINCTRL_PIN(S32V234_MSCR_PC4),
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S32V_PINCTRL_PIN(S32V234_MSCR_PC5),
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S32V_PINCTRL_PIN(S32V234_MSCR_PC6),
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S32V_PINCTRL_PIN(S32V234_MSCR_PC7),
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S32V_PINCTRL_PIN(S32V234_MSCR_PC8),
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S32V_PINCTRL_PIN(S32V234_MSCR_PC9),
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S32V_PINCTRL_PIN(S32V234_MSCR_PC10),
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S32V_PINCTRL_PIN(S32V234_MSCR_PC11),
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S32V_PINCTRL_PIN(S32V234_MSCR_PC12),
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S32V_PINCTRL_PIN(S32V234_MSCR_PC13),
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S32V_PINCTRL_PIN(S32V234_MSCR_PC14),
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S32V_PINCTRL_PIN(S32V234_MSCR_PC15),
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S32V_PINCTRL_PIN(S32V234_MSCR_PD0),
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S32V_PINCTRL_PIN(S32V234_MSCR_PD1),
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S32V_PINCTRL_PIN(S32V234_MSCR_PD2),
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S32V_PINCTRL_PIN(S32V234_MSCR_PD3),
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S32V_PINCTRL_PIN(S32V234_MSCR_PD4),
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S32V_PINCTRL_PIN(S32V234_MSCR_PD5),
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S32V_PINCTRL_PIN(S32V234_MSCR_PD6),
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S32V_PINCTRL_PIN(S32V234_MSCR_PD7),
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S32V_PINCTRL_PIN(S32V234_MSCR_PD8),
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S32V_PINCTRL_PIN(S32V234_MSCR_PD9),
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S32V_PINCTRL_PIN(S32V234_MSCR_PD10),
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S32V_PINCTRL_PIN(S32V234_MSCR_PD11),
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S32V_PINCTRL_PIN(S32V234_MSCR_PD12),
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S32V_PINCTRL_PIN(S32V234_MSCR_PD13),
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S32V_PINCTRL_PIN(S32V234_MSCR_PD14),
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S32V_PINCTRL_PIN(S32V234_MSCR_PD15),
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S32V_PINCTRL_PIN(S32V234_MSCR_PE0),
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S32V_PINCTRL_PIN(S32V234_MSCR_PE1),
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S32V_PINCTRL_PIN(S32V234_MSCR_PE2),
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S32V_PINCTRL_PIN(S32V234_MSCR_PE3),
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S32V_PINCTRL_PIN(S32V234_MSCR_PE4),
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S32V_PINCTRL_PIN(S32V234_MSCR_PE5),
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S32V_PINCTRL_PIN(S32V234_MSCR_PE6),
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S32V_PINCTRL_PIN(S32V234_MSCR_PE7),
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S32V_PINCTRL_PIN(S32V234_MSCR_PE8),
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S32V_PINCTRL_PIN(S32V234_MSCR_PE9),
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S32V_PINCTRL_PIN(S32V234_MSCR_PE10),
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S32V_PINCTRL_PIN(S32V234_MSCR_PE11),
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S32V_PINCTRL_PIN(S32V234_MSCR_PE12),
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S32V_PINCTRL_PIN(S32V234_MSCR_PE13),
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S32V_PINCTRL_PIN(S32V234_MSCR_PE14),
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S32V_PINCTRL_PIN(S32V234_MSCR_PE15),
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S32V_PINCTRL_PIN(S32V234_MSCR_PF0),
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S32V_PINCTRL_PIN(S32V234_MSCR_PF1),
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S32V_PINCTRL_PIN(S32V234_MSCR_PF2),
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S32V_PINCTRL_PIN(S32V234_MSCR_PF3),
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S32V_PINCTRL_PIN(S32V234_MSCR_PF4),
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S32V_PINCTRL_PIN(S32V234_MSCR_PF5),
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S32V_PINCTRL_PIN(S32V234_MSCR_PF6),
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S32V_PINCTRL_PIN(S32V234_MSCR_PF7),
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S32V_PINCTRL_PIN(S32V234_MSCR_PF8),
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S32V_PINCTRL_PIN(S32V234_MSCR_PF9),
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S32V_PINCTRL_PIN(S32V234_MSCR_PF10),
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S32V_PINCTRL_PIN(S32V234_MSCR_PF11),
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S32V_PINCTRL_PIN(S32V234_MSCR_PF12),
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S32V_PINCTRL_PIN(S32V234_MSCR_PF13),
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S32V_PINCTRL_PIN(S32V234_MSCR_PF14),
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S32V_PINCTRL_PIN(S32V234_MSCR_PF15),
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S32V_PINCTRL_PIN(S32V234_MSCR_PG0),
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S32V_PINCTRL_PIN(S32V234_MSCR_PG1),
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S32V_PINCTRL_PIN(S32V234_MSCR_PG2),
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S32V_PINCTRL_PIN(S32V234_MSCR_PG3),
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S32V_PINCTRL_PIN(S32V234_MSCR_PG4),
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S32V_PINCTRL_PIN(S32V234_MSCR_PG5),
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S32V_PINCTRL_PIN(S32V234_MSCR_PG6),
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S32V_PINCTRL_PIN(S32V234_MSCR_PG7),
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S32V_PINCTRL_PIN(S32V234_MSCR_PG8),
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S32V_PINCTRL_PIN(S32V234_MSCR_PG9),
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S32V_PINCTRL_PIN(S32V234_MSCR_PG10),
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S32V_PINCTRL_PIN(S32V234_MSCR_PG11),
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S32V_PINCTRL_PIN(S32V234_MSCR_PG12),
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S32V_PINCTRL_PIN(S32V234_MSCR_PG13),
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S32V_PINCTRL_PIN(S32V234_MSCR_PG14),
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S32V_PINCTRL_PIN(S32V234_MSCR_PG15),
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S32V_PINCTRL_PIN(S32V234_MSCR_PH0),
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S32V_PINCTRL_PIN(S32V234_MSCR_PH1),
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S32V_PINCTRL_PIN(S32V234_MSCR_PH2),
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S32V_PINCTRL_PIN(S32V234_MSCR_PH3),
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S32V_PINCTRL_PIN(S32V234_MSCR_PH4),
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S32V_PINCTRL_PIN(S32V234_MSCR_PH5),
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S32V_PINCTRL_PIN(S32V234_MSCR_PH6),
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S32V_PINCTRL_PIN(S32V234_MSCR_PH7),
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S32V_PINCTRL_PIN(S32V234_MSCR_PH8),
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S32V_PINCTRL_PIN(S32V234_MSCR_PH9),
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S32V_PINCTRL_PIN(S32V234_MSCR_PH10),
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S32V_PINCTRL_PIN(S32V234_MSCR_PH11),
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S32V_PINCTRL_PIN(S32V234_MSCR_PH12),
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S32V_PINCTRL_PIN(S32V234_MSCR_PH13),
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S32V_PINCTRL_PIN(S32V234_MSCR_PH14),
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S32V_PINCTRL_PIN(S32V234_MSCR_PH15),
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S32V_PINCTRL_PIN(S32V234_MSCR_PJ0),
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S32V_PINCTRL_PIN(S32V234_MSCR_PJ1),
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S32V_PINCTRL_PIN(S32V234_MSCR_PJ2),
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S32V_PINCTRL_PIN(S32V234_MSCR_PJ3),
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S32V_PINCTRL_PIN(S32V234_MSCR_PJ4),
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S32V_PINCTRL_PIN(S32V234_MSCR_PJ5),
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S32V_PINCTRL_PIN(S32V234_MSCR_PJ6),
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S32V_PINCTRL_PIN(S32V234_MSCR_PJ7),
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S32V_PINCTRL_PIN(S32V234_MSCR_PJ8),
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S32V_PINCTRL_PIN(S32V234_MSCR_PJ9),
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S32V_PINCTRL_PIN(S32V234_MSCR_PJ10),
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S32V_PINCTRL_PIN(S32V234_MSCR_PJ11),
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S32V_PINCTRL_PIN(S32V234_MSCR_PJ12),
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S32V_PINCTRL_PIN(S32V234_MSCR_PJ13),
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S32V_PINCTRL_PIN(S32V234_MSCR_PJ14),
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S32V_PINCTRL_PIN(S32V234_MSCR_PJ15),
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S32V_PINCTRL_PIN(S32V234_MSCR_PK0),
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S32V_PINCTRL_PIN(S32V234_MSCR_PK1),
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S32V_PINCTRL_PIN(S32V234_MSCR_PK2),
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S32V_PINCTRL_PIN(S32V234_MSCR_PK3),
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S32V_PINCTRL_PIN(S32V234_MSCR_PK4),
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S32V_PINCTRL_PIN(S32V234_MSCR_PK5),
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S32V_PINCTRL_PIN(S32V234_MSCR_PK6),
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S32V_PINCTRL_PIN(S32V234_MSCR_PK7),
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S32V_PINCTRL_PIN(S32V234_MSCR_PK8),
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S32V_PINCTRL_PIN(S32V234_MSCR_PK9),
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S32V_PINCTRL_PIN(S32V234_MSCR_PK10),
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S32V_PINCTRL_PIN(S32V234_MSCR_PK11),
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S32V_PINCTRL_PIN(S32V234_MSCR_PK12),
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S32V_PINCTRL_PIN(S32V234_MSCR_PK13),
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S32V_PINCTRL_PIN(S32V234_MSCR_PK14),
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S32V_PINCTRL_PIN(S32V234_MSCR_PK15),
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S32V_PINCTRL_PIN(S32V234_MSCR_PL0),
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S32V_PINCTRL_PIN(S32V234_MSCR_PL1),
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S32V_PINCTRL_PIN(S32V234_MSCR_PL2),
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S32V_PINCTRL_PIN(S32V234_MSCR_PL3),
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S32V_PINCTRL_PIN(S32V234_MSCR_PL4),
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S32V_PINCTRL_PIN(S32V234_MSCR_PL5),
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S32V_PINCTRL_PIN(S32V234_MSCR_PL8),
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S32V_PINCTRL_PIN(S32V234_IMCR_USDHC_CLK),
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S32V_PINCTRL_PIN(S32V234_IMCR_USDHC_CMD),
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S32V_PINCTRL_PIN(S32V234_IMCR_USDHC_DAT0),
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S32V_PINCTRL_PIN(S32V234_IMCR_USDHC_DAT1),
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S32V_PINCTRL_PIN(S32V234_IMCR_USDHC_DAT2),
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S32V_PINCTRL_PIN(S32V234_IMCR_USDHC_DAT3),
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S32V_PINCTRL_PIN(S32V234_IMCR_USDHC_DAT4),
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S32V_PINCTRL_PIN(S32V234_IMCR_USDHC_DAT5),
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S32V_PINCTRL_PIN(S32V234_IMCR_USDHC_DAT6),
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S32V_PINCTRL_PIN(S32V234_IMCR_USDHC_DAT7),
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S32V_PINCTRL_PIN(S32V234_IMCR_CAN_FD0_RXD),
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S32V_PINCTRL_PIN(S32V234_IMCR_CAN_FD1_RXD),
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S32V_PINCTRL_PIN(S32V234_IMCR_UART0_RXD),
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S32V_PINCTRL_PIN(S32V234_IMCR_UART1_RXD),
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S32V_PINCTRL_PIN(S32V234_IMCR_USDHC_WP),
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S32V_PINCTRL_PIN(S32V234_IMCR_Ethernet_RX_ER),
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S32V_PINCTRL_PIN(S32V234_IMCR_Ethernet_COL),
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S32V_PINCTRL_PIN(S32V234_IMCR_Ethernet_CRS),
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S32V_PINCTRL_PIN(S32V234_IMCR_Ethernet_RX_DV),
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S32V_PINCTRL_PIN(S32V234_IMCR_Ethernet_RX_D0),
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S32V_PINCTRL_PIN(S32V234_IMCR_Ethernet_RX_D1),
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S32V_PINCTRL_PIN(S32V234_IMCR_Ethernet_RX_D2),
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S32V_PINCTRL_PIN(S32V234_IMCR_Ethernet_RX_D3),
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S32V_PINCTRL_PIN(S32V234_IMCR_Ethernet_TX_CLK),
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S32V_PINCTRL_PIN(S32V234_IMCR_Ethernet_RX_CLK),
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S32V_PINCTRL_PIN(S32V234_IMCR_Ethernet_MDIO),
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S32V_PINCTRL_PIN(S32V234_IMCR_Ethernet_TIMER0),
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S32V_PINCTRL_PIN(S32V234_IMCR_Ethernet_TIMER1),
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S32V_PINCTRL_PIN(S32V234_IMCR_Ethernet_TIMER2),
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};
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static struct s32v_pinctrl_soc_info s32v234_pinctrl_info = {
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.pins = s32v234_pinctrl_pads,
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.npins = ARRAY_SIZE(s32v234_pinctrl_pads),
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};
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static const struct of_device_id s32v234_pinctrl_of_match[] = {
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{ .compatible = "fsl,s32v234-siul2", },
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, s32v234_pinctrl_of_match);
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static int s32v234_pinctrl_probe(struct platform_device *pdev)
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{
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return s32v_pinctrl_probe(pdev, &s32v234_pinctrl_info);
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}
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static struct platform_driver s32v234_pinctrl_driver = {
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.driver = {
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.name = "s32v234-siul2",
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.owner = THIS_MODULE,
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.of_match_table = s32v234_pinctrl_of_match,
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},
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.probe = s32v234_pinctrl_probe,
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.remove = s32v_pinctrl_remove,
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};
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module_platform_driver(s32v234_pinctrl_driver);
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MODULE_DESCRIPTION("Freescale S32V234 pinctrl driver");
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MODULE_LICENSE("GPL v2");
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