101 lines
2.7 KiB
C
101 lines
2.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright 2015-2016 Freescale Semiconductor, Inc.
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* Copyright 2017 NXP
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*/
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#ifndef _PFE_CTRL_H_
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#define _PFE_CTRL_H_
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#include <linux/dmapool.h>
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#include "pfe_mod.h"
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#include "pfe/pfe.h"
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#define DMA_BUF_SIZE_128 0x80 /* enough for 1 conntracks */
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#define DMA_BUF_SIZE_256 0x100
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/* enough for 2 conntracks, 1 bridge entry or 1 multicast entry */
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#define DMA_BUF_SIZE_512 0x200
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/* 512bytes dma allocated buffers used by rtp relay feature */
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#define DMA_BUF_MIN_ALIGNMENT 8
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#define DMA_BUF_BOUNDARY (4 * 1024)
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/* bursts can not cross 4k boundary */
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#define CMD_TX_ENABLE 0x0501
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#define CMD_TX_DISABLE 0x0502
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#define CMD_RX_LRO 0x0011
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#define CMD_PKTCAP_ENABLE 0x0d01
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#define CMD_QM_EXPT_RATE 0x020c
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#define CLASS_DM_SH_STATIC (0x800)
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#define CLASS_DM_CPU_TICKS (CLASS_DM_SH_STATIC)
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#define CLASS_DM_SYNC_MBOX (0x808)
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#define CLASS_DM_MSG_MBOX (0x810)
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#define CLASS_DM_DROP_CNTR (0x820)
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#define CLASS_DM_RESUME (0x854)
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#define CLASS_DM_PESTATUS (0x860)
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#define TMU_DM_SH_STATIC (0x80)
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#define TMU_DM_CPU_TICKS (TMU_DM_SH_STATIC)
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#define TMU_DM_SYNC_MBOX (0x88)
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#define TMU_DM_MSG_MBOX (0x90)
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#define TMU_DM_RESUME (0xA0)
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#define TMU_DM_PESTATUS (0xB0)
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#define TMU_DM_CONTEXT (0x300)
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#define TMU_DM_TX_TRANS (0x480)
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#define UTIL_DM_SH_STATIC (0x0)
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#define UTIL_DM_CPU_TICKS (UTIL_DM_SH_STATIC)
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#define UTIL_DM_SYNC_MBOX (0x8)
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#define UTIL_DM_MSG_MBOX (0x10)
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#define UTIL_DM_DROP_CNTR (0x20)
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#define UTIL_DM_RESUME (0x40)
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#define UTIL_DM_PESTATUS (0x50)
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struct pfe_ctrl {
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struct mutex mutex; /* to serialize pfe control access */
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spinlock_t lock;
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void *dma_pool;
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void *dma_pool_512;
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void *dma_pool_128;
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struct device *dev;
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void *hash_array_baseaddr; /*
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* Virtual base address of
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* the conntrack hash array
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*/
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unsigned long hash_array_phys_baseaddr; /*
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* Physical base address of
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* the conntrack hash array
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*/
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int (*event_cb)(u16, u16, u16*);
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unsigned long sync_mailbox_baseaddr[MAX_PE]; /*
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* Sync mailbox PFE
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* internal address,
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* initialized
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* when parsing elf images
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*/
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unsigned long msg_mailbox_baseaddr[MAX_PE]; /*
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* Msg mailbox PFE internal
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* address, initialized
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* when parsing elf images
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*/
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unsigned int sys_clk; /* AXI clock value, in KHz */
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};
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int pfe_ctrl_init(struct pfe *pfe);
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void pfe_ctrl_exit(struct pfe *pfe);
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int pe_sync_stop(struct pfe_ctrl *ctrl, int pe_mask);
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void pe_start(struct pfe_ctrl *ctrl, int pe_mask);
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int pe_reset_all(struct pfe_ctrl *ctrl);
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void pfe_ctrl_suspend(struct pfe_ctrl *ctrl);
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void pfe_ctrl_resume(struct pfe_ctrl *ctrl);
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int relax(unsigned long end);
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#endif /* _PFE_CTRL_H_ */
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