![Felipe Balbi](/assets/img/avatar_default.png)
Trivial cleanup patch. Signed-off-by: Felipe Balbi <felipe.balbi@nokia.com> Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
507 lines
12 KiB
C
507 lines
12 KiB
C
/*
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* omap_wdt.c
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*
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* Watchdog driver for the TI OMAP 16xx & 24xx/34xx 32KHz (non-secure) watchdog
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*
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* Author: MontaVista Software, Inc.
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* <gdavis@mvista.com> or <source@mvista.com>
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*
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* 2003 (c) MontaVista Software, Inc. This file is licensed under the
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* terms of the GNU General Public License version 2. This program is
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* licensed "as is" without any warranty of any kind, whether express
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* or implied.
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*
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* History:
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*
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* 20030527: George G. Davis <gdavis@mvista.com>
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* Initially based on linux-2.4.19-rmk7-pxa1/drivers/char/sa1100_wdt.c
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* (c) Copyright 2000 Oleg Drokin <green@crimea.edu>
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* Based on SoftDog driver by Alan Cox <alan@redhat.com>
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*
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* Copyright (c) 2004 Texas Instruments.
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* 1. Modified to support OMAP1610 32-KHz watchdog timer
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* 2. Ported to 2.6 kernel
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*
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* Copyright (c) 2005 David Brownell
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* Use the driver model and standard identifiers; handle bigger timeouts.
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*/
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/fs.h>
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#include <linux/mm.h>
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#include <linux/miscdevice.h>
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#include <linux/watchdog.h>
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#include <linux/reboot.h>
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#include <linux/init.h>
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#include <linux/err.h>
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#include <linux/platform_device.h>
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#include <linux/moduleparam.h>
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#include <linux/clk.h>
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#include <linux/bitops.h>
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#include <linux/io.h>
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#include <linux/uaccess.h>
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#include <mach/hardware.h>
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#include <mach/prcm.h>
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#include "omap_wdt.h"
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static struct platform_device *omap_wdt_dev;
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static unsigned timer_margin;
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module_param(timer_margin, uint, 0);
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MODULE_PARM_DESC(timer_margin, "initial watchdog timeout (in seconds)");
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static unsigned int wdt_trgr_pattern = 0x1234;
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static spinlock_t wdt_lock;
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struct omap_wdt_dev {
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void __iomem *base; /* physical */
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struct device *dev;
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int omap_wdt_users;
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struct clk *armwdt_ck;
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struct clk *mpu_wdt_ick;
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struct clk *mpu_wdt_fck;
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struct resource *mem;
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struct miscdevice omap_wdt_miscdev;
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};
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static void omap_wdt_ping(struct omap_wdt_dev *wdev)
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{
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void __iomem *base = wdev->base;
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/* wait for posted write to complete */
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while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x08)
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cpu_relax();
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wdt_trgr_pattern = ~wdt_trgr_pattern;
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__raw_writel(wdt_trgr_pattern, (base + OMAP_WATCHDOG_TGR));
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/* wait for posted write to complete */
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while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x08)
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cpu_relax();
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/* reloaded WCRR from WLDR */
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}
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static void omap_wdt_enable(struct omap_wdt_dev *wdev)
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{
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void __iomem *base = wdev->base;
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/* Sequence to enable the watchdog */
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__raw_writel(0xBBBB, base + OMAP_WATCHDOG_SPR);
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while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x10)
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cpu_relax();
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__raw_writel(0x4444, base + OMAP_WATCHDOG_SPR);
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while ((__raw_readl(base + OMAP_WATCHDOG_WPS)) & 0x10)
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cpu_relax();
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}
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static void omap_wdt_disable(struct omap_wdt_dev *wdev)
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{
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void __iomem *base = wdev->base;
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/* sequence required to disable watchdog */
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__raw_writel(0xAAAA, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */
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while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x10)
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cpu_relax();
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__raw_writel(0x5555, base + OMAP_WATCHDOG_SPR); /* TIMER_MODE */
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while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x10)
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cpu_relax();
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}
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static void omap_wdt_adjust_timeout(unsigned new_timeout)
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{
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if (new_timeout < TIMER_MARGIN_MIN)
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new_timeout = TIMER_MARGIN_DEFAULT;
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if (new_timeout > TIMER_MARGIN_MAX)
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new_timeout = TIMER_MARGIN_MAX;
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timer_margin = new_timeout;
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}
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static void omap_wdt_set_timeout(struct omap_wdt_dev *wdev)
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{
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u32 pre_margin = GET_WLDR_VAL(timer_margin);
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void __iomem *base = wdev->base;
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/* just count up at 32 KHz */
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while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x04)
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cpu_relax();
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__raw_writel(pre_margin, base + OMAP_WATCHDOG_LDR);
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while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x04)
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cpu_relax();
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}
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/*
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* Allow only one task to hold it open
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*/
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static int omap_wdt_open(struct inode *inode, struct file *file)
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{
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struct omap_wdt_dev *wdev = platform_get_drvdata(omap_wdt_dev);
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void __iomem *base = wdev->base;
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if (test_and_set_bit(1, (unsigned long *)&(wdev->omap_wdt_users)))
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return -EBUSY;
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if (cpu_is_omap16xx())
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clk_enable(wdev->armwdt_ck); /* Enable the clock */
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if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
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clk_enable(wdev->mpu_wdt_ick); /* Enable the interface clock */
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clk_enable(wdev->mpu_wdt_fck); /* Enable the functional clock */
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}
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/* initialize prescaler */
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while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x01)
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cpu_relax();
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__raw_writel((1 << 5) | (PTV << 2), base + OMAP_WATCHDOG_CNTRL);
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while (__raw_readl(base + OMAP_WATCHDOG_WPS) & 0x01)
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cpu_relax();
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file->private_data = (void *) wdev;
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omap_wdt_set_timeout(wdev);
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omap_wdt_enable(wdev);
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return nonseekable_open(inode, file);
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}
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static int omap_wdt_release(struct inode *inode, struct file *file)
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{
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struct omap_wdt_dev *wdev = file->private_data;
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/*
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* Shut off the timer unless NOWAYOUT is defined.
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*/
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#ifndef CONFIG_WATCHDOG_NOWAYOUT
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omap_wdt_disable(wdev);
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if (cpu_is_omap16xx())
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clk_disable(wdev->armwdt_ck); /* Disable the clock */
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if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
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clk_disable(wdev->mpu_wdt_ick); /* Disable the clock */
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clk_disable(wdev->mpu_wdt_fck); /* Disable the clock */
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}
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#else
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printk(KERN_CRIT "omap_wdt: Unexpected close, not stopping!\n");
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#endif
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wdev->omap_wdt_users = 0;
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return 0;
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}
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static ssize_t omap_wdt_write(struct file *file, const char __user *data,
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size_t len, loff_t *ppos)
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{
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struct omap_wdt_dev *wdev = file->private_data;
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/* Refresh LOAD_TIME. */
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if (len) {
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spin_lock(&wdt_lock);
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omap_wdt_ping(wdev);
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spin_unlock(&wdt_lock);
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}
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return len;
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}
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static long omap_wdt_ioctl(struct file *file, unsigned int cmd,
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unsigned long arg)
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{
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struct omap_wdt_dev *wdev;
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int new_margin;
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static const struct watchdog_info ident = {
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.identity = "OMAP Watchdog",
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.options = WDIOF_SETTIMEOUT,
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.firmware_version = 0,
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};
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wdev = file->private_data;
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switch (cmd) {
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case WDIOC_GETSUPPORT:
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return copy_to_user((struct watchdog_info __user *)arg, &ident,
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sizeof(ident));
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case WDIOC_GETSTATUS:
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return put_user(0, (int __user *)arg);
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case WDIOC_GETBOOTSTATUS:
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if (cpu_is_omap16xx())
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return put_user(__raw_readw(ARM_SYSST),
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(int __user *)arg);
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if (cpu_is_omap24xx())
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return put_user(omap_prcm_get_reset_sources(),
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(int __user *)arg);
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case WDIOC_KEEPALIVE:
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spin_lock(&wdt_lock);
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omap_wdt_ping(wdev);
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spin_unlock(&wdt_lock);
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return 0;
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case WDIOC_SETTIMEOUT:
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if (get_user(new_margin, (int __user *)arg))
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return -EFAULT;
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omap_wdt_adjust_timeout(new_margin);
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spin_lock(&wdt_lock);
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omap_wdt_disable(wdev);
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omap_wdt_set_timeout(wdev);
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omap_wdt_enable(wdev);
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omap_wdt_ping(wdev);
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spin_unlock(&wdt_lock);
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/* Fall */
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case WDIOC_GETTIMEOUT:
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return put_user(timer_margin, (int __user *)arg);
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default:
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return -ENOTTY;
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}
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}
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static const struct file_operations omap_wdt_fops = {
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.owner = THIS_MODULE,
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.write = omap_wdt_write,
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.unlocked_ioctl = omap_wdt_ioctl,
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.open = omap_wdt_open,
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.release = omap_wdt_release,
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};
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static int __init omap_wdt_probe(struct platform_device *pdev)
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{
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struct resource *res, *mem;
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struct omap_wdt_dev *wdev;
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int ret;
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/* reserve static register mappings */
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res) {
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ret = -ENOENT;
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goto err_get_resource;
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}
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if (omap_wdt_dev) {
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ret = -EBUSY;
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goto err_busy;
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}
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mem = request_mem_region(res->start, res->end - res->start + 1,
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pdev->name);
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if (!mem) {
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ret = -EBUSY;
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goto err_busy;
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}
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wdev = kzalloc(sizeof(struct omap_wdt_dev), GFP_KERNEL);
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if (!wdev) {
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ret = -ENOMEM;
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goto err_kzalloc;
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}
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wdev->omap_wdt_users = 0;
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wdev->mem = mem;
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if (cpu_is_omap16xx()) {
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wdev->armwdt_ck = clk_get(&pdev->dev, "armwdt_ck");
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if (IS_ERR(wdev->armwdt_ck)) {
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ret = PTR_ERR(wdev->armwdt_ck);
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wdev->armwdt_ck = NULL;
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goto err_clk;
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}
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}
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if (cpu_is_omap24xx()) {
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wdev->mpu_wdt_ick = clk_get(&pdev->dev, "mpu_wdt_ick");
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if (IS_ERR(wdev->mpu_wdt_ick)) {
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ret = PTR_ERR(wdev->mpu_wdt_ick);
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wdev->mpu_wdt_ick = NULL;
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goto err_clk;
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}
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wdev->mpu_wdt_fck = clk_get(&pdev->dev, "mpu_wdt_fck");
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if (IS_ERR(wdev->mpu_wdt_fck)) {
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ret = PTR_ERR(wdev->mpu_wdt_fck);
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wdev->mpu_wdt_fck = NULL;
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goto err_clk;
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}
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}
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if (cpu_is_omap34xx()) {
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wdev->mpu_wdt_ick = clk_get(&pdev->dev, "wdt2_ick");
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if (IS_ERR(wdev->mpu_wdt_ick)) {
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ret = PTR_ERR(wdev->mpu_wdt_ick);
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wdev->mpu_wdt_ick = NULL;
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goto err_clk;
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}
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wdev->mpu_wdt_fck = clk_get(&pdev->dev, "wdt2_fck");
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if (IS_ERR(wdev->mpu_wdt_fck)) {
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ret = PTR_ERR(wdev->mpu_wdt_fck);
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wdev->mpu_wdt_fck = NULL;
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goto err_clk;
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}
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}
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wdev->base = ioremap(res->start, res->end - res->start + 1);
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if (!wdev->base) {
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ret = -ENOMEM;
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goto err_ioremap;
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}
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platform_set_drvdata(pdev, wdev);
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omap_wdt_disable(wdev);
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omap_wdt_adjust_timeout(timer_margin);
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wdev->omap_wdt_miscdev.parent = &pdev->dev;
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wdev->omap_wdt_miscdev.minor = WATCHDOG_MINOR;
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wdev->omap_wdt_miscdev.name = "watchdog";
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wdev->omap_wdt_miscdev.fops = &omap_wdt_fops;
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ret = misc_register(&(wdev->omap_wdt_miscdev));
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if (ret)
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goto err_misc;
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pr_info("OMAP Watchdog Timer Rev 0x%02x: initial timeout %d sec\n",
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__raw_readl(wdev->base + OMAP_WATCHDOG_REV) & 0xFF,
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timer_margin);
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/* autogate OCP interface clock */
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__raw_writel(0x01, wdev->base + OMAP_WATCHDOG_SYS_CONFIG);
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omap_wdt_dev = pdev;
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return 0;
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err_misc:
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platform_set_drvdata(pdev, NULL);
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iounmap(wdev->base);
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err_ioremap:
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wdev->base = NULL;
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err_clk:
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if (wdev->armwdt_ck)
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clk_put(wdev->armwdt_ck);
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if (wdev->mpu_wdt_ick)
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clk_put(wdev->mpu_wdt_ick);
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if (wdev->mpu_wdt_fck)
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clk_put(wdev->mpu_wdt_fck);
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kfree(wdev);
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err_kzalloc:
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release_mem_region(res->start, res->end - res->start + 1);
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err_busy:
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err_get_resource:
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return ret;
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}
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static void omap_wdt_shutdown(struct platform_device *pdev)
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{
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struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
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if (wdev->omap_wdt_users)
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omap_wdt_disable(wdev);
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}
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static int omap_wdt_remove(struct platform_device *pdev)
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{
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struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
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struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res)
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return -ENOENT;
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misc_deregister(&(wdev->omap_wdt_miscdev));
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release_mem_region(res->start, res->end - res->start + 1);
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platform_set_drvdata(pdev, NULL);
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if (wdev->armwdt_ck) {
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clk_put(wdev->armwdt_ck);
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wdev->armwdt_ck = NULL;
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}
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if (wdev->mpu_wdt_ick) {
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clk_put(wdev->mpu_wdt_ick);
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wdev->mpu_wdt_ick = NULL;
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}
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if (wdev->mpu_wdt_fck) {
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clk_put(wdev->mpu_wdt_fck);
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wdev->mpu_wdt_fck = NULL;
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}
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iounmap(wdev->base);
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kfree(wdev);
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omap_wdt_dev = NULL;
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return 0;
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}
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#ifdef CONFIG_PM
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/* REVISIT ... not clear this is the best way to handle system suspend; and
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* it's very inappropriate for selective device suspend (e.g. suspending this
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* through sysfs rather than by stopping the watchdog daemon). Also, this
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* may not play well enough with NOWAYOUT...
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*/
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static int omap_wdt_suspend(struct platform_device *pdev, pm_message_t state)
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{
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struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
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if (wdev->omap_wdt_users)
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omap_wdt_disable(wdev);
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return 0;
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}
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static int omap_wdt_resume(struct platform_device *pdev)
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{
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struct omap_wdt_dev *wdev = platform_get_drvdata(pdev);
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if (wdev->omap_wdt_users) {
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omap_wdt_enable(wdev);
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omap_wdt_ping(wdev);
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}
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return 0;
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}
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#else
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#define omap_wdt_suspend NULL
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#define omap_wdt_resume NULL
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#endif
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static struct platform_driver omap_wdt_driver = {
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.probe = omap_wdt_probe,
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.remove = omap_wdt_remove,
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.shutdown = omap_wdt_shutdown,
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.suspend = omap_wdt_suspend,
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.resume = omap_wdt_resume,
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.driver = {
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.owner = THIS_MODULE,
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.name = "omap_wdt",
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},
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};
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static int __init omap_wdt_init(void)
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{
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spin_lock_init(&wdt_lock);
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return platform_driver_register(&omap_wdt_driver);
|
|
}
|
|
|
|
static void __exit omap_wdt_exit(void)
|
|
{
|
|
platform_driver_unregister(&omap_wdt_driver);
|
|
}
|
|
|
|
module_init(omap_wdt_init);
|
|
module_exit(omap_wdt_exit);
|
|
|
|
MODULE_AUTHOR("George G. Davis");
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
|
|
MODULE_ALIAS("platform:omap_wdt");
|