7781e61b5b
The TS-72xx/73xx boards have a CPLD watchdog which is configured to reset the board after 8 seconds, if the kernel is large enough that this takes about this time to decompress the kernel, we will encounter a spurious reboot. Do not pull ts72xx.h, but instead locally define what we need to disable the watchdog. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: H Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
95 lines
2.3 KiB
C
95 lines
2.3 KiB
C
/*
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* arch/arm/mach-ep93xx/include/mach/uncompress.h
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*
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* Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or (at
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* your option) any later version.
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*/
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#include <mach/ep93xx-regs.h>
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#include <asm/mach-types.h>
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static unsigned char __raw_readb(unsigned int ptr)
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{
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return *((volatile unsigned char *)ptr);
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}
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static unsigned int __raw_readl(unsigned int ptr)
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{
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return *((volatile unsigned int *)ptr);
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}
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static void __raw_writeb(unsigned char value, unsigned int ptr)
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{
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*((volatile unsigned char *)ptr) = value;
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}
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static void __raw_writel(unsigned int value, unsigned int ptr)
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{
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*((volatile unsigned int *)ptr) = value;
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}
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#define PHYS_UART_DATA (CONFIG_DEBUG_UART_PHYS + 0x00)
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#define PHYS_UART_FLAG (CONFIG_DEBUG_UART_PHYS + 0x18)
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#define UART_FLAG_TXFF 0x20
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static inline void putc(int c)
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{
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int i;
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for (i = 0; i < 10000; i++) {
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/* Transmit fifo not full? */
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if (!(__raw_readb(PHYS_UART_FLAG) & UART_FLAG_TXFF))
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break;
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}
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__raw_writeb(c, PHYS_UART_DATA);
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}
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static inline void flush(void)
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{
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}
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/*
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* Some bootloaders don't turn off DMA from the ethernet MAC before
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* jumping to linux, which means that we might end up with bits of RX
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* status and packet data scribbled over the uncompressed kernel image.
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* Work around this by resetting the ethernet MAC before we uncompress.
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*/
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#define PHYS_ETH_SELF_CTL 0x80010020
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#define ETH_SELF_CTL_RESET 0x00000001
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static void ethernet_reset(void)
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{
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unsigned int v;
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/* Reset the ethernet MAC. */
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v = __raw_readl(PHYS_ETH_SELF_CTL);
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__raw_writel(v | ETH_SELF_CTL_RESET, PHYS_ETH_SELF_CTL);
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/* Wait for reset to finish. */
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while (__raw_readl(PHYS_ETH_SELF_CTL) & ETH_SELF_CTL_RESET)
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;
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}
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#define TS72XX_WDT_CONTROL_PHYS_BASE 0x23800000
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#define TS72XX_WDT_FEED_PHYS_BASE 0x23c00000
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#define TS72XX_WDT_FEED_VAL 0x05
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static void __maybe_unused ts72xx_watchdog_disable(void)
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{
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__raw_writeb(TS72XX_WDT_FEED_VAL, TS72XX_WDT_FEED_PHYS_BASE);
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__raw_writeb(0, TS72XX_WDT_CONTROL_PHYS_BASE);
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}
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static void arch_decomp_setup(void)
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{
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if (machine_is_ts72xx())
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ts72xx_watchdog_disable();
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ethernet_reset();
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}
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