2e5f78aece
Provide RESET and Power regulators for the USB PHY, the USB Host port mode and the PHY device. Also provide pin multiplexer information for USB host pins. CC: Benoît Cousson <b-cousson@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
139 lines
3.3 KiB
Plaintext
139 lines
3.3 KiB
Plaintext
/*
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* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/dts-v1/;
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/include/ "omap3.dtsi"
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/ {
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model = "TI OMAP3 BeagleBoard";
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compatible = "ti,omap3-beagle", "ti,omap3";
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memory {
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device_type = "memory";
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reg = <0x80000000 0x10000000>; /* 256 MB */
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};
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leds {
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compatible = "gpio-leds";
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pmu_stat {
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label = "beagleboard::pmu_stat";
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gpios = <&twl_gpio 19 0>; /* LEDB */
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};
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heartbeat {
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label = "beagleboard::usr0";
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gpios = <&gpio5 22 0>; /* 150 -> D6 LED */
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linux,default-trigger = "heartbeat";
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};
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mmc {
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label = "beagleboard::usr1";
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gpios = <&gpio5 21 0>; /* 149 -> D7 LED */
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linux,default-trigger = "mmc0";
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};
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};
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/* HS USB Port 2 RESET */
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hsusb2_reset: hsusb2_reset_reg {
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compatible = "regulator-fixed";
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regulator-name = "hsusb2_reset";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio5 19 0>; /* gpio_147 */
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startup-delay-us = <70000>;
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enable-active-high;
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};
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/* HS USB Port 2 Power */
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hsusb2_power: hsusb2_power_reg {
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compatible = "regulator-fixed";
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regulator-name = "hsusb2_vbus";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&twl_gpio 18 0>; /* GPIO LEDA */
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startup-delay-us = <70000>;
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};
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/* HS USB Host PHY on PORT 2 */
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hsusb2_phy: hsusb2_phy {
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compatible = "usb-nop-xceiv";
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reset-supply = <&hsusb2_reset>;
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vcc-supply = <&hsusb2_power>;
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};
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};
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&omap3_pmx_core {
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pinctrl-names = "default";
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pinctrl-0 = <
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&hsusbb2_pins
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>;
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hsusbb2_pins: pinmux_hsusbb2_pins {
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pinctrl-single,pins = <
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0x5c0 0x3 /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_clk OUTPUT */
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0x5c2 0x3 /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_stp OUTPUT */
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0x5c4 0x10b /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dir INPUT | PULLDOWN */
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0x5c6 0x10b /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_nxt INPUT | PULLDOWN */
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0x5c8 0x10b /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat0 INPUT | PULLDOWN */
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0x5cA 0x10b /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat1 INPUT | PULLDOWN */
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0x1a4 0x10b /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat2 INPUT | PULLDOWN */
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0x1a6 0x10b /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat3 INPUT | PULLDOWN */
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0x1a8 0x10b /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat4 INPUT | PULLDOWN */
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0x1aa 0x10b /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat5 INPUT | PULLDOWN */
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0x1ac 0x10b /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat6 INPUT | PULLDOWN */
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0x1ae 0x10b /* USBB2_ULPITLL_CLK_MUXMODE.usbb1_ulpiphy_dat7 INPUT | PULLDOWN */
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>;
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};
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};
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&i2c1 {
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clock-frequency = <2600000>;
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twl: twl@48 {
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reg = <0x48>;
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interrupts = <7>; /* SYS_NIRQ cascaded to intc */
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interrupt-parent = <&intc>;
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};
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};
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/include/ "twl4030.dtsi"
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&mmc1 {
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vmmc-supply = <&vmmc1>;
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vmmc_aux-supply = <&vsim>;
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bus-width = <8>;
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};
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&mmc2 {
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status = "disabled";
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};
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&mmc3 {
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status = "disabled";
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};
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&usbhshost {
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port2-mode = "ehci-phy";
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};
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&usbhsehci {
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phys = <0 &hsusb2_phy>;
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};
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&twl_gpio {
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ti,use-leds;
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/* pullups: BIT(1) */
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ti,pullups = <0x000002>;
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/*
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* pulldowns:
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* BIT(2), BIT(6), BIT(7), BIT(8), BIT(13)
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* BIT(15), BIT(16), BIT(17)
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*/
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ti,pulldowns = <0x03a1c4>;
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};
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