alistair23-linux/arch/xtensa
Max Filippov 0376027051 xtensa: don't use l32r opcode directly
xtensa assembler is capable of representing register loads with either
movi + addmi, l32r or const16, depending on the core configuration.
Don't use '.literal' and 'l32r' directly in the code, use 'movi' and let
the assembler relax them.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2018-12-05 12:53:07 -08:00
..
boot xtensa: don't use l32r opcode directly 2018-12-05 12:53:07 -08:00
configs xtensa: drop unused {CONFIG,PLATFORM}_DEFAULT_MEM_SIZE 2018-08-20 12:27:52 -07:00
include xtensa: don't use l32r opcode directly 2018-12-05 12:53:07 -08:00
kernel xtensa: don't use l32r opcode directly 2018-12-05 12:53:07 -08:00
lib xtensa: add support for KASAN 2017-12-16 22:37:12 -08:00
mm Xtensa fixes and cleanups for v4.20: 2018-11-01 14:32:43 -07:00
oprofile License cleanup: add SPDX GPL-2.0 license identifier to files with no license 2017-11-02 11:10:55 +01:00
platforms memblock: stop using implicit alignment to SMP_CACHE_BYTES 2018-10-31 08:54:16 -07:00
variants xtensa: add test_kc705_be variant 2018-08-20 12:34:45 -07:00
Kconfig Xtensa fixes and cleanups for v4.20: 2018-11-01 14:32:43 -07:00
Kconfig.debug Kconfig: consolidate the "Kernel hacking" menu 2018-08-02 08:06:48 +09:00
Makefile xtensa: generate uapi header and syscall table header files 2018-12-02 23:45:41 -08:00