![Andres Salomon](/assets/img/avatar_default.png)
We weren't properly allocating the cmap for depths greater than 8bpp, which caused pain for things like DirectFB. Also, we never freed the cmap memory upon module unload.. Signed-off-by: Andres Salomon <dilinger@debian.org> Cc: Marco La Porta <marco-laporta@tiscali.it> Cc: Jordan Crouse <jordan@cosmicpenguin.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
550 lines
14 KiB
C
550 lines
14 KiB
C
/*
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* Geode GX framebuffer driver.
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*
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* Copyright (C) 2006 Arcom Control Systems Ltd.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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*
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* This driver assumes that the BIOS has created a virtual PCI device header
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* for the video device. The PCI header is assumed to contain the following
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* BARs:
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*
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* BAR0 - framebuffer memory
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* BAR1 - graphics processor registers
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* BAR2 - display controller registers
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* BAR3 - video processor and flat panel control registers.
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*
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* 16 MiB of framebuffer memory is assumed to be available.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/string.h>
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#include <linux/mm.h>
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#include <linux/slab.h>
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#include <linux/delay.h>
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#include <linux/fb.h>
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#include <linux/console.h>
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#include <linux/suspend.h>
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#include <linux/init.h>
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#include <linux/pci.h>
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#include <asm/geode.h>
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#include "gxfb.h"
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static char *mode_option;
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static int vram;
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static int vt_switch;
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/* Modes relevant to the GX (taken from modedb.c) */
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static struct fb_videomode gx_modedb[] __initdata = {
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/* 640x480-60 VESA */
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{ NULL, 60, 640, 480, 39682, 48, 16, 33, 10, 96, 2,
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0, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
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/* 640x480-75 VESA */
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{ NULL, 75, 640, 480, 31746, 120, 16, 16, 01, 64, 3,
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0, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
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/* 640x480-85 VESA */
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{ NULL, 85, 640, 480, 27777, 80, 56, 25, 01, 56, 3,
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0, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
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/* 800x600-60 VESA */
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{ NULL, 60, 800, 600, 25000, 88, 40, 23, 01, 128, 4,
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FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
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FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
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/* 800x600-75 VESA */
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{ NULL, 75, 800, 600, 20202, 160, 16, 21, 01, 80, 3,
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FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
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FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
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/* 800x600-85 VESA */
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{ NULL, 85, 800, 600, 17761, 152, 32, 27, 01, 64, 3,
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FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
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FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
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/* 1024x768-60 VESA */
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{ NULL, 60, 1024, 768, 15384, 160, 24, 29, 3, 136, 6,
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0, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
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/* 1024x768-75 VESA */
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{ NULL, 75, 1024, 768, 12690, 176, 16, 28, 1, 96, 3,
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FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
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FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
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/* 1024x768-85 VESA */
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{ NULL, 85, 1024, 768, 10582, 208, 48, 36, 1, 96, 3,
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FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
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FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
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/* 1280x960-60 VESA */
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{ NULL, 60, 1280, 960, 9259, 312, 96, 36, 1, 112, 3,
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FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
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FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
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/* 1280x960-85 VESA */
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{ NULL, 85, 1280, 960, 6734, 224, 64, 47, 1, 160, 3,
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FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
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FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
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/* 1280x1024-60 VESA */
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{ NULL, 60, 1280, 1024, 9259, 248, 48, 38, 1, 112, 3,
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FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
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FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
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/* 1280x1024-75 VESA */
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{ NULL, 75, 1280, 1024, 7407, 248, 16, 38, 1, 144, 3,
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FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
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FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
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/* 1280x1024-85 VESA */
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{ NULL, 85, 1280, 1024, 6349, 224, 64, 44, 1, 160, 3,
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FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
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FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
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/* 1600x1200-60 VESA */
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{ NULL, 60, 1600, 1200, 6172, 304, 64, 46, 1, 192, 3,
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FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
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FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
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/* 1600x1200-75 VESA */
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{ NULL, 75, 1600, 1200, 4938, 304, 64, 46, 1, 192, 3,
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FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
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FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
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/* 1600x1200-85 VESA */
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{ NULL, 85, 1600, 1200, 4357, 304, 64, 46, 1, 192, 3,
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FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
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FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
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};
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#ifdef CONFIG_OLPC
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#include <asm/olpc.h>
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static struct fb_videomode gx_dcon_modedb[] __initdata = {
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/* The only mode the DCON has is 1200x900 */
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{ NULL, 50, 1200, 900, 17460, 24, 8, 4, 5, 8, 3,
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FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
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FB_VMODE_NONINTERLACED, 0 }
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};
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static void __init get_modedb(struct fb_videomode **modedb, unsigned int *size)
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{
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if (olpc_has_dcon()) {
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*modedb = (struct fb_videomode *) gx_dcon_modedb;
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*size = ARRAY_SIZE(gx_dcon_modedb);
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} else {
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*modedb = (struct fb_videomode *) gx_modedb;
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*size = ARRAY_SIZE(gx_modedb);
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}
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}
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#else
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static void __init get_modedb(struct fb_videomode **modedb, unsigned int *size)
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{
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*modedb = (struct fb_videomode *) gx_modedb;
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*size = ARRAY_SIZE(gx_modedb);
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}
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#endif
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static int gxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
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{
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if (var->xres > 1600 || var->yres > 1200)
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return -EINVAL;
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if ((var->xres > 1280 || var->yres > 1024) && var->bits_per_pixel > 16)
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return -EINVAL;
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if (var->bits_per_pixel == 32) {
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var->red.offset = 16; var->red.length = 8;
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var->green.offset = 8; var->green.length = 8;
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var->blue.offset = 0; var->blue.length = 8;
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} else if (var->bits_per_pixel == 16) {
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var->red.offset = 11; var->red.length = 5;
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var->green.offset = 5; var->green.length = 6;
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var->blue.offset = 0; var->blue.length = 5;
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} else if (var->bits_per_pixel == 8) {
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var->red.offset = 0; var->red.length = 8;
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var->green.offset = 0; var->green.length = 8;
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var->blue.offset = 0; var->blue.length = 8;
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} else
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return -EINVAL;
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var->transp.offset = 0; var->transp.length = 0;
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/* Enough video memory? */
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if (gx_line_delta(var->xres, var->bits_per_pixel) * var->yres > info->fix.smem_len)
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return -EINVAL;
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/* FIXME: Check timing parameters here? */
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return 0;
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}
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static int gxfb_set_par(struct fb_info *info)
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{
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if (info->var.bits_per_pixel > 8)
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info->fix.visual = FB_VISUAL_TRUECOLOR;
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else
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info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
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info->fix.line_length = gx_line_delta(info->var.xres, info->var.bits_per_pixel);
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gx_set_mode(info);
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return 0;
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}
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static inline u_int chan_to_field(u_int chan, struct fb_bitfield *bf)
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{
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chan &= 0xffff;
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chan >>= 16 - bf->length;
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return chan << bf->offset;
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}
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static int gxfb_setcolreg(unsigned regno, unsigned red, unsigned green,
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unsigned blue, unsigned transp,
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struct fb_info *info)
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{
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if (info->var.grayscale) {
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/* grayscale = 0.30*R + 0.59*G + 0.11*B */
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red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
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}
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/* Truecolor has hardware independent palette */
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if (info->fix.visual == FB_VISUAL_TRUECOLOR) {
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u32 *pal = info->pseudo_palette;
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u32 v;
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if (regno >= 16)
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return -EINVAL;
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v = chan_to_field(red, &info->var.red);
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v |= chan_to_field(green, &info->var.green);
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v |= chan_to_field(blue, &info->var.blue);
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pal[regno] = v;
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} else {
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if (regno >= 256)
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return -EINVAL;
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gx_set_hw_palette_reg(info, regno, red, green, blue);
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}
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return 0;
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}
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static int gxfb_blank(int blank_mode, struct fb_info *info)
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{
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return gx_blank_display(info, blank_mode);
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}
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static int __init gxfb_map_video_memory(struct fb_info *info, struct pci_dev *dev)
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{
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struct gxfb_par *par = info->par;
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int ret;
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ret = pci_enable_device(dev);
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if (ret < 0)
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return ret;
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ret = pci_request_region(dev, 3, "gxfb (video processor)");
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if (ret < 0)
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return ret;
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par->vid_regs = pci_ioremap_bar(dev, 3);
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if (!par->vid_regs)
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return -ENOMEM;
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ret = pci_request_region(dev, 2, "gxfb (display controller)");
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if (ret < 0)
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return ret;
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par->dc_regs = pci_ioremap_bar(dev, 2);
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if (!par->dc_regs)
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return -ENOMEM;
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ret = pci_request_region(dev, 1, "gxfb (graphics processor)");
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if (ret < 0)
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return ret;
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par->gp_regs = pci_ioremap_bar(dev, 1);
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if (!par->gp_regs)
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return -ENOMEM;
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ret = pci_request_region(dev, 0, "gxfb (framebuffer)");
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if (ret < 0)
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return ret;
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info->fix.smem_start = pci_resource_start(dev, 0);
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info->fix.smem_len = vram ? vram : gx_frame_buffer_size();
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info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len);
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if (!info->screen_base)
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return -ENOMEM;
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/* Set the 16MiB aligned base address of the graphics memory region
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* in the display controller */
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write_dc(par, DC_GLIU0_MEM_OFFSET, info->fix.smem_start & 0xFF000000);
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dev_info(&dev->dev, "%d KiB of video memory at 0x%lx\n",
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info->fix.smem_len / 1024, info->fix.smem_start);
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return 0;
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}
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static struct fb_ops gxfb_ops = {
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.owner = THIS_MODULE,
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.fb_check_var = gxfb_check_var,
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.fb_set_par = gxfb_set_par,
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.fb_setcolreg = gxfb_setcolreg,
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.fb_blank = gxfb_blank,
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/* No HW acceleration for now. */
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.fb_fillrect = cfb_fillrect,
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.fb_copyarea = cfb_copyarea,
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.fb_imageblit = cfb_imageblit,
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};
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static struct fb_info * __init gxfb_init_fbinfo(struct device *dev)
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{
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struct gxfb_par *par;
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struct fb_info *info;
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/* Alloc enough space for the pseudo palette. */
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info = framebuffer_alloc(sizeof(struct gxfb_par) + sizeof(u32) * 16,
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dev);
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if (!info)
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return NULL;
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par = info->par;
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strcpy(info->fix.id, "Geode GX");
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info->fix.type = FB_TYPE_PACKED_PIXELS;
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info->fix.type_aux = 0;
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info->fix.xpanstep = 0;
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info->fix.ypanstep = 0;
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info->fix.ywrapstep = 0;
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info->fix.accel = FB_ACCEL_NONE;
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info->var.nonstd = 0;
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info->var.activate = FB_ACTIVATE_NOW;
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info->var.height = -1;
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info->var.width = -1;
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info->var.accel_flags = 0;
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info->var.vmode = FB_VMODE_NONINTERLACED;
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info->fbops = &gxfb_ops;
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info->flags = FBINFO_DEFAULT;
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info->node = -1;
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info->pseudo_palette = (void *)par + sizeof(struct gxfb_par);
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info->var.grayscale = 0;
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if (fb_alloc_cmap(&info->cmap, 256, 0) < 0) {
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framebuffer_release(info);
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return NULL;
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}
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return info;
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}
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#ifdef CONFIG_PM
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static int gxfb_suspend(struct pci_dev *pdev, pm_message_t state)
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{
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struct fb_info *info = pci_get_drvdata(pdev);
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if (state.event == PM_EVENT_SUSPEND) {
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acquire_console_sem();
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gx_powerdown(info);
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fb_set_suspend(info, 1);
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release_console_sem();
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}
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/* there's no point in setting PCI states; we emulate PCI, so
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* we don't end up getting power savings anyways */
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return 0;
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}
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static int gxfb_resume(struct pci_dev *pdev)
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{
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struct fb_info *info = pci_get_drvdata(pdev);
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int ret;
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acquire_console_sem();
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ret = gx_powerup(info);
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if (ret) {
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printk(KERN_ERR "gxfb: power up failed!\n");
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return ret;
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}
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fb_set_suspend(info, 0);
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release_console_sem();
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return 0;
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}
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#endif
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static int __init gxfb_probe(struct pci_dev *pdev, const struct pci_device_id *id)
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{
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struct gxfb_par *par;
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struct fb_info *info;
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int ret;
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unsigned long val;
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struct fb_videomode *modedb_ptr;
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unsigned int modedb_size;
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info = gxfb_init_fbinfo(&pdev->dev);
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if (!info)
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return -ENOMEM;
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par = info->par;
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if ((ret = gxfb_map_video_memory(info, pdev)) < 0) {
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dev_err(&pdev->dev, "failed to map frame buffer or controller registers\n");
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goto err;
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}
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/* Figure out if this is a TFT or CRT part */
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rdmsrl(MSR_GX_GLD_MSR_CONFIG, val);
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if ((val & MSR_GX_GLD_MSR_CONFIG_FP) == MSR_GX_GLD_MSR_CONFIG_FP)
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par->enable_crt = 0;
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else
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par->enable_crt = 1;
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get_modedb(&modedb_ptr, &modedb_size);
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ret = fb_find_mode(&info->var, info, mode_option,
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modedb_ptr, modedb_size, NULL, 16);
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if (ret == 0 || ret == 4) {
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dev_err(&pdev->dev, "could not find valid video mode\n");
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ret = -EINVAL;
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goto err;
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}
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/* Clear the frame buffer of garbage. */
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memset_io(info->screen_base, 0, info->fix.smem_len);
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gxfb_check_var(&info->var, info);
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gxfb_set_par(info);
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pm_set_vt_switch(vt_switch);
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if (register_framebuffer(info) < 0) {
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ret = -EINVAL;
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goto err;
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}
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pci_set_drvdata(pdev, info);
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printk(KERN_INFO "fb%d: %s frame buffer device\n", info->node, info->fix.id);
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return 0;
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err:
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if (info->screen_base) {
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iounmap(info->screen_base);
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pci_release_region(pdev, 0);
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}
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if (par->vid_regs) {
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iounmap(par->vid_regs);
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pci_release_region(pdev, 3);
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}
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if (par->dc_regs) {
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iounmap(par->dc_regs);
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pci_release_region(pdev, 2);
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}
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if (par->gp_regs) {
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iounmap(par->gp_regs);
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pci_release_region(pdev, 1);
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}
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if (info) {
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fb_dealloc_cmap(&info->cmap);
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framebuffer_release(info);
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}
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return ret;
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}
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static void gxfb_remove(struct pci_dev *pdev)
|
|
{
|
|
struct fb_info *info = pci_get_drvdata(pdev);
|
|
struct gxfb_par *par = info->par;
|
|
|
|
unregister_framebuffer(info);
|
|
|
|
iounmap((void __iomem *)info->screen_base);
|
|
pci_release_region(pdev, 0);
|
|
|
|
iounmap(par->vid_regs);
|
|
pci_release_region(pdev, 3);
|
|
|
|
iounmap(par->dc_regs);
|
|
pci_release_region(pdev, 2);
|
|
|
|
iounmap(par->gp_regs);
|
|
pci_release_region(pdev, 1);
|
|
|
|
fb_dealloc_cmap(&info->cmap);
|
|
pci_set_drvdata(pdev, NULL);
|
|
|
|
framebuffer_release(info);
|
|
}
|
|
|
|
static struct pci_device_id gxfb_id_table[] = {
|
|
{ PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_GX_VIDEO) },
|
|
{ 0, }
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(pci, gxfb_id_table);
|
|
|
|
static struct pci_driver gxfb_driver = {
|
|
.name = "gxfb",
|
|
.id_table = gxfb_id_table,
|
|
.probe = gxfb_probe,
|
|
.remove = gxfb_remove,
|
|
#ifdef CONFIG_PM
|
|
.suspend = gxfb_suspend,
|
|
.resume = gxfb_resume,
|
|
#endif
|
|
};
|
|
|
|
#ifndef MODULE
|
|
static int __init gxfb_setup(char *options)
|
|
{
|
|
|
|
char *opt;
|
|
|
|
if (!options || !*options)
|
|
return 0;
|
|
|
|
while ((opt = strsep(&options, ",")) != NULL) {
|
|
if (!*opt)
|
|
continue;
|
|
|
|
mode_option = opt;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
static int __init gxfb_init(void)
|
|
{
|
|
#ifndef MODULE
|
|
char *option = NULL;
|
|
|
|
if (fb_get_options("gxfb", &option))
|
|
return -ENODEV;
|
|
|
|
gxfb_setup(option);
|
|
#endif
|
|
return pci_register_driver(&gxfb_driver);
|
|
}
|
|
|
|
static void __exit gxfb_cleanup(void)
|
|
{
|
|
pci_unregister_driver(&gxfb_driver);
|
|
}
|
|
|
|
module_init(gxfb_init);
|
|
module_exit(gxfb_cleanup);
|
|
|
|
module_param(mode_option, charp, 0);
|
|
MODULE_PARM_DESC(mode_option, "video mode (<x>x<y>[-<bpp>][@<refr>])");
|
|
|
|
module_param(vram, int, 0);
|
|
MODULE_PARM_DESC(vram, "video memory size");
|
|
|
|
module_param(vt_switch, int, 0);
|
|
MODULE_PARM_DESC(vt_switch, "enable VT switch during suspend/resume");
|
|
|
|
MODULE_DESCRIPTION("Framebuffer driver for the AMD Geode GX");
|
|
MODULE_LICENSE("GPL");
|