eb627e1772
Any hardware that can potentially generate DMA has to be locked down in order to avoid it being possible for an attacker to modify kernel code, allowing them to circumvent disabled module loading or module signing. Default to paranoid - in future we can potentially relax this for sufficiently IOMMU-isolated devices. Signed-off-by: David Howells <dhowells@redhat.com> Signed-off-by: Matthew Garrett <mjg59@google.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Kees Cook <keescook@chromium.org> cc: linux-pci@vger.kernel.org Signed-off-by: James Morris <jmorris@namei.org>
137 lines
2.8 KiB
C
137 lines
2.8 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* For architectures where we want to allow direct access to the PCI config
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* stuff - it would probably be preferable on PCs too, but there people
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* just do it by hand with the magic northbridge registers.
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*/
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#include <linux/errno.h>
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#include <linux/pci.h>
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#include <linux/security.h>
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#include <linux/syscalls.h>
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#include <linux/uaccess.h>
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#include "pci.h"
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SYSCALL_DEFINE5(pciconfig_read, unsigned long, bus, unsigned long, dfn,
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unsigned long, off, unsigned long, len, void __user *, buf)
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{
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struct pci_dev *dev;
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u8 byte;
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u16 word;
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u32 dword;
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long err;
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long cfg_ret;
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if (!capable(CAP_SYS_ADMIN))
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return -EPERM;
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err = -ENODEV;
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dev = pci_get_domain_bus_and_slot(0, bus, dfn);
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if (!dev)
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goto error;
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switch (len) {
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case 1:
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cfg_ret = pci_user_read_config_byte(dev, off, &byte);
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break;
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case 2:
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cfg_ret = pci_user_read_config_word(dev, off, &word);
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break;
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case 4:
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cfg_ret = pci_user_read_config_dword(dev, off, &dword);
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break;
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default:
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err = -EINVAL;
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goto error;
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}
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err = -EIO;
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if (cfg_ret != PCIBIOS_SUCCESSFUL)
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goto error;
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switch (len) {
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case 1:
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err = put_user(byte, (unsigned char __user *)buf);
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break;
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case 2:
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err = put_user(word, (unsigned short __user *)buf);
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break;
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case 4:
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err = put_user(dword, (unsigned int __user *)buf);
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break;
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}
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pci_dev_put(dev);
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return err;
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error:
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/* ??? XFree86 doesn't even check the return value. They
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just look for 0xffffffff in the output, since that's what
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they get instead of a machine check on x86. */
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switch (len) {
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case 1:
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put_user(-1, (unsigned char __user *)buf);
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break;
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case 2:
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put_user(-1, (unsigned short __user *)buf);
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break;
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case 4:
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put_user(-1, (unsigned int __user *)buf);
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break;
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}
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pci_dev_put(dev);
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return err;
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}
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SYSCALL_DEFINE5(pciconfig_write, unsigned long, bus, unsigned long, dfn,
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unsigned long, off, unsigned long, len, void __user *, buf)
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{
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struct pci_dev *dev;
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u8 byte;
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u16 word;
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u32 dword;
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int err = 0;
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if (!capable(CAP_SYS_ADMIN) ||
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security_locked_down(LOCKDOWN_PCI_ACCESS))
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return -EPERM;
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dev = pci_get_domain_bus_and_slot(0, bus, dfn);
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if (!dev)
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return -ENODEV;
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switch (len) {
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case 1:
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err = get_user(byte, (u8 __user *)buf);
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if (err)
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break;
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err = pci_user_write_config_byte(dev, off, byte);
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if (err != PCIBIOS_SUCCESSFUL)
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err = -EIO;
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break;
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case 2:
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err = get_user(word, (u16 __user *)buf);
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if (err)
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break;
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err = pci_user_write_config_word(dev, off, word);
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if (err != PCIBIOS_SUCCESSFUL)
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err = -EIO;
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break;
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case 4:
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err = get_user(dword, (u32 __user *)buf);
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if (err)
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break;
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err = pci_user_write_config_dword(dev, off, dword);
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if (err != PCIBIOS_SUCCESSFUL)
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err = -EIO;
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break;
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default:
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err = -EINVAL;
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break;
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}
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pci_dev_put(dev);
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return err;
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}
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