634e11d5b4
Depending on the IP version, TSENS supports upper, lower and critical threshold interrupts. We only add support for upper and lower threshold interrupts for now. TSENSv2 has an irq [status|clear|mask] bit tuple for each sensor while earlier versions only have a single bit per sensor to denote status and clear. These differences are handled transparently by the interrupt handler. At each interrupt, we reprogram the new upper and lower threshold in the .set_trip callback. Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/7508ba143f144407e5dd546107ddae65c380a76f.1572526427.git.amit.kucheria@linaro.org
97 lines
3.2 KiB
C
97 lines
3.2 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2015, The Linux Foundation. All rights reserved.
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* Copyright (c) 2018, Linaro Limited
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*/
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#include <linux/bitops.h>
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#include <linux/regmap.h>
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#include "tsens.h"
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/* ----- SROT ------ */
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#define SROT_HW_VER_OFF 0x0000
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#define SROT_CTRL_OFF 0x0004
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/* ----- TM ------ */
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#define TM_INT_EN_OFF 0x0004
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#define TM_UPPER_LOWER_INT_STATUS_OFF 0x0008
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#define TM_UPPER_LOWER_INT_CLEAR_OFF 0x000c
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#define TM_UPPER_LOWER_INT_MASK_OFF 0x0010
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#define TM_CRITICAL_INT_STATUS_OFF 0x0014
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#define TM_CRITICAL_INT_CLEAR_OFF 0x0018
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#define TM_CRITICAL_INT_MASK_OFF 0x001c
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#define TM_Sn_UPPER_LOWER_THRESHOLD_OFF 0x0020
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#define TM_Sn_CRITICAL_THRESHOLD_OFF 0x0060
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#define TM_Sn_STATUS_OFF 0x00a0
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#define TM_TRDY_OFF 0x00e4
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/* v2.x: 8996, 8998, sdm845 */
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static const struct tsens_features tsens_v2_feat = {
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.ver_major = VER_2_X,
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.crit_int = 1,
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.adc = 0,
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.srot_split = 1,
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.max_sensors = 16,
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};
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static const struct reg_field tsens_v2_regfields[MAX_REGFIELDS] = {
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/* ----- SROT ------ */
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/* VERSION */
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[VER_MAJOR] = REG_FIELD(SROT_HW_VER_OFF, 28, 31),
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[VER_MINOR] = REG_FIELD(SROT_HW_VER_OFF, 16, 27),
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[VER_STEP] = REG_FIELD(SROT_HW_VER_OFF, 0, 15),
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/* CTRL_OFF */
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[TSENS_EN] = REG_FIELD(SROT_CTRL_OFF, 0, 0),
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[TSENS_SW_RST] = REG_FIELD(SROT_CTRL_OFF, 1, 1),
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/* ----- TM ------ */
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/* INTERRUPT ENABLE */
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/* v2 has separate enables for UPPER/LOWER/CRITICAL interrupts */
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[INT_EN] = REG_FIELD(TM_INT_EN_OFF, 0, 2),
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/* TEMPERATURE THRESHOLDS */
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REG_FIELD_FOR_EACH_SENSOR16(LOW_THRESH, TM_Sn_UPPER_LOWER_THRESHOLD_OFF, 0, 11),
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REG_FIELD_FOR_EACH_SENSOR16(UP_THRESH, TM_Sn_UPPER_LOWER_THRESHOLD_OFF, 12, 23),
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/* INTERRUPTS [CLEAR/STATUS/MASK] */
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REG_FIELD_SPLIT_BITS_0_15(LOW_INT_STATUS, TM_UPPER_LOWER_INT_STATUS_OFF),
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REG_FIELD_SPLIT_BITS_0_15(LOW_INT_CLEAR, TM_UPPER_LOWER_INT_CLEAR_OFF),
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REG_FIELD_SPLIT_BITS_0_15(LOW_INT_MASK, TM_UPPER_LOWER_INT_MASK_OFF),
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REG_FIELD_SPLIT_BITS_16_31(UP_INT_STATUS, TM_UPPER_LOWER_INT_STATUS_OFF),
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REG_FIELD_SPLIT_BITS_16_31(UP_INT_CLEAR, TM_UPPER_LOWER_INT_CLEAR_OFF),
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REG_FIELD_SPLIT_BITS_16_31(UP_INT_MASK, TM_UPPER_LOWER_INT_MASK_OFF),
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/* Sn_STATUS */
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REG_FIELD_FOR_EACH_SENSOR16(LAST_TEMP, TM_Sn_STATUS_OFF, 0, 11),
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REG_FIELD_FOR_EACH_SENSOR16(VALID, TM_Sn_STATUS_OFF, 21, 21),
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/* xxx_STATUS bits: 1 == threshold violated */
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REG_FIELD_FOR_EACH_SENSOR16(MIN_STATUS, TM_Sn_STATUS_OFF, 16, 16),
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REG_FIELD_FOR_EACH_SENSOR16(LOWER_STATUS, TM_Sn_STATUS_OFF, 17, 17),
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REG_FIELD_FOR_EACH_SENSOR16(UPPER_STATUS, TM_Sn_STATUS_OFF, 18, 18),
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REG_FIELD_FOR_EACH_SENSOR16(CRITICAL_STATUS, TM_Sn_STATUS_OFF, 19, 19),
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REG_FIELD_FOR_EACH_SENSOR16(MAX_STATUS, TM_Sn_STATUS_OFF, 20, 20),
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/* TRDY: 1=ready, 0=in progress */
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[TRDY] = REG_FIELD(TM_TRDY_OFF, 0, 0),
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};
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static const struct tsens_ops ops_generic_v2 = {
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.init = init_common,
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.get_temp = get_temp_tsens_valid,
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};
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const struct tsens_plat_data data_tsens_v2 = {
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.ops = &ops_generic_v2,
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.feat = &tsens_v2_feat,
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.fields = tsens_v2_regfields,
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};
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/* Kept around for backward compatibility with old msm8996.dtsi */
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const struct tsens_plat_data data_8996 = {
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.num_sensors = 13,
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.ops = &ops_generic_v2,
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.feat = &tsens_v2_feat,
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.fields = tsens_v2_regfields,
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};
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