![AngeloGioacchino Del Regno](/assets/img/avatar_default.png)
Add support for reading calibrated value from thermistors in MSM8956, MSM8976 and their APQ variants. Signed-off-by: AngeloGioacchino Del Regno <kholk11@gmail.com> Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Link: https://lore.kernel.org/r/20191005104133.30297-2-kholk11@gmail.com
517 lines
14 KiB
C
517 lines
14 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2015, The Linux Foundation. All rights reserved.
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*/
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#ifndef __QCOM_TSENS_H__
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#define __QCOM_TSENS_H__
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#define ONE_PT_CALIB 0x1
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#define ONE_PT_CALIB2 0x2
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#define TWO_PT_CALIB 0x3
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#define CAL_DEGC_PT1 30
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#define CAL_DEGC_PT2 120
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#define SLOPE_FACTOR 1000
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#define SLOPE_DEFAULT 3200
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#define THRESHOLD_MAX_ADC_CODE 0x3ff
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#define THRESHOLD_MIN_ADC_CODE 0x0
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#include <linux/interrupt.h>
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#include <linux/thermal.h>
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#include <linux/regmap.h>
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#include <linux/slab.h>
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struct tsens_priv;
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enum tsens_ver {
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VER_0_1 = 0,
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VER_1_X,
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VER_2_X,
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};
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enum tsens_irq_type {
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LOWER,
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UPPER,
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};
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/**
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* struct tsens_sensor - data for each sensor connected to the tsens device
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* @priv: tsens device instance that this sensor is connected to
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* @tzd: pointer to the thermal zone that this sensor is in
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* @offset: offset of temperature adjustment curve
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* @hw_id: HW ID can be used in case of platform-specific IDs
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* @slope: slope of temperature adjustment curve
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* @status: 8960-specific variable to track 8960 and 8660 status register offset
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*/
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struct tsens_sensor {
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struct tsens_priv *priv;
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struct thermal_zone_device *tzd;
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int offset;
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unsigned int hw_id;
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int slope;
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u32 status;
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};
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/**
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* struct tsens_ops - operations as supported by the tsens device
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* @init: Function to initialize the tsens device
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* @calibrate: Function to calibrate the tsens device
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* @get_temp: Function which returns the temp in millidegC
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* @enable: Function to enable (clocks/power) tsens device
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* @disable: Function to disable the tsens device
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* @suspend: Function to suspend the tsens device
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* @resume: Function to resume the tsens device
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* @get_trend: Function to get the thermal/temp trend
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*/
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struct tsens_ops {
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/* mandatory callbacks */
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int (*init)(struct tsens_priv *priv);
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int (*calibrate)(struct tsens_priv *priv);
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int (*get_temp)(struct tsens_sensor *s, int *temp);
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/* optional callbacks */
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int (*enable)(struct tsens_priv *priv, int i);
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void (*disable)(struct tsens_priv *priv);
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int (*suspend)(struct tsens_priv *priv);
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int (*resume)(struct tsens_priv *priv);
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int (*get_trend)(struct tsens_sensor *s, enum thermal_trend *trend);
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};
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#define REG_FIELD_FOR_EACH_SENSOR11(_name, _offset, _startbit, _stopbit) \
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[_name##_##0] = REG_FIELD(_offset, _startbit, _stopbit), \
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[_name##_##1] = REG_FIELD(_offset + 4, _startbit, _stopbit), \
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[_name##_##2] = REG_FIELD(_offset + 8, _startbit, _stopbit), \
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[_name##_##3] = REG_FIELD(_offset + 12, _startbit, _stopbit), \
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[_name##_##4] = REG_FIELD(_offset + 16, _startbit, _stopbit), \
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[_name##_##5] = REG_FIELD(_offset + 20, _startbit, _stopbit), \
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[_name##_##6] = REG_FIELD(_offset + 24, _startbit, _stopbit), \
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[_name##_##7] = REG_FIELD(_offset + 28, _startbit, _stopbit), \
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[_name##_##8] = REG_FIELD(_offset + 32, _startbit, _stopbit), \
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[_name##_##9] = REG_FIELD(_offset + 36, _startbit, _stopbit), \
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[_name##_##10] = REG_FIELD(_offset + 40, _startbit, _stopbit)
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#define REG_FIELD_FOR_EACH_SENSOR16(_name, _offset, _startbit, _stopbit) \
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[_name##_##0] = REG_FIELD(_offset, _startbit, _stopbit), \
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[_name##_##1] = REG_FIELD(_offset + 4, _startbit, _stopbit), \
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[_name##_##2] = REG_FIELD(_offset + 8, _startbit, _stopbit), \
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[_name##_##3] = REG_FIELD(_offset + 12, _startbit, _stopbit), \
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[_name##_##4] = REG_FIELD(_offset + 16, _startbit, _stopbit), \
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[_name##_##5] = REG_FIELD(_offset + 20, _startbit, _stopbit), \
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[_name##_##6] = REG_FIELD(_offset + 24, _startbit, _stopbit), \
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[_name##_##7] = REG_FIELD(_offset + 28, _startbit, _stopbit), \
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[_name##_##8] = REG_FIELD(_offset + 32, _startbit, _stopbit), \
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[_name##_##9] = REG_FIELD(_offset + 36, _startbit, _stopbit), \
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[_name##_##10] = REG_FIELD(_offset + 40, _startbit, _stopbit), \
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[_name##_##11] = REG_FIELD(_offset + 44, _startbit, _stopbit), \
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[_name##_##12] = REG_FIELD(_offset + 48, _startbit, _stopbit), \
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[_name##_##13] = REG_FIELD(_offset + 52, _startbit, _stopbit), \
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[_name##_##14] = REG_FIELD(_offset + 56, _startbit, _stopbit), \
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[_name##_##15] = REG_FIELD(_offset + 60, _startbit, _stopbit)
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#define REG_FIELD_SPLIT_BITS_0_15(_name, _offset) \
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[_name##_##0] = REG_FIELD(_offset, 0, 0), \
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[_name##_##1] = REG_FIELD(_offset, 1, 1), \
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[_name##_##2] = REG_FIELD(_offset, 2, 2), \
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[_name##_##3] = REG_FIELD(_offset, 3, 3), \
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[_name##_##4] = REG_FIELD(_offset, 4, 4), \
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[_name##_##5] = REG_FIELD(_offset, 5, 5), \
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[_name##_##6] = REG_FIELD(_offset, 6, 6), \
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[_name##_##7] = REG_FIELD(_offset, 7, 7), \
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[_name##_##8] = REG_FIELD(_offset, 8, 8), \
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[_name##_##9] = REG_FIELD(_offset, 9, 9), \
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[_name##_##10] = REG_FIELD(_offset, 10, 10), \
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[_name##_##11] = REG_FIELD(_offset, 11, 11), \
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[_name##_##12] = REG_FIELD(_offset, 12, 12), \
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[_name##_##13] = REG_FIELD(_offset, 13, 13), \
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[_name##_##14] = REG_FIELD(_offset, 14, 14), \
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[_name##_##15] = REG_FIELD(_offset, 15, 15)
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#define REG_FIELD_SPLIT_BITS_16_31(_name, _offset) \
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[_name##_##0] = REG_FIELD(_offset, 16, 16), \
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[_name##_##1] = REG_FIELD(_offset, 17, 17), \
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[_name##_##2] = REG_FIELD(_offset, 18, 18), \
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[_name##_##3] = REG_FIELD(_offset, 19, 19), \
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[_name##_##4] = REG_FIELD(_offset, 20, 20), \
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[_name##_##5] = REG_FIELD(_offset, 21, 21), \
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[_name##_##6] = REG_FIELD(_offset, 22, 22), \
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[_name##_##7] = REG_FIELD(_offset, 23, 23), \
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[_name##_##8] = REG_FIELD(_offset, 24, 24), \
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[_name##_##9] = REG_FIELD(_offset, 25, 25), \
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[_name##_##10] = REG_FIELD(_offset, 26, 26), \
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[_name##_##11] = REG_FIELD(_offset, 27, 27), \
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[_name##_##12] = REG_FIELD(_offset, 28, 28), \
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[_name##_##13] = REG_FIELD(_offset, 29, 29), \
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[_name##_##14] = REG_FIELD(_offset, 30, 30), \
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[_name##_##15] = REG_FIELD(_offset, 31, 31)
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/*
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* reg_field IDs to use as an index into an array
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* If you change the order of the entries, check the devm_regmap_field_alloc()
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* calls in init_common()
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*/
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enum regfield_ids {
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/* ----- SROT ------ */
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/* HW_VER */
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VER_MAJOR,
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VER_MINOR,
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VER_STEP,
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/* CTRL_OFFSET */
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TSENS_EN,
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TSENS_SW_RST,
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SENSOR_EN,
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CODE_OR_TEMP,
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/* ----- TM ------ */
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/* TRDY */
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TRDY,
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/* INTERRUPT ENABLE */
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INT_EN, /* v2+ has separate enables for crit, upper and lower irq */
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/* STATUS */
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LAST_TEMP_0, /* Last temperature reading */
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LAST_TEMP_1,
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LAST_TEMP_2,
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LAST_TEMP_3,
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LAST_TEMP_4,
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LAST_TEMP_5,
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LAST_TEMP_6,
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LAST_TEMP_7,
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LAST_TEMP_8,
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LAST_TEMP_9,
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LAST_TEMP_10,
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LAST_TEMP_11,
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LAST_TEMP_12,
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LAST_TEMP_13,
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LAST_TEMP_14,
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LAST_TEMP_15,
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VALID_0, /* VALID reading or not */
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VALID_1,
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VALID_2,
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VALID_3,
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VALID_4,
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VALID_5,
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VALID_6,
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VALID_7,
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VALID_8,
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VALID_9,
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VALID_10,
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VALID_11,
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VALID_12,
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VALID_13,
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VALID_14,
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VALID_15,
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LOWER_STATUS_0, /* LOWER threshold violated */
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LOWER_STATUS_1,
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LOWER_STATUS_2,
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LOWER_STATUS_3,
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LOWER_STATUS_4,
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LOWER_STATUS_5,
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LOWER_STATUS_6,
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LOWER_STATUS_7,
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LOWER_STATUS_8,
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LOWER_STATUS_9,
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LOWER_STATUS_10,
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LOWER_STATUS_11,
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LOWER_STATUS_12,
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LOWER_STATUS_13,
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LOWER_STATUS_14,
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LOWER_STATUS_15,
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LOW_INT_STATUS_0, /* LOWER interrupt status */
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LOW_INT_STATUS_1,
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LOW_INT_STATUS_2,
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LOW_INT_STATUS_3,
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LOW_INT_STATUS_4,
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LOW_INT_STATUS_5,
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LOW_INT_STATUS_6,
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LOW_INT_STATUS_7,
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LOW_INT_STATUS_8,
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LOW_INT_STATUS_9,
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LOW_INT_STATUS_10,
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LOW_INT_STATUS_11,
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LOW_INT_STATUS_12,
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LOW_INT_STATUS_13,
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LOW_INT_STATUS_14,
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LOW_INT_STATUS_15,
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LOW_INT_CLEAR_0, /* LOWER interrupt clear */
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LOW_INT_CLEAR_1,
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LOW_INT_CLEAR_2,
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LOW_INT_CLEAR_3,
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LOW_INT_CLEAR_4,
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LOW_INT_CLEAR_5,
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LOW_INT_CLEAR_6,
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LOW_INT_CLEAR_7,
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LOW_INT_CLEAR_8,
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LOW_INT_CLEAR_9,
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LOW_INT_CLEAR_10,
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LOW_INT_CLEAR_11,
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LOW_INT_CLEAR_12,
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LOW_INT_CLEAR_13,
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LOW_INT_CLEAR_14,
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LOW_INT_CLEAR_15,
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LOW_INT_MASK_0, /* LOWER interrupt mask */
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LOW_INT_MASK_1,
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LOW_INT_MASK_2,
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LOW_INT_MASK_3,
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LOW_INT_MASK_4,
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LOW_INT_MASK_5,
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LOW_INT_MASK_6,
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LOW_INT_MASK_7,
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LOW_INT_MASK_8,
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LOW_INT_MASK_9,
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LOW_INT_MASK_10,
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LOW_INT_MASK_11,
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LOW_INT_MASK_12,
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LOW_INT_MASK_13,
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LOW_INT_MASK_14,
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LOW_INT_MASK_15,
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LOW_THRESH_0, /* LOWER threshold values */
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LOW_THRESH_1,
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LOW_THRESH_2,
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LOW_THRESH_3,
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LOW_THRESH_4,
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LOW_THRESH_5,
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LOW_THRESH_6,
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LOW_THRESH_7,
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LOW_THRESH_8,
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LOW_THRESH_9,
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LOW_THRESH_10,
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LOW_THRESH_11,
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LOW_THRESH_12,
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LOW_THRESH_13,
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LOW_THRESH_14,
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LOW_THRESH_15,
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UPPER_STATUS_0, /* UPPER threshold violated */
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UPPER_STATUS_1,
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UPPER_STATUS_2,
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UPPER_STATUS_3,
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UPPER_STATUS_4,
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UPPER_STATUS_5,
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UPPER_STATUS_6,
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UPPER_STATUS_7,
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UPPER_STATUS_8,
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UPPER_STATUS_9,
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UPPER_STATUS_10,
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UPPER_STATUS_11,
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UPPER_STATUS_12,
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UPPER_STATUS_13,
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UPPER_STATUS_14,
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UPPER_STATUS_15,
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UP_INT_STATUS_0, /* UPPER interrupt status */
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UP_INT_STATUS_1,
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UP_INT_STATUS_2,
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UP_INT_STATUS_3,
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UP_INT_STATUS_4,
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UP_INT_STATUS_5,
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UP_INT_STATUS_6,
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UP_INT_STATUS_7,
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UP_INT_STATUS_8,
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UP_INT_STATUS_9,
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UP_INT_STATUS_10,
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UP_INT_STATUS_11,
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UP_INT_STATUS_12,
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UP_INT_STATUS_13,
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UP_INT_STATUS_14,
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UP_INT_STATUS_15,
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UP_INT_CLEAR_0, /* UPPER interrupt clear */
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UP_INT_CLEAR_1,
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UP_INT_CLEAR_2,
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UP_INT_CLEAR_3,
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UP_INT_CLEAR_4,
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UP_INT_CLEAR_5,
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UP_INT_CLEAR_6,
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UP_INT_CLEAR_7,
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UP_INT_CLEAR_8,
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UP_INT_CLEAR_9,
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UP_INT_CLEAR_10,
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UP_INT_CLEAR_11,
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UP_INT_CLEAR_12,
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UP_INT_CLEAR_13,
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UP_INT_CLEAR_14,
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UP_INT_CLEAR_15,
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UP_INT_MASK_0, /* UPPER interrupt mask */
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UP_INT_MASK_1,
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UP_INT_MASK_2,
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UP_INT_MASK_3,
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UP_INT_MASK_4,
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UP_INT_MASK_5,
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UP_INT_MASK_6,
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UP_INT_MASK_7,
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UP_INT_MASK_8,
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UP_INT_MASK_9,
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UP_INT_MASK_10,
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UP_INT_MASK_11,
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UP_INT_MASK_12,
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UP_INT_MASK_13,
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UP_INT_MASK_14,
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UP_INT_MASK_15,
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UP_THRESH_0, /* UPPER threshold values */
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UP_THRESH_1,
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UP_THRESH_2,
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UP_THRESH_3,
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UP_THRESH_4,
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UP_THRESH_5,
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UP_THRESH_6,
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UP_THRESH_7,
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UP_THRESH_8,
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UP_THRESH_9,
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UP_THRESH_10,
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UP_THRESH_11,
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UP_THRESH_12,
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UP_THRESH_13,
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UP_THRESH_14,
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UP_THRESH_15,
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CRITICAL_STATUS_0, /* CRITICAL threshold violated */
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CRITICAL_STATUS_1,
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CRITICAL_STATUS_2,
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CRITICAL_STATUS_3,
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CRITICAL_STATUS_4,
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CRITICAL_STATUS_5,
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CRITICAL_STATUS_6,
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CRITICAL_STATUS_7,
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CRITICAL_STATUS_8,
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CRITICAL_STATUS_9,
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CRITICAL_STATUS_10,
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CRITICAL_STATUS_11,
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CRITICAL_STATUS_12,
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CRITICAL_STATUS_13,
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CRITICAL_STATUS_14,
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CRITICAL_STATUS_15,
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MIN_STATUS_0, /* MIN threshold violated */
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MIN_STATUS_1,
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MIN_STATUS_2,
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MIN_STATUS_3,
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MIN_STATUS_4,
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MIN_STATUS_5,
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MIN_STATUS_6,
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MIN_STATUS_7,
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MIN_STATUS_8,
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MIN_STATUS_9,
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MIN_STATUS_10,
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MIN_STATUS_11,
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MIN_STATUS_12,
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MIN_STATUS_13,
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MIN_STATUS_14,
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MIN_STATUS_15,
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MAX_STATUS_0, /* MAX threshold violated */
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MAX_STATUS_1,
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MAX_STATUS_2,
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MAX_STATUS_3,
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MAX_STATUS_4,
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MAX_STATUS_5,
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MAX_STATUS_6,
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MAX_STATUS_7,
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MAX_STATUS_8,
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MAX_STATUS_9,
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MAX_STATUS_10,
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MAX_STATUS_11,
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MAX_STATUS_12,
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MAX_STATUS_13,
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MAX_STATUS_14,
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MAX_STATUS_15,
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/* Keep last */
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MAX_REGFIELDS
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};
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/**
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* struct tsens_features - Features supported by the IP
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* @ver_major: Major number of IP version
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* @crit_int: does the IP support critical interrupts?
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* @adc: do the sensors only output adc code (instead of temperature)?
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* @srot_split: does the IP neatly splits the register space into SROT and TM,
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* with SROT only being available to secure boot firmware?
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* @max_sensors: maximum sensors supported by this version of the IP
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*/
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struct tsens_features {
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unsigned int ver_major;
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unsigned int crit_int:1;
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unsigned int adc:1;
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unsigned int srot_split:1;
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unsigned int max_sensors;
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};
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/**
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* struct tsens_plat_data - tsens compile-time platform data
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* @num_sensors: Number of sensors supported by platform
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* @ops: operations the tsens instance supports
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* @hw_ids: Subset of sensors ids supported by platform, if not the first n
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* @feat: features of the IP
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* @fields: bitfield locations
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*/
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struct tsens_plat_data {
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const u32 num_sensors;
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const struct tsens_ops *ops;
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unsigned int *hw_ids;
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const struct tsens_features *feat;
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const struct reg_field *fields;
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};
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/**
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* struct tsens_context - Registers to be saved/restored across a context loss
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*/
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struct tsens_context {
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int threshold;
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int control;
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};
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/**
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* struct tsens_priv - private data for each instance of the tsens IP
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* @dev: pointer to struct device
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* @num_sensors: number of sensors enabled on this device
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* @tm_map: pointer to TM register address space
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* @srot_map: pointer to SROT register address space
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* @tm_offset: deal with old device trees that don't address TM and SROT
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* address space separately
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* @rf: array of regmap_fields used to store value of the field
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* @ctx: registers to be saved and restored during suspend/resume
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* @feat: features of the IP
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* @fields: bitfield locations
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* @ops: pointer to list of callbacks supported by this device
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* @debug_root: pointer to debugfs dentry for all tsens
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* @debug: pointer to debugfs dentry for tsens controller
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* @sensor: list of sensors attached to this device
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*/
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struct tsens_priv {
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struct device *dev;
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u32 num_sensors;
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struct regmap *tm_map;
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struct regmap *srot_map;
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u32 tm_offset;
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/* lock for upper/lower threshold interrupts */
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spinlock_t ul_lock;
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struct regmap_field *rf[MAX_REGFIELDS];
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struct tsens_context ctx;
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const struct tsens_features *feat;
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const struct reg_field *fields;
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const struct tsens_ops *ops;
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struct dentry *debug_root;
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struct dentry *debug;
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struct tsens_sensor sensor[0];
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};
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char *qfprom_read(struct device *dev, const char *cname);
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void compute_intercept_slope(struct tsens_priv *priv, u32 *pt1, u32 *pt2, u32 mode);
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int init_common(struct tsens_priv *priv);
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int get_temp_tsens_valid(struct tsens_sensor *s, int *temp);
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int get_temp_common(struct tsens_sensor *s, int *temp);
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int tsens_enable_irq(struct tsens_priv *priv);
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void tsens_disable_irq(struct tsens_priv *priv);
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int tsens_set_trips(void *_sensor, int low, int high);
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irqreturn_t tsens_irq_thread(int irq, void *data);
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/* TSENS target */
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extern const struct tsens_plat_data data_8960;
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/* TSENS v0.1 targets */
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extern const struct tsens_plat_data data_8916, data_8974;
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/* TSENS v1 targets */
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extern const struct tsens_plat_data data_tsens_v1, data_8976;
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/* TSENS v2 targets */
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extern const struct tsens_plat_data data_8996, data_tsens_v2;
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#endif /* __QCOM_TSENS_H__ */
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