![Jason Gunthorpe](/assets/img/avatar_default.png)
This chip is/was also branded as a Winbond WPCT301. Originally written by Dan Morav <dmorav@nuvoton.com> and posted to LKML: https://lkml.org/lkml/2011/9/7/206 The original posting was not merged, I have taken it as a starting point, forward ported, tested and revised the driver: - Rework interrupt handling to work properly with level triggered interrupts. The old version just locked up. - Synchronize various items with Peter Huewe's Infineon driver: * Add durations/timeouts sysfs calls * Remove I2C device auto-detection * Don't fiddle with chip->release * Call tpm_dev_vendor_release in the probe error path * Use MODULE_DEVICE_TABLE for the I2C ids * Provide OF compatible strings for DT support * Use SIMPLE_DEV_PM_OPS * Use module_i2c_driver - checkpatch cleanups - Testing on ARM Kirkwood with GPIO interrupts, with this device tree: tpm@57 { compatible = "nuvoton,npct501"; reg = <0x57>; interrupt-parent = <&gpio1>; interrupts = <6 IRQ_TYPE_LEVEL_LOW>; }; Signed-off-by: Dan Morav <dmorav@nuvoton.com> [jgg: revised and tested] Signed-off-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com> [phuewe: minor whitespace changes, fixed module name in kconfig] Signed-off-by: Peter Huewe <peterhuewe@gmx.de>
711 lines
20 KiB
C
711 lines
20 KiB
C
/******************************************************************************
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* Nuvoton TPM I2C Device Driver Interface for WPCT301/NPCT501,
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* based on the TCG TPM Interface Spec version 1.2.
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* Specifications at www.trustedcomputinggroup.org
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*
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* Copyright (C) 2011, Nuvoton Technology Corporation.
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* Dan Morav <dan.morav@nuvoton.com>
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* Copyright (C) 2013, Obsidian Research Corp.
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* Jason Gunthorpe <jgunthorpe@obsidianresearch.com>
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see http://www.gnu.org/licenses/>.
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*
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* Nuvoton contact information: APC.Support@nuvoton.com
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*****************************************************************************/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/slab.h>
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#include <linux/interrupt.h>
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#include <linux/wait.h>
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#include <linux/i2c.h>
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#include "tpm.h"
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/* I2C interface offsets */
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#define TPM_STS 0x00
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#define TPM_BURST_COUNT 0x01
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#define TPM_DATA_FIFO_W 0x20
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#define TPM_DATA_FIFO_R 0x40
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#define TPM_VID_DID_RID 0x60
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/* TPM command header size */
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#define TPM_HEADER_SIZE 10
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#define TPM_RETRY 5
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/*
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* I2C bus device maximum buffer size w/o counting I2C address or command
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* i.e. max size required for I2C write is 34 = addr, command, 32 bytes data
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*/
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#define TPM_I2C_MAX_BUF_SIZE 32
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#define TPM_I2C_RETRY_COUNT 32
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#define TPM_I2C_BUS_DELAY 1 /* msec */
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#define TPM_I2C_RETRY_DELAY_SHORT 2 /* msec */
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#define TPM_I2C_RETRY_DELAY_LONG 10 /* msec */
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#define I2C_DRIVER_NAME "tpm_i2c_nuvoton"
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struct priv_data {
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unsigned int intrs;
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};
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static s32 i2c_nuvoton_read_buf(struct i2c_client *client, u8 offset, u8 size,
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u8 *data)
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{
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s32 status;
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status = i2c_smbus_read_i2c_block_data(client, offset, size, data);
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dev_dbg(&client->dev,
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"%s(offset=%u size=%u data=%*ph) -> sts=%d\n", __func__,
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offset, size, (int)size, data, status);
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return status;
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}
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static s32 i2c_nuvoton_write_buf(struct i2c_client *client, u8 offset, u8 size,
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u8 *data)
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{
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s32 status;
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status = i2c_smbus_write_i2c_block_data(client, offset, size, data);
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dev_dbg(&client->dev,
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"%s(offset=%u size=%u data=%*ph) -> sts=%d\n", __func__,
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offset, size, (int)size, data, status);
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return status;
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}
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#define TPM_STS_VALID 0x80
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#define TPM_STS_COMMAND_READY 0x40
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#define TPM_STS_GO 0x20
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#define TPM_STS_DATA_AVAIL 0x10
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#define TPM_STS_EXPECT 0x08
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#define TPM_STS_RESPONSE_RETRY 0x02
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#define TPM_STS_ERR_VAL 0x07 /* bit2...bit0 reads always 0 */
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#define TPM_I2C_SHORT_TIMEOUT 750 /* ms */
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#define TPM_I2C_LONG_TIMEOUT 2000 /* 2 sec */
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/* read TPM_STS register */
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static u8 i2c_nuvoton_read_status(struct tpm_chip *chip)
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{
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struct i2c_client *client = to_i2c_client(chip->dev);
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s32 status;
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u8 data;
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status = i2c_nuvoton_read_buf(client, TPM_STS, 1, &data);
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if (status <= 0) {
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dev_err(chip->dev, "%s() error return %d\n", __func__,
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status);
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data = TPM_STS_ERR_VAL;
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}
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return data;
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}
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/* write byte to TPM_STS register */
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static s32 i2c_nuvoton_write_status(struct i2c_client *client, u8 data)
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{
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s32 status;
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int i;
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/* this causes the current command to be aborted */
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for (i = 0, status = -1; i < TPM_I2C_RETRY_COUNT && status < 0; i++) {
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status = i2c_nuvoton_write_buf(client, TPM_STS, 1, &data);
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msleep(TPM_I2C_BUS_DELAY);
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}
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return status;
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}
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/* write commandReady to TPM_STS register */
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static void i2c_nuvoton_ready(struct tpm_chip *chip)
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{
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struct i2c_client *client = to_i2c_client(chip->dev);
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s32 status;
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/* this causes the current command to be aborted */
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status = i2c_nuvoton_write_status(client, TPM_STS_COMMAND_READY);
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if (status < 0)
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dev_err(chip->dev,
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"%s() fail to write TPM_STS.commandReady\n", __func__);
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}
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/* read burstCount field from TPM_STS register
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* return -1 on fail to read */
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static int i2c_nuvoton_get_burstcount(struct i2c_client *client,
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struct tpm_chip *chip)
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{
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unsigned long stop = jiffies + chip->vendor.timeout_d;
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s32 status;
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int burst_count = -1;
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u8 data;
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/* wait for burstcount to be non-zero */
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do {
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/* in I2C burstCount is 1 byte */
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status = i2c_nuvoton_read_buf(client, TPM_BURST_COUNT, 1,
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&data);
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if (status > 0 && data > 0) {
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burst_count = min_t(u8, TPM_I2C_MAX_BUF_SIZE, data);
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break;
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}
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msleep(TPM_I2C_BUS_DELAY);
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} while (time_before(jiffies, stop));
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return burst_count;
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}
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/*
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* WPCT301/NPCT501 SINT# supports only dataAvail
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* any call to this function which is not waiting for dataAvail will
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* set queue to NULL to avoid waiting for interrupt
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*/
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static bool i2c_nuvoton_check_status(struct tpm_chip *chip, u8 mask, u8 value)
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{
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u8 status = i2c_nuvoton_read_status(chip);
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return (status != TPM_STS_ERR_VAL) && ((status & mask) == value);
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}
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static int i2c_nuvoton_wait_for_stat(struct tpm_chip *chip, u8 mask, u8 value,
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u32 timeout, wait_queue_head_t *queue)
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{
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if (chip->vendor.irq && queue) {
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s32 rc;
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DEFINE_WAIT(wait);
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struct priv_data *priv = chip->vendor.priv;
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unsigned int cur_intrs = priv->intrs;
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enable_irq(chip->vendor.irq);
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rc = wait_event_interruptible_timeout(*queue,
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cur_intrs != priv->intrs,
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timeout);
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if (rc > 0)
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return 0;
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/* At this point we know that the SINT pin is asserted, so we
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* do not need to do i2c_nuvoton_check_status */
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} else {
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unsigned long ten_msec, stop;
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bool status_valid;
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/* check current status */
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status_valid = i2c_nuvoton_check_status(chip, mask, value);
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if (status_valid)
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return 0;
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/* use polling to wait for the event */
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ten_msec = jiffies + msecs_to_jiffies(TPM_I2C_RETRY_DELAY_LONG);
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stop = jiffies + timeout;
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do {
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if (time_before(jiffies, ten_msec))
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msleep(TPM_I2C_RETRY_DELAY_SHORT);
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else
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msleep(TPM_I2C_RETRY_DELAY_LONG);
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status_valid = i2c_nuvoton_check_status(chip, mask,
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value);
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if (status_valid)
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return 0;
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} while (time_before(jiffies, stop));
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}
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dev_err(chip->dev, "%s(%02x, %02x) -> timeout\n", __func__, mask,
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value);
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return -ETIMEDOUT;
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}
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/* wait for dataAvail field to be set in the TPM_STS register */
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static int i2c_nuvoton_wait_for_data_avail(struct tpm_chip *chip, u32 timeout,
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wait_queue_head_t *queue)
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{
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return i2c_nuvoton_wait_for_stat(chip,
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TPM_STS_DATA_AVAIL | TPM_STS_VALID,
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TPM_STS_DATA_AVAIL | TPM_STS_VALID,
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timeout, queue);
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}
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/* Read @count bytes into @buf from TPM_RD_FIFO register */
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static int i2c_nuvoton_recv_data(struct i2c_client *client,
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struct tpm_chip *chip, u8 *buf, size_t count)
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{
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s32 rc;
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int burst_count, bytes2read, size = 0;
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while (size < count &&
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i2c_nuvoton_wait_for_data_avail(chip,
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chip->vendor.timeout_c,
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&chip->vendor.read_queue) == 0) {
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burst_count = i2c_nuvoton_get_burstcount(client, chip);
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if (burst_count < 0) {
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dev_err(chip->dev,
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"%s() fail to read burstCount=%d\n", __func__,
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burst_count);
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return -EIO;
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}
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bytes2read = min_t(size_t, burst_count, count - size);
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rc = i2c_nuvoton_read_buf(client, TPM_DATA_FIFO_R,
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bytes2read, &buf[size]);
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if (rc < 0) {
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dev_err(chip->dev,
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"%s() fail on i2c_nuvoton_read_buf()=%d\n",
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__func__, rc);
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return -EIO;
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}
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dev_dbg(chip->dev, "%s(%d):", __func__, bytes2read);
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size += bytes2read;
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}
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return size;
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}
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/* Read TPM command results */
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static int i2c_nuvoton_recv(struct tpm_chip *chip, u8 *buf, size_t count)
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{
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struct device *dev = chip->dev;
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struct i2c_client *client = to_i2c_client(dev);
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s32 rc;
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int expected, status, burst_count, retries, size = 0;
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if (count < TPM_HEADER_SIZE) {
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i2c_nuvoton_ready(chip); /* return to idle */
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dev_err(dev, "%s() count < header size\n", __func__);
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return -EIO;
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}
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for (retries = 0; retries < TPM_RETRY; retries++) {
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if (retries > 0) {
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/* if this is not the first trial, set responseRetry */
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i2c_nuvoton_write_status(client,
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TPM_STS_RESPONSE_RETRY);
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}
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/*
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* read first available (> 10 bytes), including:
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* tag, paramsize, and result
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*/
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status = i2c_nuvoton_wait_for_data_avail(
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chip, chip->vendor.timeout_c, &chip->vendor.read_queue);
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if (status != 0) {
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dev_err(dev, "%s() timeout on dataAvail\n", __func__);
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size = -ETIMEDOUT;
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continue;
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}
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burst_count = i2c_nuvoton_get_burstcount(client, chip);
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if (burst_count < 0) {
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dev_err(dev, "%s() fail to get burstCount\n", __func__);
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size = -EIO;
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continue;
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}
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size = i2c_nuvoton_recv_data(client, chip, buf,
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burst_count);
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if (size < TPM_HEADER_SIZE) {
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dev_err(dev, "%s() fail to read header\n", __func__);
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size = -EIO;
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continue;
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}
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/*
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* convert number of expected bytes field from big endian 32 bit
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* to machine native
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*/
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expected = be32_to_cpu(*(__be32 *) (buf + 2));
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if (expected > count) {
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dev_err(dev, "%s() expected > count\n", __func__);
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size = -EIO;
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continue;
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}
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rc = i2c_nuvoton_recv_data(client, chip, &buf[size],
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expected - size);
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size += rc;
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if (rc < 0 || size < expected) {
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dev_err(dev, "%s() fail to read remainder of result\n",
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__func__);
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size = -EIO;
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continue;
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}
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if (i2c_nuvoton_wait_for_stat(
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chip, TPM_STS_VALID | TPM_STS_DATA_AVAIL,
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TPM_STS_VALID, chip->vendor.timeout_c,
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NULL)) {
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dev_err(dev, "%s() error left over data\n", __func__);
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size = -ETIMEDOUT;
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continue;
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}
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break;
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}
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i2c_nuvoton_ready(chip);
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dev_dbg(chip->dev, "%s() -> %d\n", __func__, size);
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return size;
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}
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/*
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* Send TPM command.
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*
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* If interrupts are used (signaled by an irq set in the vendor structure)
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* tpm.c can skip polling for the data to be available as the interrupt is
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* waited for here
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*/
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static int i2c_nuvoton_send(struct tpm_chip *chip, u8 *buf, size_t len)
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{
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struct device *dev = chip->dev;
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struct i2c_client *client = to_i2c_client(dev);
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u32 ordinal;
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size_t count = 0;
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int burst_count, bytes2write, retries, rc = -EIO;
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for (retries = 0; retries < TPM_RETRY; retries++) {
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i2c_nuvoton_ready(chip);
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if (i2c_nuvoton_wait_for_stat(chip, TPM_STS_COMMAND_READY,
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TPM_STS_COMMAND_READY,
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chip->vendor.timeout_b, NULL)) {
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dev_err(dev, "%s() timeout on commandReady\n",
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__func__);
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rc = -EIO;
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continue;
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}
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rc = 0;
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while (count < len - 1) {
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burst_count = i2c_nuvoton_get_burstcount(client,
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chip);
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if (burst_count < 0) {
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dev_err(dev, "%s() fail get burstCount\n",
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__func__);
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rc = -EIO;
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break;
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}
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bytes2write = min_t(size_t, burst_count,
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len - 1 - count);
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rc = i2c_nuvoton_write_buf(client, TPM_DATA_FIFO_W,
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bytes2write, &buf[count]);
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if (rc < 0) {
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dev_err(dev, "%s() fail i2cWriteBuf\n",
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__func__);
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break;
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}
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dev_dbg(dev, "%s(%d):", __func__, bytes2write);
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count += bytes2write;
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rc = i2c_nuvoton_wait_for_stat(chip,
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TPM_STS_VALID |
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TPM_STS_EXPECT,
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TPM_STS_VALID |
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TPM_STS_EXPECT,
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chip->vendor.timeout_c,
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NULL);
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if (rc < 0) {
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dev_err(dev, "%s() timeout on Expect\n",
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__func__);
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rc = -ETIMEDOUT;
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break;
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}
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}
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if (rc < 0)
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continue;
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/* write last byte */
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rc = i2c_nuvoton_write_buf(client, TPM_DATA_FIFO_W, 1,
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&buf[count]);
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if (rc < 0) {
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dev_err(dev, "%s() fail to write last byte\n",
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__func__);
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rc = -EIO;
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continue;
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}
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dev_dbg(dev, "%s(last): %02x", __func__, buf[count]);
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rc = i2c_nuvoton_wait_for_stat(chip,
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TPM_STS_VALID | TPM_STS_EXPECT,
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TPM_STS_VALID,
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chip->vendor.timeout_c, NULL);
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if (rc) {
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dev_err(dev, "%s() timeout on Expect to clear\n",
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__func__);
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rc = -ETIMEDOUT;
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continue;
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}
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break;
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}
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if (rc < 0) {
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/* retries == TPM_RETRY */
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i2c_nuvoton_ready(chip);
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return rc;
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}
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/* execute the TPM command */
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rc = i2c_nuvoton_write_status(client, TPM_STS_GO);
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if (rc < 0) {
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dev_err(dev, "%s() fail to write Go\n", __func__);
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i2c_nuvoton_ready(chip);
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return rc;
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}
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ordinal = be32_to_cpu(*((__be32 *) (buf + 6)));
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rc = i2c_nuvoton_wait_for_data_avail(chip,
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tpm_calc_ordinal_duration(chip,
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ordinal),
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&chip->vendor.read_queue);
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if (rc) {
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dev_err(dev, "%s() timeout command duration\n", __func__);
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i2c_nuvoton_ready(chip);
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return rc;
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}
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dev_dbg(dev, "%s() -> %zd\n", __func__, len);
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return len;
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}
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static bool i2c_nuvoton_req_canceled(struct tpm_chip *chip, u8 status)
|
|
{
|
|
return (status == TPM_STS_COMMAND_READY);
|
|
}
|
|
|
|
static const struct file_operations i2c_nuvoton_ops = {
|
|
.owner = THIS_MODULE,
|
|
.llseek = no_llseek,
|
|
.open = tpm_open,
|
|
.read = tpm_read,
|
|
.write = tpm_write,
|
|
.release = tpm_release,
|
|
};
|
|
|
|
static DEVICE_ATTR(pubek, S_IRUGO, tpm_show_pubek, NULL);
|
|
static DEVICE_ATTR(pcrs, S_IRUGO, tpm_show_pcrs, NULL);
|
|
static DEVICE_ATTR(enabled, S_IRUGO, tpm_show_enabled, NULL);
|
|
static DEVICE_ATTR(active, S_IRUGO, tpm_show_active, NULL);
|
|
static DEVICE_ATTR(owned, S_IRUGO, tpm_show_owned, NULL);
|
|
static DEVICE_ATTR(temp_deactivated, S_IRUGO, tpm_show_temp_deactivated, NULL);
|
|
static DEVICE_ATTR(caps, S_IRUGO, tpm_show_caps, NULL);
|
|
static DEVICE_ATTR(cancel, S_IWUSR | S_IWGRP, NULL, tpm_store_cancel);
|
|
static DEVICE_ATTR(durations, S_IRUGO, tpm_show_durations, NULL);
|
|
static DEVICE_ATTR(timeouts, S_IRUGO, tpm_show_timeouts, NULL);
|
|
|
|
static struct attribute *i2c_nuvoton_attrs[] = {
|
|
&dev_attr_pubek.attr,
|
|
&dev_attr_pcrs.attr,
|
|
&dev_attr_enabled.attr,
|
|
&dev_attr_active.attr,
|
|
&dev_attr_owned.attr,
|
|
&dev_attr_temp_deactivated.attr,
|
|
&dev_attr_caps.attr,
|
|
&dev_attr_cancel.attr,
|
|
&dev_attr_durations.attr,
|
|
&dev_attr_timeouts.attr,
|
|
NULL,
|
|
};
|
|
|
|
static struct attribute_group i2c_nuvoton_attr_grp = {
|
|
.attrs = i2c_nuvoton_attrs
|
|
};
|
|
|
|
static const struct tpm_vendor_specific tpm_i2c = {
|
|
.status = i2c_nuvoton_read_status,
|
|
.recv = i2c_nuvoton_recv,
|
|
.send = i2c_nuvoton_send,
|
|
.cancel = i2c_nuvoton_ready,
|
|
.req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
|
|
.req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
|
|
.req_canceled = i2c_nuvoton_req_canceled,
|
|
.attr_group = &i2c_nuvoton_attr_grp,
|
|
.miscdev.fops = &i2c_nuvoton_ops,
|
|
};
|
|
|
|
/* The only purpose for the handler is to signal to any waiting threads that
|
|
* the interrupt is currently being asserted. The driver does not do any
|
|
* processing triggered by interrupts, and the chip provides no way to mask at
|
|
* the source (plus that would be slow over I2C). Run the IRQ as a one-shot,
|
|
* this means it cannot be shared. */
|
|
static irqreturn_t i2c_nuvoton_int_handler(int dummy, void *dev_id)
|
|
{
|
|
struct tpm_chip *chip = dev_id;
|
|
struct priv_data *priv = chip->vendor.priv;
|
|
|
|
priv->intrs++;
|
|
wake_up(&chip->vendor.read_queue);
|
|
disable_irq_nosync(chip->vendor.irq);
|
|
return IRQ_HANDLED;
|
|
}
|
|
|
|
static int get_vid(struct i2c_client *client, u32 *res)
|
|
{
|
|
static const u8 vid_did_rid_value[] = { 0x50, 0x10, 0xfe };
|
|
u32 temp;
|
|
s32 rc;
|
|
|
|
if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
|
|
return -ENODEV;
|
|
rc = i2c_nuvoton_read_buf(client, TPM_VID_DID_RID, 4, (u8 *)&temp);
|
|
if (rc < 0)
|
|
return rc;
|
|
|
|
/* check WPCT301 values - ignore RID */
|
|
if (memcmp(&temp, vid_did_rid_value, sizeof(vid_did_rid_value))) {
|
|
/*
|
|
* f/w rev 2.81 has an issue where the VID_DID_RID is not
|
|
* reporting the right value. so give it another chance at
|
|
* offset 0x20 (FIFO_W).
|
|
*/
|
|
rc = i2c_nuvoton_read_buf(client, TPM_DATA_FIFO_W, 4,
|
|
(u8 *) (&temp));
|
|
if (rc < 0)
|
|
return rc;
|
|
|
|
/* check WPCT301 values - ignore RID */
|
|
if (memcmp(&temp, vid_did_rid_value,
|
|
sizeof(vid_did_rid_value)))
|
|
return -ENODEV;
|
|
}
|
|
|
|
*res = temp;
|
|
return 0;
|
|
}
|
|
|
|
static int i2c_nuvoton_probe(struct i2c_client *client,
|
|
const struct i2c_device_id *id)
|
|
{
|
|
int rc;
|
|
struct tpm_chip *chip;
|
|
struct device *dev = &client->dev;
|
|
u32 vid = 0;
|
|
|
|
rc = get_vid(client, &vid);
|
|
if (rc)
|
|
return rc;
|
|
|
|
dev_info(dev, "VID: %04X DID: %02X RID: %02X\n", (u16) vid,
|
|
(u8) (vid >> 16), (u8) (vid >> 24));
|
|
|
|
chip = tpm_register_hardware(dev, &tpm_i2c);
|
|
if (!chip) {
|
|
dev_err(dev, "%s() error in tpm_register_hardware\n", __func__);
|
|
return -ENODEV;
|
|
}
|
|
|
|
chip->vendor.priv = devm_kzalloc(dev, sizeof(struct priv_data),
|
|
GFP_KERNEL);
|
|
init_waitqueue_head(&chip->vendor.read_queue);
|
|
init_waitqueue_head(&chip->vendor.int_queue);
|
|
|
|
/* Default timeouts */
|
|
chip->vendor.timeout_a = msecs_to_jiffies(TPM_I2C_SHORT_TIMEOUT);
|
|
chip->vendor.timeout_b = msecs_to_jiffies(TPM_I2C_LONG_TIMEOUT);
|
|
chip->vendor.timeout_c = msecs_to_jiffies(TPM_I2C_SHORT_TIMEOUT);
|
|
chip->vendor.timeout_d = msecs_to_jiffies(TPM_I2C_SHORT_TIMEOUT);
|
|
|
|
/*
|
|
* I2C intfcaps (interrupt capabilitieis) in the chip are hard coded to:
|
|
* TPM_INTF_INT_LEVEL_LOW | TPM_INTF_DATA_AVAIL_INT
|
|
* The IRQ should be set in the i2c_board_info (which is done
|
|
* automatically in of_i2c_register_devices, for device tree users */
|
|
chip->vendor.irq = client->irq;
|
|
|
|
if (chip->vendor.irq) {
|
|
dev_dbg(dev, "%s() chip-vendor.irq\n", __func__);
|
|
rc = devm_request_irq(dev, chip->vendor.irq,
|
|
i2c_nuvoton_int_handler,
|
|
IRQF_TRIGGER_LOW,
|
|
chip->vendor.miscdev.name,
|
|
chip);
|
|
if (rc) {
|
|
dev_err(dev, "%s() Unable to request irq: %d for use\n",
|
|
__func__, chip->vendor.irq);
|
|
chip->vendor.irq = 0;
|
|
} else {
|
|
/* Clear any pending interrupt */
|
|
i2c_nuvoton_ready(chip);
|
|
/* - wait for TPM_STS==0xA0 (stsValid, commandReady) */
|
|
rc = i2c_nuvoton_wait_for_stat(chip,
|
|
TPM_STS_COMMAND_READY,
|
|
TPM_STS_COMMAND_READY,
|
|
chip->vendor.timeout_b,
|
|
NULL);
|
|
if (rc == 0) {
|
|
/*
|
|
* TIS is in ready state
|
|
* write dummy byte to enter reception state
|
|
* TPM_DATA_FIFO_W <- rc (0)
|
|
*/
|
|
rc = i2c_nuvoton_write_buf(client,
|
|
TPM_DATA_FIFO_W,
|
|
1, (u8 *) (&rc));
|
|
if (rc < 0)
|
|
goto out_err;
|
|
/* TPM_STS <- 0x40 (commandReady) */
|
|
i2c_nuvoton_ready(chip);
|
|
} else {
|
|
/*
|
|
* timeout_b reached - command was
|
|
* aborted. TIS should now be in idle state -
|
|
* only TPM_STS_VALID should be set
|
|
*/
|
|
if (i2c_nuvoton_read_status(chip) !=
|
|
TPM_STS_VALID) {
|
|
rc = -EIO;
|
|
goto out_err;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
if (tpm_get_timeouts(chip)) {
|
|
rc = -ENODEV;
|
|
goto out_err;
|
|
}
|
|
|
|
if (tpm_do_selftest(chip)) {
|
|
rc = -ENODEV;
|
|
goto out_err;
|
|
}
|
|
|
|
return 0;
|
|
|
|
out_err:
|
|
tpm_dev_vendor_release(chip);
|
|
tpm_remove_hardware(chip->dev);
|
|
return rc;
|
|
}
|
|
|
|
static int i2c_nuvoton_remove(struct i2c_client *client)
|
|
{
|
|
struct device *dev = &(client->dev);
|
|
struct tpm_chip *chip = dev_get_drvdata(dev);
|
|
|
|
if (chip)
|
|
tpm_dev_vendor_release(chip);
|
|
tpm_remove_hardware(dev);
|
|
kfree(chip);
|
|
return 0;
|
|
}
|
|
|
|
|
|
static const struct i2c_device_id i2c_nuvoton_id[] = {
|
|
{I2C_DRIVER_NAME, 0},
|
|
{}
|
|
};
|
|
MODULE_DEVICE_TABLE(i2c, i2c_nuvoton_id);
|
|
|
|
#ifdef CONFIG_OF
|
|
static const struct of_device_id i2c_nuvoton_of_match[] = {
|
|
{.compatible = "nuvoton,npct501"},
|
|
{.compatible = "winbond,wpct301"},
|
|
{},
|
|
};
|
|
MODULE_DEVICE_TABLE(of, i2c_nuvoton_of_match);
|
|
#endif
|
|
|
|
static SIMPLE_DEV_PM_OPS(i2c_nuvoton_pm_ops, tpm_pm_suspend, tpm_pm_resume);
|
|
|
|
static struct i2c_driver i2c_nuvoton_driver = {
|
|
.id_table = i2c_nuvoton_id,
|
|
.probe = i2c_nuvoton_probe,
|
|
.remove = i2c_nuvoton_remove,
|
|
.driver = {
|
|
.name = I2C_DRIVER_NAME,
|
|
.owner = THIS_MODULE,
|
|
.pm = &i2c_nuvoton_pm_ops,
|
|
.of_match_table = of_match_ptr(i2c_nuvoton_of_match),
|
|
},
|
|
};
|
|
|
|
module_i2c_driver(i2c_nuvoton_driver);
|
|
|
|
MODULE_AUTHOR("Dan Morav (dan.morav@nuvoton.com)");
|
|
MODULE_DESCRIPTION("Nuvoton TPM I2C Driver");
|
|
MODULE_LICENSE("GPL");
|