a269e53b1a
Storing internal frames in macroblock tiled order improves memory access patterns by allowing increased burst sizes when transferring the uncompressed macroblocks to or from main memory. The translation logic only supports a single chroma base address, so this is only supported for the chroma interleaved NV12 format. Since the rotator used to copy the decoder output into the v4l2 capture buffers does not seem to support the tiled format correctly, only enable it in the encoder for now. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@osg.samsung.com>
151 lines
3.7 KiB
C
151 lines
3.7 KiB
C
/*
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* Coda multi-standard codec IP
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*
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* Copyright (C) 2014 Philipp Zabel, Pengutronix
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <linux/bitops.h>
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#include "coda.h"
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#define XY2_INVERT BIT(7)
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#define XY2_ZERO BIT(6)
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#define XY2_TB_XOR BIT(5)
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#define XY2_XYSEL BIT(4)
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#define XY2_Y (1 << 4)
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#define XY2_X (0 << 4)
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#define XY2(luma_sel, luma_bit, chroma_sel, chroma_bit) \
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(((XY2_##luma_sel) | (luma_bit)) << 8 | \
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(XY2_##chroma_sel) | (chroma_bit))
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static const u16 xy2ca_zero_map[16] = {
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XY2(ZERO, 0, ZERO, 0),
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XY2(ZERO, 0, ZERO, 0),
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XY2(ZERO, 0, ZERO, 0),
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XY2(ZERO, 0, ZERO, 0),
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XY2(ZERO, 0, ZERO, 0),
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XY2(ZERO, 0, ZERO, 0),
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XY2(ZERO, 0, ZERO, 0),
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XY2(ZERO, 0, ZERO, 0),
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XY2(ZERO, 0, ZERO, 0),
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XY2(ZERO, 0, ZERO, 0),
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XY2(ZERO, 0, ZERO, 0),
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XY2(ZERO, 0, ZERO, 0),
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XY2(ZERO, 0, ZERO, 0),
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XY2(ZERO, 0, ZERO, 0),
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XY2(ZERO, 0, ZERO, 0),
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XY2(ZERO, 0, ZERO, 0),
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};
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static const u16 xy2ca_tiled_map[16] = {
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XY2(Y, 0, Y, 0),
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XY2(Y, 1, Y, 1),
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XY2(Y, 2, Y, 2),
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XY2(Y, 3, X, 3),
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XY2(X, 3, ZERO, 0),
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XY2(ZERO, 0, ZERO, 0),
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XY2(ZERO, 0, ZERO, 0),
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XY2(ZERO, 0, ZERO, 0),
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XY2(ZERO, 0, ZERO, 0),
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XY2(ZERO, 0, ZERO, 0),
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XY2(ZERO, 0, ZERO, 0),
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XY2(ZERO, 0, ZERO, 0),
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XY2(ZERO, 0, ZERO, 0),
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XY2(ZERO, 0, ZERO, 0),
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XY2(ZERO, 0, ZERO, 0),
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XY2(ZERO, 0, ZERO, 0),
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};
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/*
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* RA[15:0], CA[15:8] are hardwired to contain the 24-bit macroblock
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* start offset (macroblock size is 16x16 for luma, 16x8 for chroma).
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* Bits CA[4:0] are set using XY2CA above. BA[3:0] seems to be unused.
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*/
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#define RBC_CA (0 << 4)
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#define RBC_BA (1 << 4)
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#define RBC_RA (2 << 4)
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#define RBC_ZERO (3 << 4)
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#define RBC(luma_sel, luma_bit, chroma_sel, chroma_bit) \
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(((RBC_##luma_sel) | (luma_bit)) << 6 | \
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(RBC_##chroma_sel) | (chroma_bit))
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static const u16 rbc2axi_tiled_map[32] = {
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RBC(ZERO, 0, ZERO, 0),
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RBC(ZERO, 0, ZERO, 0),
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RBC(ZERO, 0, ZERO, 0),
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RBC(CA, 0, CA, 0),
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RBC(CA, 1, CA, 1),
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RBC(CA, 2, CA, 2),
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RBC(CA, 3, CA, 3),
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RBC(CA, 4, CA, 8),
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RBC(CA, 8, CA, 9),
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RBC(CA, 9, CA, 10),
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RBC(CA, 10, CA, 11),
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RBC(CA, 11, CA, 12),
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RBC(CA, 12, CA, 13),
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RBC(CA, 13, CA, 14),
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RBC(CA, 14, CA, 15),
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RBC(CA, 15, RA, 0),
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RBC(RA, 0, RA, 1),
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RBC(RA, 1, RA, 2),
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RBC(RA, 2, RA, 3),
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RBC(RA, 3, RA, 4),
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RBC(RA, 4, RA, 5),
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RBC(RA, 5, RA, 6),
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RBC(RA, 6, RA, 7),
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RBC(RA, 7, RA, 8),
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RBC(RA, 8, RA, 9),
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RBC(RA, 9, RA, 10),
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RBC(RA, 10, RA, 11),
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RBC(RA, 11, RA, 12),
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RBC(RA, 12, RA, 13),
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RBC(RA, 13, RA, 14),
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RBC(RA, 14, RA, 15),
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RBC(RA, 15, ZERO, 0),
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};
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void coda_set_gdi_regs(struct coda_ctx *ctx)
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{
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struct coda_dev *dev = ctx->dev;
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const u16 *xy2ca_map;
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u32 xy2rbc_config;
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int i;
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switch (ctx->tiled_map_type) {
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case GDI_LINEAR_FRAME_MAP:
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default:
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xy2ca_map = xy2ca_zero_map;
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xy2rbc_config = 0;
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break;
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case GDI_TILED_FRAME_MB_RASTER_MAP:
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xy2ca_map = xy2ca_tiled_map;
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xy2rbc_config = CODA9_XY2RBC_TILED_MAP |
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CODA9_XY2RBC_CA_INC_HOR |
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(16 - 1) << 12 | (8 - 1) << 4;
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break;
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}
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for (i = 0; i < 16; i++)
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coda_write(dev, xy2ca_map[i],
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CODA9_GDI_XY2_CAS_0 + 4 * i);
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for (i = 0; i < 4; i++)
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coda_write(dev, XY2(ZERO, 0, ZERO, 0),
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CODA9_GDI_XY2_BA_0 + 4 * i);
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for (i = 0; i < 16; i++)
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coda_write(dev, XY2(ZERO, 0, ZERO, 0),
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CODA9_GDI_XY2_RAS_0 + 4 * i);
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coda_write(dev, xy2rbc_config, CODA9_GDI_XY2_RBC_CONFIG);
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if (xy2rbc_config) {
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for (i = 0; i < 32; i++)
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coda_write(dev, rbc2axi_tiled_map[i],
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CODA9_GDI_RBC2_AXI_0 + 4 * i);
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}
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}
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