alistair23-linux/drivers/clk/sunxi-ng/ccu_mmc_timing.c
Thomas Gleixner 9c92ab6191 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 282
Based on 1 normalized pattern(s):

  this software is licensed under the terms of the gnu general public
  license version 2 as published by the free software foundation and
  may be copied distributed and modified under those terms this
  program is distributed in the hope that it will be useful but
  without any warranty without even the implied warranty of
  merchantability or fitness for a particular purpose see the gnu
  general public license for more details

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 285 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Alexios Zavras <alexios.zavras@intel.com>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190529141900.642774971@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-06-05 17:36:37 +02:00

64 lines
1.6 KiB
C

// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2017 Chen-Yu Tsai. All rights reserved.
*/
#include <linux/clk-provider.h>
#include <linux/clk/sunxi-ng.h>
#include <linux/io.h>
#include "ccu_common.h"
/**
* sunxi_ccu_set_mmc_timing_mode: Configure the MMC clock timing mode
* @clk: clock to be configured
* @new_mode: true for new timing mode introduced in A83T and later
*
* Returns 0 on success, -ENOTSUPP if the clock does not support
* switching modes.
*/
int sunxi_ccu_set_mmc_timing_mode(struct clk *clk, bool new_mode)
{
struct clk_hw *hw = __clk_get_hw(clk);
struct ccu_common *cm = hw_to_ccu_common(hw);
unsigned long flags;
u32 val;
if (!(cm->features & CCU_FEATURE_MMC_TIMING_SWITCH))
return -ENOTSUPP;
spin_lock_irqsave(cm->lock, flags);
val = readl(cm->base + cm->reg);
if (new_mode)
val |= CCU_MMC_NEW_TIMING_MODE;
else
val &= ~CCU_MMC_NEW_TIMING_MODE;
writel(val, cm->base + cm->reg);
spin_unlock_irqrestore(cm->lock, flags);
return 0;
}
EXPORT_SYMBOL_GPL(sunxi_ccu_set_mmc_timing_mode);
/**
* sunxi_ccu_set_mmc_timing_mode: Get the current MMC clock timing mode
* @clk: clock to query
*
* Returns 0 if the clock is in old timing mode, > 0 if it is in
* new timing mode, and -ENOTSUPP if the clock does not support
* this function.
*/
int sunxi_ccu_get_mmc_timing_mode(struct clk *clk)
{
struct clk_hw *hw = __clk_get_hw(clk);
struct ccu_common *cm = hw_to_ccu_common(hw);
if (!(cm->features & CCU_FEATURE_MMC_TIMING_SWITCH))
return -ENOTSUPP;
return !!(readl(cm->base + cm->reg) & CCU_MMC_NEW_TIMING_MODE);
}
EXPORT_SYMBOL_GPL(sunxi_ccu_get_mmc_timing_mode);