4793f2ebff
Now that the SPDX tag is in all tty files, that identifies the license in a specific and legally-defined manner. So the extra GPL text wording can be removed as it is no longer needed at all. This is done on a quest to remove the 700+ different ways that files in the kernel describe the GPL license text. And there's unneeded stuff like the address (sometimes incorrect) for the FSF which is never needed. No copyright headers or other non-license-description text was removed. Cc: Jiri Slaby <jslaby@suse.com> Cc: Eric Anholt <eric@anholt.net> Cc: Stefan Wahren <stefan.wahren@i2se.com> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: Ray Jui <rjui@broadcom.com> Cc: Scott Branden <sbranden@broadcom.com> Cc: bcm-kernel-feedback-list@broadcom.com Cc: "James E.J. Bottomley" <jejb@parisc-linux.org> Cc: Helge Deller <deller@gmx.de> Cc: Joachim Eastwood <manabian@gmail.com> Cc: Matthias Brugger <matthias.bgg@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Tobias Klauser <tklauser@distanz.ch> Cc: Russell King <linux@armlinux.org.uk> Cc: Vineet Gupta <vgupta@synopsys.com> Cc: Richard Genoud <richard.genoud@gmail.com> Cc: Alexander Shiyan <shc_work@mail.ru> Cc: Baruch Siach <baruch@tkos.co.il> Cc: Pat Gefre <pfg@sgi.com> Cc: "Guilherme G. Piccoli" <gpiccoli@linux.vnet.ibm.com> Cc: Jason Wessel <jason.wessel@windriver.com> Cc: Vladimir Zapolskiy <vz@mleia.com> Cc: Sylvain Lemieux <slemieux.tyco@gmail.com> Cc: Carlo Caione <carlo@caione.org> Cc: Kevin Hilman <khilman@baylibre.com> Cc: Liviu Dudau <liviu.dudau@arm.com> Cc: Sudeep Holla <sudeep.holla@arm.com> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Andy Gross <andy.gross@linaro.org> Cc: David Brown <david.brown@linaro.org> Cc: "Andreas Färber" <afaerber@suse.de> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Laxman Dewangan <ldewangan@nvidia.com> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Jonathan Hunter <jonathanh@nvidia.com> Cc: Barry Song <baohua@kernel.org> Cc: Patrice Chotard <patrice.chotard@st.com> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Chris Metcalf <cmetcalf@mellanox.com> Cc: Peter Korsgaard <jacmet@sunsite.dk> Cc: Timur Tabi <timur@tabi.org> Cc: Tony Prisk <linux@prisktech.co.nz> Cc: Michal Simek <michal.simek@xilinx.com> Cc: "Sören Brinkmann" <soren.brinkmann@xilinx.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
126 lines
3.4 KiB
C
126 lines
3.4 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* PIC32 Integrated Serial Driver.
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*
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* Copyright (C) 2015 Microchip Technology, Inc.
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*
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* Authors:
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* Sorin-Andrei Pistirica <andrei.pistirica@microchip.com>
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*/
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#ifndef __DT_PIC32_UART_H__
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#define __DT_PIC32_UART_H__
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#define PIC32_UART_DFLT_BRATE (9600)
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#define PIC32_UART_TX_FIFO_DEPTH (8)
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#define PIC32_UART_RX_FIFO_DEPTH (8)
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#define PIC32_UART_MODE 0x00
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#define PIC32_UART_STA 0x10
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#define PIC32_UART_TX 0x20
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#define PIC32_UART_RX 0x30
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#define PIC32_UART_BRG 0x40
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struct pic32_console_opt {
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int baud;
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int parity;
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int bits;
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int flow;
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};
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/* struct pic32_sport - pic32 serial port descriptor
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* @port: uart port descriptor
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* @idx: port index
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* @irq_fault: virtual fault interrupt number
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* @irqflags_fault: flags related to fault irq
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* @irq_fault_name: irq fault name
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* @irq_rx: virtual rx interrupt number
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* @irqflags_rx: flags related to rx irq
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* @irq_rx_name: irq rx name
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* @irq_tx: virtual tx interrupt number
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* @irqflags_tx: : flags related to tx irq
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* @irq_tx_name: irq tx name
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* @cts_gpio: clear to send gpio
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* @dev: device descriptor
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**/
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struct pic32_sport {
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struct uart_port port;
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struct pic32_console_opt opt;
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int idx;
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int irq_fault;
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int irqflags_fault;
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const char *irq_fault_name;
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int irq_rx;
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int irqflags_rx;
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const char *irq_rx_name;
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int irq_tx;
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int irqflags_tx;
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const char *irq_tx_name;
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u8 enable_tx_irq;
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bool hw_flow_ctrl;
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int cts_gpio;
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int ref_clk;
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struct clk *clk;
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struct device *dev;
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};
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#define to_pic32_sport(c) container_of(c, struct pic32_sport, port)
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#define pic32_get_port(sport) (&sport->port)
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#define pic32_get_opt(sport) (&sport->opt)
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#define tx_irq_enabled(sport) (sport->enable_tx_irq)
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static inline void pic32_uart_writel(struct pic32_sport *sport,
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u32 reg, u32 val)
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{
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struct uart_port *port = pic32_get_port(sport);
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__raw_writel(val, port->membase + reg);
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}
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static inline u32 pic32_uart_readl(struct pic32_sport *sport, u32 reg)
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{
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struct uart_port *port = pic32_get_port(sport);
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return __raw_readl(port->membase + reg);
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}
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/* pic32 uart mode register bits */
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#define PIC32_UART_MODE_ON BIT(15)
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#define PIC32_UART_MODE_FRZ BIT(14)
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#define PIC32_UART_MODE_SIDL BIT(13)
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#define PIC32_UART_MODE_IREN BIT(12)
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#define PIC32_UART_MODE_RTSMD BIT(11)
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#define PIC32_UART_MODE_RESV1 BIT(10)
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#define PIC32_UART_MODE_UEN1 BIT(9)
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#define PIC32_UART_MODE_UEN0 BIT(8)
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#define PIC32_UART_MODE_WAKE BIT(7)
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#define PIC32_UART_MODE_LPBK BIT(6)
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#define PIC32_UART_MODE_ABAUD BIT(5)
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#define PIC32_UART_MODE_RXINV BIT(4)
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#define PIC32_UART_MODE_BRGH BIT(3)
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#define PIC32_UART_MODE_PDSEL1 BIT(2)
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#define PIC32_UART_MODE_PDSEL0 BIT(1)
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#define PIC32_UART_MODE_STSEL BIT(0)
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/* pic32 uart status register bits */
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#define PIC32_UART_STA_UTXISEL1 BIT(15)
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#define PIC32_UART_STA_UTXISEL0 BIT(14)
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#define PIC32_UART_STA_UTXINV BIT(13)
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#define PIC32_UART_STA_URXEN BIT(12)
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#define PIC32_UART_STA_UTXBRK BIT(11)
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#define PIC32_UART_STA_UTXEN BIT(10)
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#define PIC32_UART_STA_UTXBF BIT(9)
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#define PIC32_UART_STA_TRMT BIT(8)
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#define PIC32_UART_STA_URXISEL1 BIT(7)
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#define PIC32_UART_STA_URXISEL0 BIT(6)
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#define PIC32_UART_STA_ADDEN BIT(5)
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#define PIC32_UART_STA_RIDLE BIT(4)
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#define PIC32_UART_STA_PERR BIT(3)
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#define PIC32_UART_STA_FERR BIT(2)
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#define PIC32_UART_STA_OERR BIT(1)
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#define PIC32_UART_STA_URXDA BIT(0)
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#endif /* __DT_PIC32_UART_H__ */
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