![Daniel Vetter](/assets/img/avatar_default.png)
Having the probe helper stuff (which pretty much everyone needs) in the drm_crtc_helper.h file (which atomic drivers should never need) is confusing. Split them out. To make sure I actually achieved the goal here I went through all drivers. And indeed, all atomic drivers are now free of drm_crtc_helper.h includes. v2: Make it compile. There was so much compile fail on arm drivers that I figured I'll better not include any of the acks on v1. v3: Massive rebase because i915 has lost a lot of drmP.h includes, but not all: Through drm_crtc_helper.h > drm_modeset_helper.h -> drmP.h there was still one, which this patch largely removes. Which means rolling out lots more includes all over. This will also conflict with ongoing drmP.h cleanup by others I expect. v3: Rebase on top of atomic bochs. v4: Review from Laurent for bridge/rcar/omap/shmob/core bits: - (re)move some of the added includes, use the better include files in other places (all suggested from Laurent adopted unchanged). - sort alphabetically v5: Actually try to sort them, and while at it, sort all the ones I touch. v6: Rebase onto i915 changes. v7: Rebase once more. Acked-by: Harry Wentland <harry.wentland@amd.com> Acked-by: Sam Ravnborg <sam@ravnborg.org> Cc: Sam Ravnborg <sam@ravnborg.org> Cc: Jani Nikula <jani.nikula@linux.intel.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Acked-by: Benjamin Gaignard <benjamin.gaignard@linaro.org> Acked-by: Jani Nikula <jani.nikula@intel.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com> Acked-by: CK Hu <ck.hu@mediatek.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Acked-by: Sam Ravnborg <sam@ravnborg.org> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Liviu Dudau <liviu.dudau@arm.com> Signed-off-by: Daniel Vetter <daniel.vetter@intel.com> Cc: linux-arm-kernel@lists.infradead.org Cc: virtualization@lists.linux-foundation.org Cc: etnaviv@lists.freedesktop.org Cc: linux-samsung-soc@vger.kernel.org Cc: intel-gfx@lists.freedesktop.org Cc: linux-mediatek@lists.infradead.org Cc: linux-amlogic@lists.infradead.org Cc: linux-arm-msm@vger.kernel.org Cc: freedreno@lists.freedesktop.org Cc: nouveau@lists.freedesktop.org Cc: spice-devel@lists.freedesktop.org Cc: amd-gfx@lists.freedesktop.org Cc: linux-renesas-soc@vger.kernel.org Cc: linux-rockchip@lists.infradead.org Cc: linux-stm32@st-md-mailman.stormreply.com Cc: linux-tegra@vger.kernel.org Cc: xen-devel@lists.xen.org Link: https://patchwork.freedesktop.org/patch/msgid/20190117210334.13234-1-daniel.vetter@ffwll.ch
783 lines
22 KiB
C
783 lines
22 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2018, The Linux Foundation. All rights reserved.
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*/
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#include <drm/drmP.h>
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#include <drm/drm_atomic.h>
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_dp_helper.h>
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#include <drm/drm_mipi_dsi.h>
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#include <drm/drm_of.h>
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#include <drm/drm_panel.h>
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#include <drm/drm_probe_helper.h>
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#include <linux/clk.h>
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#include <linux/gpio/consumer.h>
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#include <linux/i2c.h>
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#include <linux/iopoll.h>
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#include <linux/of_graph.h>
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#include <linux/pm_runtime.h>
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#include <linux/regmap.h>
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#include <linux/regulator/consumer.h>
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#define SN_DEVICE_REV_REG 0x08
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#define SN_DPPLL_SRC_REG 0x0A
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#define DPPLL_CLK_SRC_DSICLK BIT(0)
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#define REFCLK_FREQ_MASK GENMASK(3, 1)
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#define REFCLK_FREQ(x) ((x) << 1)
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#define DPPLL_SRC_DP_PLL_LOCK BIT(7)
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#define SN_PLL_ENABLE_REG 0x0D
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#define SN_DSI_LANES_REG 0x10
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#define CHA_DSI_LANES_MASK GENMASK(4, 3)
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#define CHA_DSI_LANES(x) ((x) << 3)
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#define SN_DSIA_CLK_FREQ_REG 0x12
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#define SN_CHA_ACTIVE_LINE_LENGTH_LOW_REG 0x20
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#define SN_CHA_VERTICAL_DISPLAY_SIZE_LOW_REG 0x24
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#define SN_CHA_HSYNC_PULSE_WIDTH_LOW_REG 0x2C
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#define SN_CHA_HSYNC_PULSE_WIDTH_HIGH_REG 0x2D
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#define CHA_HSYNC_POLARITY BIT(7)
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#define SN_CHA_VSYNC_PULSE_WIDTH_LOW_REG 0x30
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#define SN_CHA_VSYNC_PULSE_WIDTH_HIGH_REG 0x31
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#define CHA_VSYNC_POLARITY BIT(7)
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#define SN_CHA_HORIZONTAL_BACK_PORCH_REG 0x34
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#define SN_CHA_VERTICAL_BACK_PORCH_REG 0x36
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#define SN_CHA_HORIZONTAL_FRONT_PORCH_REG 0x38
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#define SN_CHA_VERTICAL_FRONT_PORCH_REG 0x3A
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#define SN_ENH_FRAME_REG 0x5A
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#define VSTREAM_ENABLE BIT(3)
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#define SN_DATA_FORMAT_REG 0x5B
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#define SN_HPD_DISABLE_REG 0x5C
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#define HPD_DISABLE BIT(0)
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#define SN_AUX_WDATA_REG(x) (0x64 + (x))
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#define SN_AUX_ADDR_19_16_REG 0x74
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#define SN_AUX_ADDR_15_8_REG 0x75
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#define SN_AUX_ADDR_7_0_REG 0x76
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#define SN_AUX_LENGTH_REG 0x77
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#define SN_AUX_CMD_REG 0x78
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#define AUX_CMD_SEND BIT(0)
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#define AUX_CMD_REQ(x) ((x) << 4)
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#define SN_AUX_RDATA_REG(x) (0x79 + (x))
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#define SN_SSC_CONFIG_REG 0x93
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#define DP_NUM_LANES_MASK GENMASK(5, 4)
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#define DP_NUM_LANES(x) ((x) << 4)
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#define SN_DATARATE_CONFIG_REG 0x94
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#define DP_DATARATE_MASK GENMASK(7, 5)
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#define DP_DATARATE(x) ((x) << 5)
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#define SN_ML_TX_MODE_REG 0x96
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#define ML_TX_MAIN_LINK_OFF 0
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#define ML_TX_NORMAL_MODE BIT(0)
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#define SN_AUX_CMD_STATUS_REG 0xF4
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#define AUX_IRQ_STATUS_AUX_RPLY_TOUT BIT(3)
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#define AUX_IRQ_STATUS_AUX_SHORT BIT(5)
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#define AUX_IRQ_STATUS_NAT_I2C_FAIL BIT(6)
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#define MIN_DSI_CLK_FREQ_MHZ 40
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/* fudge factor required to account for 8b/10b encoding */
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#define DP_CLK_FUDGE_NUM 10
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#define DP_CLK_FUDGE_DEN 8
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/* Matches DP_AUX_MAX_PAYLOAD_BYTES (for now) */
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#define SN_AUX_MAX_PAYLOAD_BYTES 16
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#define SN_REGULATOR_SUPPLY_NUM 4
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struct ti_sn_bridge {
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struct device *dev;
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struct regmap *regmap;
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struct drm_dp_aux aux;
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struct drm_bridge bridge;
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struct drm_connector connector;
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struct device_node *host_node;
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struct mipi_dsi_device *dsi;
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struct clk *refclk;
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struct drm_panel *panel;
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struct gpio_desc *enable_gpio;
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struct regulator_bulk_data supplies[SN_REGULATOR_SUPPLY_NUM];
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};
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static const struct regmap_range ti_sn_bridge_volatile_ranges[] = {
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{ .range_min = 0, .range_max = 0xFF },
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};
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static const struct regmap_access_table ti_sn_bridge_volatile_table = {
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.yes_ranges = ti_sn_bridge_volatile_ranges,
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.n_yes_ranges = ARRAY_SIZE(ti_sn_bridge_volatile_ranges),
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};
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static const struct regmap_config ti_sn_bridge_regmap_config = {
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.reg_bits = 8,
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.val_bits = 8,
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.volatile_table = &ti_sn_bridge_volatile_table,
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.cache_type = REGCACHE_NONE,
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};
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static void ti_sn_bridge_write_u16(struct ti_sn_bridge *pdata,
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unsigned int reg, u16 val)
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{
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regmap_write(pdata->regmap, reg, val & 0xFF);
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regmap_write(pdata->regmap, reg + 1, val >> 8);
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}
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static int __maybe_unused ti_sn_bridge_resume(struct device *dev)
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{
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struct ti_sn_bridge *pdata = dev_get_drvdata(dev);
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int ret;
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ret = regulator_bulk_enable(SN_REGULATOR_SUPPLY_NUM, pdata->supplies);
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if (ret) {
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DRM_ERROR("failed to enable supplies %d\n", ret);
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return ret;
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}
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gpiod_set_value(pdata->enable_gpio, 1);
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return ret;
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}
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static int __maybe_unused ti_sn_bridge_suspend(struct device *dev)
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{
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struct ti_sn_bridge *pdata = dev_get_drvdata(dev);
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int ret;
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gpiod_set_value(pdata->enable_gpio, 0);
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ret = regulator_bulk_disable(SN_REGULATOR_SUPPLY_NUM, pdata->supplies);
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if (ret)
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DRM_ERROR("failed to disable supplies %d\n", ret);
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return ret;
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}
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static const struct dev_pm_ops ti_sn_bridge_pm_ops = {
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SET_RUNTIME_PM_OPS(ti_sn_bridge_suspend, ti_sn_bridge_resume, NULL)
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};
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/* Connector funcs */
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static struct ti_sn_bridge *
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connector_to_ti_sn_bridge(struct drm_connector *connector)
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{
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return container_of(connector, struct ti_sn_bridge, connector);
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}
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static int ti_sn_bridge_connector_get_modes(struct drm_connector *connector)
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{
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struct ti_sn_bridge *pdata = connector_to_ti_sn_bridge(connector);
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return drm_panel_get_modes(pdata->panel);
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}
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static enum drm_mode_status
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ti_sn_bridge_connector_mode_valid(struct drm_connector *connector,
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struct drm_display_mode *mode)
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{
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/* maximum supported resolution is 4K at 60 fps */
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if (mode->clock > 594000)
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return MODE_CLOCK_HIGH;
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return MODE_OK;
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}
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static struct drm_connector_helper_funcs ti_sn_bridge_connector_helper_funcs = {
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.get_modes = ti_sn_bridge_connector_get_modes,
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.mode_valid = ti_sn_bridge_connector_mode_valid,
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};
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static enum drm_connector_status
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ti_sn_bridge_connector_detect(struct drm_connector *connector, bool force)
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{
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/**
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* TODO: Currently if drm_panel is present, then always
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* return the status as connected. Need to add support to detect
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* device state for hot pluggable scenarios.
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*/
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return connector_status_connected;
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}
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static const struct drm_connector_funcs ti_sn_bridge_connector_funcs = {
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.fill_modes = drm_helper_probe_single_connector_modes,
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.detect = ti_sn_bridge_connector_detect,
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.destroy = drm_connector_cleanup,
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.reset = drm_atomic_helper_connector_reset,
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.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
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.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
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};
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static struct ti_sn_bridge *bridge_to_ti_sn_bridge(struct drm_bridge *bridge)
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{
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return container_of(bridge, struct ti_sn_bridge, bridge);
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}
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static int ti_sn_bridge_parse_regulators(struct ti_sn_bridge *pdata)
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{
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unsigned int i;
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const char * const ti_sn_bridge_supply_names[] = {
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"vcca", "vcc", "vccio", "vpll",
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};
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for (i = 0; i < SN_REGULATOR_SUPPLY_NUM; i++)
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pdata->supplies[i].supply = ti_sn_bridge_supply_names[i];
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return devm_regulator_bulk_get(pdata->dev, SN_REGULATOR_SUPPLY_NUM,
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pdata->supplies);
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}
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static int ti_sn_bridge_attach(struct drm_bridge *bridge)
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{
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int ret, val;
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struct ti_sn_bridge *pdata = bridge_to_ti_sn_bridge(bridge);
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struct mipi_dsi_host *host;
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struct mipi_dsi_device *dsi;
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const struct mipi_dsi_device_info info = { .type = "ti_sn_bridge",
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.channel = 0,
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.node = NULL,
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};
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ret = drm_connector_init(bridge->dev, &pdata->connector,
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&ti_sn_bridge_connector_funcs,
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DRM_MODE_CONNECTOR_eDP);
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if (ret) {
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DRM_ERROR("Failed to initialize connector with drm\n");
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return ret;
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}
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drm_connector_helper_add(&pdata->connector,
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&ti_sn_bridge_connector_helper_funcs);
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drm_connector_attach_encoder(&pdata->connector, bridge->encoder);
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/*
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* TODO: ideally finding host resource and dsi dev registration needs
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* to be done in bridge probe. But some existing DSI host drivers will
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* wait for any of the drm_bridge/drm_panel to get added to the global
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* bridge/panel list, before completing their probe. So if we do the
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* dsi dev registration part in bridge probe, before populating in
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* the global bridge list, then it will cause deadlock as dsi host probe
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* will never complete, neither our bridge probe. So keeping it here
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* will satisfy most of the existing host drivers. Once the host driver
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* is fixed we can move the below code to bridge probe safely.
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*/
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host = of_find_mipi_dsi_host_by_node(pdata->host_node);
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if (!host) {
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DRM_ERROR("failed to find dsi host\n");
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ret = -ENODEV;
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goto err_dsi_host;
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}
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dsi = mipi_dsi_device_register_full(host, &info);
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if (IS_ERR(dsi)) {
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DRM_ERROR("failed to create dsi device\n");
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ret = PTR_ERR(dsi);
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goto err_dsi_host;
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}
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/* TODO: setting to 4 lanes always for now */
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dsi->lanes = 4;
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dsi->format = MIPI_DSI_FMT_RGB888;
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dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
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MIPI_DSI_MODE_EOT_PACKET | MIPI_DSI_MODE_VIDEO_HSE;
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/* check if continuous dsi clock is required or not */
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pm_runtime_get_sync(pdata->dev);
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regmap_read(pdata->regmap, SN_DPPLL_SRC_REG, &val);
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pm_runtime_put(pdata->dev);
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if (!(val & DPPLL_CLK_SRC_DSICLK))
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dsi->mode_flags |= MIPI_DSI_CLOCK_NON_CONTINUOUS;
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ret = mipi_dsi_attach(dsi);
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if (ret < 0) {
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DRM_ERROR("failed to attach dsi to host\n");
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goto err_dsi_attach;
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}
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pdata->dsi = dsi;
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/* attach panel to bridge */
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drm_panel_attach(pdata->panel, &pdata->connector);
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return 0;
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err_dsi_attach:
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mipi_dsi_device_unregister(dsi);
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err_dsi_host:
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drm_connector_cleanup(&pdata->connector);
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return ret;
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}
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static void ti_sn_bridge_disable(struct drm_bridge *bridge)
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{
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struct ti_sn_bridge *pdata = bridge_to_ti_sn_bridge(bridge);
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drm_panel_disable(pdata->panel);
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/* disable video stream */
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regmap_update_bits(pdata->regmap, SN_ENH_FRAME_REG, VSTREAM_ENABLE, 0);
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/* semi auto link training mode OFF */
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regmap_write(pdata->regmap, SN_ML_TX_MODE_REG, 0);
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/* disable DP PLL */
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regmap_write(pdata->regmap, SN_PLL_ENABLE_REG, 0);
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drm_panel_unprepare(pdata->panel);
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}
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static u32 ti_sn_bridge_get_dsi_freq(struct ti_sn_bridge *pdata)
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{
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u32 bit_rate_khz, clk_freq_khz;
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struct drm_display_mode *mode =
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&pdata->bridge.encoder->crtc->state->adjusted_mode;
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bit_rate_khz = mode->clock *
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mipi_dsi_pixel_format_to_bpp(pdata->dsi->format);
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clk_freq_khz = bit_rate_khz / (pdata->dsi->lanes * 2);
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return clk_freq_khz;
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}
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/* clk frequencies supported by bridge in Hz in case derived from REFCLK pin */
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static const u32 ti_sn_bridge_refclk_lut[] = {
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12000000,
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19200000,
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26000000,
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27000000,
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38400000,
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};
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/* clk frequencies supported by bridge in Hz in case derived from DACP/N pin */
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static const u32 ti_sn_bridge_dsiclk_lut[] = {
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468000000,
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384000000,
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416000000,
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486000000,
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460800000,
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};
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static void ti_sn_bridge_set_refclk_freq(struct ti_sn_bridge *pdata)
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{
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int i;
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u32 refclk_rate;
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const u32 *refclk_lut;
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size_t refclk_lut_size;
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if (pdata->refclk) {
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refclk_rate = clk_get_rate(pdata->refclk);
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refclk_lut = ti_sn_bridge_refclk_lut;
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refclk_lut_size = ARRAY_SIZE(ti_sn_bridge_refclk_lut);
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clk_prepare_enable(pdata->refclk);
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} else {
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refclk_rate = ti_sn_bridge_get_dsi_freq(pdata) * 1000;
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refclk_lut = ti_sn_bridge_dsiclk_lut;
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refclk_lut_size = ARRAY_SIZE(ti_sn_bridge_dsiclk_lut);
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}
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/* for i equals to refclk_lut_size means default frequency */
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for (i = 0; i < refclk_lut_size; i++)
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if (refclk_lut[i] == refclk_rate)
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break;
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regmap_update_bits(pdata->regmap, SN_DPPLL_SRC_REG, REFCLK_FREQ_MASK,
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REFCLK_FREQ(i));
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}
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/**
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* LUT index corresponds to register value and
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* LUT values corresponds to dp data rate supported
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* by the bridge in Mbps unit.
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*/
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static const unsigned int ti_sn_bridge_dp_rate_lut[] = {
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0, 1620, 2160, 2430, 2700, 3240, 4320, 5400
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};
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static void ti_sn_bridge_set_dsi_dp_rate(struct ti_sn_bridge *pdata)
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{
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unsigned int bit_rate_mhz, clk_freq_mhz, dp_rate_mhz;
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unsigned int val, i;
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struct drm_display_mode *mode =
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&pdata->bridge.encoder->crtc->state->adjusted_mode;
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/* set DSIA clk frequency */
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bit_rate_mhz = (mode->clock / 1000) *
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mipi_dsi_pixel_format_to_bpp(pdata->dsi->format);
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clk_freq_mhz = bit_rate_mhz / (pdata->dsi->lanes * 2);
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/* for each increment in val, frequency increases by 5MHz */
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val = (MIN_DSI_CLK_FREQ_MHZ / 5) +
|
|
(((clk_freq_mhz - MIN_DSI_CLK_FREQ_MHZ) / 5) & 0xFF);
|
|
regmap_write(pdata->regmap, SN_DSIA_CLK_FREQ_REG, val);
|
|
|
|
/* set DP data rate */
|
|
dp_rate_mhz = ((bit_rate_mhz / pdata->dsi->lanes) * DP_CLK_FUDGE_NUM) /
|
|
DP_CLK_FUDGE_DEN;
|
|
for (i = 0; i < ARRAY_SIZE(ti_sn_bridge_dp_rate_lut) - 1; i++)
|
|
if (ti_sn_bridge_dp_rate_lut[i] > dp_rate_mhz)
|
|
break;
|
|
|
|
regmap_update_bits(pdata->regmap, SN_DATARATE_CONFIG_REG,
|
|
DP_DATARATE_MASK, DP_DATARATE(i));
|
|
}
|
|
|
|
static void ti_sn_bridge_set_video_timings(struct ti_sn_bridge *pdata)
|
|
{
|
|
struct drm_display_mode *mode =
|
|
&pdata->bridge.encoder->crtc->state->adjusted_mode;
|
|
u8 hsync_polarity = 0, vsync_polarity = 0;
|
|
|
|
if (mode->flags & DRM_MODE_FLAG_PHSYNC)
|
|
hsync_polarity = CHA_HSYNC_POLARITY;
|
|
if (mode->flags & DRM_MODE_FLAG_PVSYNC)
|
|
vsync_polarity = CHA_VSYNC_POLARITY;
|
|
|
|
ti_sn_bridge_write_u16(pdata, SN_CHA_ACTIVE_LINE_LENGTH_LOW_REG,
|
|
mode->hdisplay);
|
|
ti_sn_bridge_write_u16(pdata, SN_CHA_VERTICAL_DISPLAY_SIZE_LOW_REG,
|
|
mode->vdisplay);
|
|
regmap_write(pdata->regmap, SN_CHA_HSYNC_PULSE_WIDTH_LOW_REG,
|
|
(mode->hsync_end - mode->hsync_start) & 0xFF);
|
|
regmap_write(pdata->regmap, SN_CHA_HSYNC_PULSE_WIDTH_HIGH_REG,
|
|
(((mode->hsync_end - mode->hsync_start) >> 8) & 0x7F) |
|
|
hsync_polarity);
|
|
regmap_write(pdata->regmap, SN_CHA_VSYNC_PULSE_WIDTH_LOW_REG,
|
|
(mode->vsync_end - mode->vsync_start) & 0xFF);
|
|
regmap_write(pdata->regmap, SN_CHA_VSYNC_PULSE_WIDTH_HIGH_REG,
|
|
(((mode->vsync_end - mode->vsync_start) >> 8) & 0x7F) |
|
|
vsync_polarity);
|
|
|
|
regmap_write(pdata->regmap, SN_CHA_HORIZONTAL_BACK_PORCH_REG,
|
|
(mode->htotal - mode->hsync_end) & 0xFF);
|
|
regmap_write(pdata->regmap, SN_CHA_VERTICAL_BACK_PORCH_REG,
|
|
(mode->vtotal - mode->vsync_end) & 0xFF);
|
|
|
|
regmap_write(pdata->regmap, SN_CHA_HORIZONTAL_FRONT_PORCH_REG,
|
|
(mode->hsync_start - mode->hdisplay) & 0xFF);
|
|
regmap_write(pdata->regmap, SN_CHA_VERTICAL_FRONT_PORCH_REG,
|
|
(mode->vsync_start - mode->vdisplay) & 0xFF);
|
|
|
|
usleep_range(10000, 10500); /* 10ms delay recommended by spec */
|
|
}
|
|
|
|
static void ti_sn_bridge_enable(struct drm_bridge *bridge)
|
|
{
|
|
struct ti_sn_bridge *pdata = bridge_to_ti_sn_bridge(bridge);
|
|
unsigned int val;
|
|
int ret;
|
|
|
|
/* DSI_A lane config */
|
|
val = CHA_DSI_LANES(4 - pdata->dsi->lanes);
|
|
regmap_update_bits(pdata->regmap, SN_DSI_LANES_REG,
|
|
CHA_DSI_LANES_MASK, val);
|
|
|
|
/* DP lane config */
|
|
val = DP_NUM_LANES(pdata->dsi->lanes - 1);
|
|
regmap_update_bits(pdata->regmap, SN_SSC_CONFIG_REG, DP_NUM_LANES_MASK,
|
|
val);
|
|
|
|
/* set dsi/dp clk frequency value */
|
|
ti_sn_bridge_set_dsi_dp_rate(pdata);
|
|
|
|
/* enable DP PLL */
|
|
regmap_write(pdata->regmap, SN_PLL_ENABLE_REG, 1);
|
|
|
|
ret = regmap_read_poll_timeout(pdata->regmap, SN_DPPLL_SRC_REG, val,
|
|
val & DPPLL_SRC_DP_PLL_LOCK, 1000,
|
|
50 * 1000);
|
|
if (ret) {
|
|
DRM_ERROR("DP_PLL_LOCK polling failed (%d)\n", ret);
|
|
return;
|
|
}
|
|
|
|
/**
|
|
* The SN65DSI86 only supports ASSR Display Authentication method and
|
|
* this method is enabled by default. An eDP panel must support this
|
|
* authentication method. We need to enable this method in the eDP panel
|
|
* at DisplayPort address 0x0010A prior to link training.
|
|
*/
|
|
drm_dp_dpcd_writeb(&pdata->aux, DP_EDP_CONFIGURATION_SET,
|
|
DP_ALTERNATE_SCRAMBLER_RESET_ENABLE);
|
|
|
|
/* Semi auto link training mode */
|
|
regmap_write(pdata->regmap, SN_ML_TX_MODE_REG, 0x0A);
|
|
ret = regmap_read_poll_timeout(pdata->regmap, SN_ML_TX_MODE_REG, val,
|
|
val == ML_TX_MAIN_LINK_OFF ||
|
|
val == ML_TX_NORMAL_MODE, 1000,
|
|
500 * 1000);
|
|
if (ret) {
|
|
DRM_ERROR("Training complete polling failed (%d)\n", ret);
|
|
return;
|
|
} else if (val == ML_TX_MAIN_LINK_OFF) {
|
|
DRM_ERROR("Link training failed, link is off\n");
|
|
return;
|
|
}
|
|
|
|
/* config video parameters */
|
|
ti_sn_bridge_set_video_timings(pdata);
|
|
|
|
/* enable video stream */
|
|
regmap_update_bits(pdata->regmap, SN_ENH_FRAME_REG, VSTREAM_ENABLE,
|
|
VSTREAM_ENABLE);
|
|
|
|
drm_panel_enable(pdata->panel);
|
|
}
|
|
|
|
static void ti_sn_bridge_pre_enable(struct drm_bridge *bridge)
|
|
{
|
|
struct ti_sn_bridge *pdata = bridge_to_ti_sn_bridge(bridge);
|
|
|
|
pm_runtime_get_sync(pdata->dev);
|
|
|
|
/* configure bridge ref_clk */
|
|
ti_sn_bridge_set_refclk_freq(pdata);
|
|
|
|
/*
|
|
* HPD on this bridge chip is a bit useless. This is an eDP bridge
|
|
* so the HPD is an internal signal that's only there to signal that
|
|
* the panel is done powering up. ...but the bridge chip debounces
|
|
* this signal by between 100 ms and 400 ms (depending on process,
|
|
* voltage, and temperate--I measured it at about 200 ms). One
|
|
* particular panel asserted HPD 84 ms after it was powered on meaning
|
|
* that we saw HPD 284 ms after power on. ...but the same panel said
|
|
* that instead of looking at HPD you could just hardcode a delay of
|
|
* 200 ms. We'll assume that the panel driver will have the hardcoded
|
|
* delay in its prepare and always disable HPD.
|
|
*
|
|
* If HPD somehow makes sense on some future panel we'll have to
|
|
* change this to be conditional on someone specifying that HPD should
|
|
* be used.
|
|
*/
|
|
regmap_update_bits(pdata->regmap, SN_HPD_DISABLE_REG, HPD_DISABLE,
|
|
HPD_DISABLE);
|
|
|
|
drm_panel_prepare(pdata->panel);
|
|
}
|
|
|
|
static void ti_sn_bridge_post_disable(struct drm_bridge *bridge)
|
|
{
|
|
struct ti_sn_bridge *pdata = bridge_to_ti_sn_bridge(bridge);
|
|
|
|
if (pdata->refclk)
|
|
clk_disable_unprepare(pdata->refclk);
|
|
|
|
pm_runtime_put_sync(pdata->dev);
|
|
}
|
|
|
|
static const struct drm_bridge_funcs ti_sn_bridge_funcs = {
|
|
.attach = ti_sn_bridge_attach,
|
|
.pre_enable = ti_sn_bridge_pre_enable,
|
|
.enable = ti_sn_bridge_enable,
|
|
.disable = ti_sn_bridge_disable,
|
|
.post_disable = ti_sn_bridge_post_disable,
|
|
};
|
|
|
|
static struct ti_sn_bridge *aux_to_ti_sn_bridge(struct drm_dp_aux *aux)
|
|
{
|
|
return container_of(aux, struct ti_sn_bridge, aux);
|
|
}
|
|
|
|
static ssize_t ti_sn_aux_transfer(struct drm_dp_aux *aux,
|
|
struct drm_dp_aux_msg *msg)
|
|
{
|
|
struct ti_sn_bridge *pdata = aux_to_ti_sn_bridge(aux);
|
|
u32 request = msg->request & ~DP_AUX_I2C_MOT;
|
|
u32 request_val = AUX_CMD_REQ(msg->request);
|
|
u8 *buf = (u8 *)msg->buffer;
|
|
unsigned int val;
|
|
int ret, i;
|
|
|
|
if (msg->size > SN_AUX_MAX_PAYLOAD_BYTES)
|
|
return -EINVAL;
|
|
|
|
switch (request) {
|
|
case DP_AUX_NATIVE_WRITE:
|
|
case DP_AUX_I2C_WRITE:
|
|
case DP_AUX_NATIVE_READ:
|
|
case DP_AUX_I2C_READ:
|
|
regmap_write(pdata->regmap, SN_AUX_CMD_REG, request_val);
|
|
break;
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
|
|
regmap_write(pdata->regmap, SN_AUX_ADDR_19_16_REG,
|
|
(msg->address >> 16) & 0xF);
|
|
regmap_write(pdata->regmap, SN_AUX_ADDR_15_8_REG,
|
|
(msg->address >> 8) & 0xFF);
|
|
regmap_write(pdata->regmap, SN_AUX_ADDR_7_0_REG, msg->address & 0xFF);
|
|
|
|
regmap_write(pdata->regmap, SN_AUX_LENGTH_REG, msg->size);
|
|
|
|
if (request == DP_AUX_NATIVE_WRITE || request == DP_AUX_I2C_WRITE) {
|
|
for (i = 0; i < msg->size; i++)
|
|
regmap_write(pdata->regmap, SN_AUX_WDATA_REG(i),
|
|
buf[i]);
|
|
}
|
|
|
|
regmap_write(pdata->regmap, SN_AUX_CMD_REG, request_val | AUX_CMD_SEND);
|
|
|
|
ret = regmap_read_poll_timeout(pdata->regmap, SN_AUX_CMD_REG, val,
|
|
!(val & AUX_CMD_SEND), 200,
|
|
50 * 1000);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = regmap_read(pdata->regmap, SN_AUX_CMD_STATUS_REG, &val);
|
|
if (ret)
|
|
return ret;
|
|
else if ((val & AUX_IRQ_STATUS_NAT_I2C_FAIL)
|
|
|| (val & AUX_IRQ_STATUS_AUX_RPLY_TOUT)
|
|
|| (val & AUX_IRQ_STATUS_AUX_SHORT))
|
|
return -ENXIO;
|
|
|
|
if (request == DP_AUX_NATIVE_WRITE || request == DP_AUX_I2C_WRITE)
|
|
return msg->size;
|
|
|
|
for (i = 0; i < msg->size; i++) {
|
|
unsigned int val;
|
|
ret = regmap_read(pdata->regmap, SN_AUX_RDATA_REG(i),
|
|
&val);
|
|
if (ret)
|
|
return ret;
|
|
|
|
WARN_ON(val & ~0xFF);
|
|
buf[i] = (u8)(val & 0xFF);
|
|
}
|
|
|
|
return msg->size;
|
|
}
|
|
|
|
static int ti_sn_bridge_parse_dsi_host(struct ti_sn_bridge *pdata)
|
|
{
|
|
struct device_node *np = pdata->dev->of_node;
|
|
|
|
pdata->host_node = of_graph_get_remote_node(np, 0, 0);
|
|
|
|
if (!pdata->host_node) {
|
|
DRM_ERROR("remote dsi host node not found\n");
|
|
return -ENODEV;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int ti_sn_bridge_probe(struct i2c_client *client,
|
|
const struct i2c_device_id *id)
|
|
{
|
|
struct ti_sn_bridge *pdata;
|
|
int ret;
|
|
|
|
if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
|
|
DRM_ERROR("device doesn't support I2C\n");
|
|
return -ENODEV;
|
|
}
|
|
|
|
pdata = devm_kzalloc(&client->dev, sizeof(struct ti_sn_bridge),
|
|
GFP_KERNEL);
|
|
if (!pdata)
|
|
return -ENOMEM;
|
|
|
|
pdata->regmap = devm_regmap_init_i2c(client,
|
|
&ti_sn_bridge_regmap_config);
|
|
if (IS_ERR(pdata->regmap)) {
|
|
DRM_ERROR("regmap i2c init failed\n");
|
|
return PTR_ERR(pdata->regmap);
|
|
}
|
|
|
|
pdata->dev = &client->dev;
|
|
|
|
ret = drm_of_find_panel_or_bridge(pdata->dev->of_node, 1, 0,
|
|
&pdata->panel, NULL);
|
|
if (ret) {
|
|
DRM_ERROR("could not find any panel node\n");
|
|
return ret;
|
|
}
|
|
|
|
dev_set_drvdata(&client->dev, pdata);
|
|
|
|
pdata->enable_gpio = devm_gpiod_get(pdata->dev, "enable",
|
|
GPIOD_OUT_LOW);
|
|
if (IS_ERR(pdata->enable_gpio)) {
|
|
DRM_ERROR("failed to get enable gpio from DT\n");
|
|
ret = PTR_ERR(pdata->enable_gpio);
|
|
return ret;
|
|
}
|
|
|
|
ret = ti_sn_bridge_parse_regulators(pdata);
|
|
if (ret) {
|
|
DRM_ERROR("failed to parse regulators\n");
|
|
return ret;
|
|
}
|
|
|
|
pdata->refclk = devm_clk_get(pdata->dev, "refclk");
|
|
if (IS_ERR(pdata->refclk)) {
|
|
ret = PTR_ERR(pdata->refclk);
|
|
if (ret == -EPROBE_DEFER)
|
|
return ret;
|
|
DRM_DEBUG_KMS("refclk not found\n");
|
|
pdata->refclk = NULL;
|
|
}
|
|
|
|
ret = ti_sn_bridge_parse_dsi_host(pdata);
|
|
if (ret)
|
|
return ret;
|
|
|
|
pm_runtime_enable(pdata->dev);
|
|
|
|
i2c_set_clientdata(client, pdata);
|
|
|
|
pdata->aux.name = "ti-sn65dsi86-aux";
|
|
pdata->aux.dev = pdata->dev;
|
|
pdata->aux.transfer = ti_sn_aux_transfer;
|
|
drm_dp_aux_register(&pdata->aux);
|
|
|
|
pdata->bridge.funcs = &ti_sn_bridge_funcs;
|
|
pdata->bridge.of_node = client->dev.of_node;
|
|
|
|
drm_bridge_add(&pdata->bridge);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int ti_sn_bridge_remove(struct i2c_client *client)
|
|
{
|
|
struct ti_sn_bridge *pdata = i2c_get_clientdata(client);
|
|
|
|
if (!pdata)
|
|
return -EINVAL;
|
|
|
|
of_node_put(pdata->host_node);
|
|
|
|
pm_runtime_disable(pdata->dev);
|
|
|
|
if (pdata->dsi) {
|
|
mipi_dsi_detach(pdata->dsi);
|
|
mipi_dsi_device_unregister(pdata->dsi);
|
|
}
|
|
|
|
drm_bridge_remove(&pdata->bridge);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct i2c_device_id ti_sn_bridge_id[] = {
|
|
{ "ti,sn65dsi86", 0},
|
|
{},
|
|
};
|
|
MODULE_DEVICE_TABLE(i2c, ti_sn_bridge_id);
|
|
|
|
static const struct of_device_id ti_sn_bridge_match_table[] = {
|
|
{.compatible = "ti,sn65dsi86"},
|
|
{},
|
|
};
|
|
MODULE_DEVICE_TABLE(of, ti_sn_bridge_match_table);
|
|
|
|
static struct i2c_driver ti_sn_bridge_driver = {
|
|
.driver = {
|
|
.name = "ti_sn65dsi86",
|
|
.of_match_table = ti_sn_bridge_match_table,
|
|
.pm = &ti_sn_bridge_pm_ops,
|
|
},
|
|
.probe = ti_sn_bridge_probe,
|
|
.remove = ti_sn_bridge_remove,
|
|
.id_table = ti_sn_bridge_id,
|
|
};
|
|
module_i2c_driver(ti_sn_bridge_driver);
|
|
|
|
MODULE_AUTHOR("Sandeep Panda <spanda@codeaurora.org>");
|
|
MODULE_DESCRIPTION("sn65dsi86 DSI to eDP bridge driver");
|
|
MODULE_LICENSE("GPL v2");
|