6727ad9e20
When doing an nmi backtrace of many cores, most of which are idle, the output is a little overwhelming and very uninformative. Suppress messages for cpus that are idling when they are interrupted and just emit one line, "NMI backtrace for N skipped: idling at pc 0xNNN". We do this by grouping all the cpuidle code together into a new .cpuidle.text section, and then checking the address of the interrupted PC to see if it lies within that section. This commit suitably tags x86 and tile idle routines, and only adds in the minimal framework for other architectures. Link: http://lkml.kernel.org/r/1472487169-14923-5-git-send-email-cmetcalf@mellanox.com Signed-off-by: Chris Metcalf <cmetcalf@mellanox.com> Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Tested-by: Peter Zijlstra (Intel) <peterz@infradead.org> Tested-by: Daniel Thompson <daniel.thompson@linaro.org> [arm] Tested-by: Petr Mladek <pmladek@suse.com> Cc: Aaron Tomlin <atomlin@redhat.com> Cc: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: "Rafael J. Wysocki" <rjw@rjwysocki.net> Cc: Russell King <linux@arm.linux.org.uk> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@elte.hu> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
65 lines
2.1 KiB
ArmAsm
65 lines
2.1 KiB
ArmAsm
/*
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* Copyright 2010 Tilera Corporation. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation, version 2.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
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* NON INFRINGEMENT. See the GNU General Public License for
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* more details.
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*/
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#include <linux/linkage.h>
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#include <linux/unistd.h>
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#include <asm/irqflags.h>
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#include <asm/processor.h>
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#include <arch/abi.h>
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#include <arch/spr_def.h>
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#ifdef __tilegx__
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#define bnzt bnezt
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#endif
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STD_ENTRY(current_text_addr)
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{ move r0, lr; jrp lr }
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STD_ENDPROC(current_text_addr)
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STD_ENTRY(KBacktraceIterator_init_current)
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{ move r2, lr; lnk r1 }
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{ move r4, r52; addli r1, r1, KBacktraceIterator_init_current - . }
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{ move r3, sp; j _KBacktraceIterator_init_current }
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jrp lr /* keep backtracer happy */
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STD_ENDPROC(KBacktraceIterator_init_current)
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/* Loop forever on a nap during SMP boot. */
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STD_ENTRY(smp_nap)
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nap
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nop /* avoid provoking the icache prefetch with a jump */
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j smp_nap /* we are not architecturally guaranteed not to exit nap */
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jrp lr /* clue in the backtracer */
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STD_ENDPROC(smp_nap)
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/*
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* Enable interrupts racelessly and then nap until interrupted.
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* Architecturally, we are guaranteed that enabling interrupts via
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* mtspr to INTERRUPT_CRITICAL_SECTION only interrupts at the next PC.
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* This function's _cpu_idle_nap address is special; see intvec.S.
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* When interrupted at _cpu_idle_nap, we bump the PC forward 8, and
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* as a result return to the function that called _cpu_idle().
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*/
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STD_ENTRY_SECTION(_cpu_idle, .cpuidle.text)
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movei r1, 1
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IRQ_ENABLE_LOAD(r2, r3)
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mtspr INTERRUPT_CRITICAL_SECTION, r1
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IRQ_ENABLE_APPLY(r2, r3) /* unmask, but still with ICS set */
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mtspr INTERRUPT_CRITICAL_SECTION, zero
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.global _cpu_idle_nap
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_cpu_idle_nap:
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nap
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nop /* avoid provoking the icache prefetch with a jump */
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jrp lr
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STD_ENDPROC(_cpu_idle)
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