9d664c0aec
Those architectures that have a special atomic_set implementation also need a special atomic_set_release(), because for the very same reason WRITE_ONCE() is broken for them, smp_store_release() is too. The vast majority is architectures that have spinlock hash based atomic implementation except hexagon which seems to have a hardware 'feature'. The spinlock based atomics should be SC, that is, none of them appear to place extra barriers in atomic_cmpxchg() or any of the other SC atomic primitives and therefore seem to rely on their spinlock implementation being SC (I did not fully validate all that). Therefore, the normal atomic_set() is SC and can be used at atomic_set_release(). Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Acked-by: Chris Metcalf <cmetcalf@mellanox.com> [for tile] Cc: Boqun Feng <boqun.feng@gmail.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Paul McKenney <paulmck@linux.vnet.ibm.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Will Deacon <will.deacon@arm.com> Cc: davem@davemloft.net Cc: james.hogan@imgtec.com Cc: jejb@parisc-linux.org Cc: rkuo@codeaurora.org Cc: vgupta@synopsys.com Link: http://lkml.kernel.org/r/20170609110506.yod47flaav3wgoj5@hirez.programming.kicks-ass.net Signed-off-by: Ingo Molnar <mingo@kernel.org>
68 lines
2.3 KiB
C
68 lines
2.3 KiB
C
/*
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* Generic implementation of 64-bit atomics using spinlocks,
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* useful on processors that don't have 64-bit atomic instructions.
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*
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* Copyright © 2009 Paul Mackerras, IBM Corp. <paulus@au1.ibm.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#ifndef _ASM_GENERIC_ATOMIC64_H
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#define _ASM_GENERIC_ATOMIC64_H
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typedef struct {
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long long counter;
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} atomic64_t;
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#define ATOMIC64_INIT(i) { (i) }
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extern long long atomic64_read(const atomic64_t *v);
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extern void atomic64_set(atomic64_t *v, long long i);
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#define atomic64_set_release(v, i) atomic64_set((v), (i))
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#define ATOMIC64_OP(op) \
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extern void atomic64_##op(long long a, atomic64_t *v);
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#define ATOMIC64_OP_RETURN(op) \
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extern long long atomic64_##op##_return(long long a, atomic64_t *v);
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#define ATOMIC64_FETCH_OP(op) \
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extern long long atomic64_fetch_##op(long long a, atomic64_t *v);
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#define ATOMIC64_OPS(op) ATOMIC64_OP(op) ATOMIC64_OP_RETURN(op) ATOMIC64_FETCH_OP(op)
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ATOMIC64_OPS(add)
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ATOMIC64_OPS(sub)
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#undef ATOMIC64_OPS
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#define ATOMIC64_OPS(op) ATOMIC64_OP(op) ATOMIC64_FETCH_OP(op)
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ATOMIC64_OPS(and)
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ATOMIC64_OPS(or)
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ATOMIC64_OPS(xor)
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#undef ATOMIC64_OPS
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#undef ATOMIC64_FETCH_OP
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#undef ATOMIC64_OP_RETURN
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#undef ATOMIC64_OP
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extern long long atomic64_dec_if_positive(atomic64_t *v);
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extern long long atomic64_cmpxchg(atomic64_t *v, long long o, long long n);
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extern long long atomic64_xchg(atomic64_t *v, long long new);
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extern int atomic64_add_unless(atomic64_t *v, long long a, long long u);
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#define atomic64_add_negative(a, v) (atomic64_add_return((a), (v)) < 0)
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#define atomic64_inc(v) atomic64_add(1LL, (v))
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#define atomic64_inc_return(v) atomic64_add_return(1LL, (v))
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#define atomic64_inc_and_test(v) (atomic64_inc_return(v) == 0)
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#define atomic64_sub_and_test(a, v) (atomic64_sub_return((a), (v)) == 0)
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#define atomic64_dec(v) atomic64_sub(1LL, (v))
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#define atomic64_dec_return(v) atomic64_sub_return(1LL, (v))
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#define atomic64_dec_and_test(v) (atomic64_dec_return((v)) == 0)
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#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1LL, 0LL)
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#endif /* _ASM_GENERIC_ATOMIC64_H */
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