![Dave Airlie](/assets/img/avatar_default.png)
Conflicts: drivers/gpu/drm/i915/intel_fb.c drivers/gpu/drm/radeon/r600_blit_kms.c drivers/gpu/drm/ttm/ttm_bo.c
419 lines
10 KiB
C
419 lines
10 KiB
C
/*
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* Copyright © 2007 David Airlie
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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* Authors:
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* David Airlie
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*/
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <linux/fb.h>
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#include "drmP.h"
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#include "drm.h"
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#include "drm_crtc.h"
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#include "drm_crtc_helper.h"
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#include "radeon_drm.h"
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#include "radeon.h"
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#include "drm_fb_helper.h"
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#include <linux/vga_switcheroo.h>
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/* object hierarchy -
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this contains a helper + a radeon fb
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the helper contains a pointer to radeon framebuffer baseclass.
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*/
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struct radeon_fbdev {
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struct drm_fb_helper helper;
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struct radeon_framebuffer rfb;
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struct list_head fbdev_list;
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struct radeon_device *rdev;
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};
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static struct fb_ops radeonfb_ops = {
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.owner = THIS_MODULE,
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.fb_check_var = drm_fb_helper_check_var,
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.fb_set_par = drm_fb_helper_set_par,
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.fb_fillrect = cfb_fillrect,
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.fb_copyarea = cfb_copyarea,
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.fb_imageblit = cfb_imageblit,
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.fb_pan_display = drm_fb_helper_pan_display,
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.fb_blank = drm_fb_helper_blank,
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.fb_setcmap = drm_fb_helper_setcmap,
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.fb_debug_enter = drm_fb_helper_debug_enter,
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.fb_debug_leave = drm_fb_helper_debug_leave,
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};
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static int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp, bool tiled)
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{
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int aligned = width;
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int align_large = (ASIC_IS_AVIVO(rdev)) || tiled;
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int pitch_mask = 0;
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switch (bpp / 8) {
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case 1:
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pitch_mask = align_large ? 255 : 127;
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break;
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case 2:
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pitch_mask = align_large ? 127 : 31;
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break;
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case 3:
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case 4:
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pitch_mask = align_large ? 63 : 15;
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break;
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}
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aligned += pitch_mask;
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aligned &= ~pitch_mask;
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return aligned;
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}
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static void radeonfb_destroy_pinned_object(struct drm_gem_object *gobj)
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{
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struct radeon_bo *rbo = gobj->driver_private;
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int ret;
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ret = radeon_bo_reserve(rbo, false);
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if (likely(ret == 0)) {
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radeon_bo_kunmap(rbo);
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radeon_bo_unpin(rbo);
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radeon_bo_unreserve(rbo);
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}
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drm_gem_object_unreference_unlocked(gobj);
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}
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static int radeonfb_create_pinned_object(struct radeon_fbdev *rfbdev,
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struct drm_mode_fb_cmd *mode_cmd,
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struct drm_gem_object **gobj_p)
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{
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struct radeon_device *rdev = rfbdev->rdev;
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struct drm_gem_object *gobj = NULL;
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struct radeon_bo *rbo = NULL;
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bool fb_tiled = false; /* useful for testing */
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u32 tiling_flags = 0;
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int ret;
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int aligned_size, size;
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/* need to align pitch with crtc limits */
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mode_cmd->pitch = radeon_align_pitch(rdev, mode_cmd->width, mode_cmd->bpp, fb_tiled) * ((mode_cmd->bpp + 1) / 8);
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size = mode_cmd->pitch * mode_cmd->height;
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aligned_size = ALIGN(size, PAGE_SIZE);
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ret = radeon_gem_object_create(rdev, aligned_size, 0,
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RADEON_GEM_DOMAIN_VRAM,
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false, true,
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&gobj);
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if (ret) {
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printk(KERN_ERR "failed to allocate framebuffer (%d)\n",
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aligned_size);
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return -ENOMEM;
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}
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rbo = gobj->driver_private;
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if (fb_tiled)
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tiling_flags = RADEON_TILING_MACRO;
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#ifdef __BIG_ENDIAN
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switch (mode_cmd->bpp) {
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case 32:
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tiling_flags |= RADEON_TILING_SWAP_32BIT;
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break;
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case 16:
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tiling_flags |= RADEON_TILING_SWAP_16BIT;
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default:
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break;
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}
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#endif
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if (tiling_flags) {
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ret = radeon_bo_set_tiling_flags(rbo,
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tiling_flags | RADEON_TILING_SURFACE,
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mode_cmd->pitch);
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if (ret)
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dev_err(rdev->dev, "FB failed to set tiling flags\n");
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}
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ret = radeon_bo_reserve(rbo, false);
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if (unlikely(ret != 0))
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goto out_unref;
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ret = radeon_bo_pin(rbo, RADEON_GEM_DOMAIN_VRAM, NULL);
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if (ret) {
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radeon_bo_unreserve(rbo);
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goto out_unref;
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}
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if (fb_tiled)
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radeon_bo_check_tiling(rbo, 0, 0);
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ret = radeon_bo_kmap(rbo, NULL);
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radeon_bo_unreserve(rbo);
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if (ret) {
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goto out_unref;
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}
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*gobj_p = gobj;
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return 0;
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out_unref:
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radeonfb_destroy_pinned_object(gobj);
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*gobj_p = NULL;
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return ret;
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}
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static int radeonfb_create(struct radeon_fbdev *rfbdev,
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struct drm_fb_helper_surface_size *sizes)
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{
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struct radeon_device *rdev = rfbdev->rdev;
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struct fb_info *info;
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struct drm_framebuffer *fb = NULL;
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struct drm_mode_fb_cmd mode_cmd;
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struct drm_gem_object *gobj = NULL;
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struct radeon_bo *rbo = NULL;
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struct device *device = &rdev->pdev->dev;
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int ret;
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unsigned long tmp;
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mode_cmd.width = sizes->surface_width;
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mode_cmd.height = sizes->surface_height;
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/* avivo can't scanout real 24bpp */
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if ((sizes->surface_bpp == 24) && ASIC_IS_AVIVO(rdev))
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sizes->surface_bpp = 32;
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mode_cmd.bpp = sizes->surface_bpp;
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mode_cmd.depth = sizes->surface_depth;
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ret = radeonfb_create_pinned_object(rfbdev, &mode_cmd, &gobj);
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rbo = gobj->driver_private;
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/* okay we have an object now allocate the framebuffer */
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info = framebuffer_alloc(0, device);
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if (info == NULL) {
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ret = -ENOMEM;
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goto out_unref;
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}
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info->par = rfbdev;
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radeon_framebuffer_init(rdev->ddev, &rfbdev->rfb, &mode_cmd, gobj);
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fb = &rfbdev->rfb.base;
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/* setup helper */
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rfbdev->helper.fb = fb;
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rfbdev->helper.fbdev = info;
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memset_io(rbo->kptr, 0x0, radeon_bo_size(rbo));
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strcpy(info->fix.id, "radeondrmfb");
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drm_fb_helper_fill_fix(info, fb->pitch, fb->depth);
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info->flags = FBINFO_DEFAULT | FBINFO_CAN_FORCE_OUTPUT;
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info->fbops = &radeonfb_ops;
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tmp = radeon_bo_gpu_offset(rbo) - rdev->mc.vram_start;
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info->fix.smem_start = rdev->mc.aper_base + tmp;
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info->fix.smem_len = radeon_bo_size(rbo);
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info->screen_base = rbo->kptr;
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info->screen_size = radeon_bo_size(rbo);
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drm_fb_helper_fill_var(info, &rfbdev->helper, sizes->fb_width, sizes->fb_height);
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/* setup aperture base/size for vesafb takeover */
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info->apertures = alloc_apertures(1);
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if (!info->apertures) {
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ret = -ENOMEM;
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goto out_unref;
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}
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info->apertures->ranges[0].base = rdev->ddev->mode_config.fb_base;
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info->apertures->ranges[0].size = rdev->mc.real_vram_size;
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info->fix.mmio_start = 0;
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info->fix.mmio_len = 0;
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info->pixmap.size = 64*1024;
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info->pixmap.buf_align = 8;
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info->pixmap.access_align = 32;
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info->pixmap.flags = FB_PIXMAP_SYSTEM;
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info->pixmap.scan_align = 1;
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if (info->screen_base == NULL) {
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ret = -ENOSPC;
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goto out_unref;
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}
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ret = fb_alloc_cmap(&info->cmap, 256, 0);
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if (ret) {
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ret = -ENOMEM;
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goto out_unref;
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}
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DRM_INFO("fb mappable at 0x%lX\n", info->fix.smem_start);
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DRM_INFO("vram apper at 0x%lX\n", (unsigned long)rdev->mc.aper_base);
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DRM_INFO("size %lu\n", (unsigned long)radeon_bo_size(rbo));
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DRM_INFO("fb depth is %d\n", fb->depth);
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DRM_INFO(" pitch is %d\n", fb->pitch);
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vga_switcheroo_client_fb_set(rdev->ddev->pdev, info);
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return 0;
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out_unref:
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if (rbo) {
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}
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if (fb && ret) {
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drm_gem_object_unreference(gobj);
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drm_framebuffer_cleanup(fb);
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kfree(fb);
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}
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return ret;
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}
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static int radeon_fb_find_or_create_single(struct drm_fb_helper *helper,
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struct drm_fb_helper_surface_size *sizes)
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{
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struct radeon_fbdev *rfbdev = (struct radeon_fbdev *)helper;
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int new_fb = 0;
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int ret;
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if (!helper->fb) {
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ret = radeonfb_create(rfbdev, sizes);
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if (ret)
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return ret;
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new_fb = 1;
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}
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return new_fb;
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}
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static char *mode_option;
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int radeon_parse_options(char *options)
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{
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char *this_opt;
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if (!options || !*options)
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return 0;
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while ((this_opt = strsep(&options, ",")) != NULL) {
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if (!*this_opt)
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continue;
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mode_option = this_opt;
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}
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return 0;
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}
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void radeon_fb_output_poll_changed(struct radeon_device *rdev)
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{
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drm_fb_helper_hotplug_event(&rdev->mode_info.rfbdev->helper);
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}
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static int radeon_fbdev_destroy(struct drm_device *dev, struct radeon_fbdev *rfbdev)
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{
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struct fb_info *info;
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struct radeon_framebuffer *rfb = &rfbdev->rfb;
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if (rfbdev->helper.fbdev) {
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info = rfbdev->helper.fbdev;
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unregister_framebuffer(info);
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if (info->cmap.len)
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fb_dealloc_cmap(&info->cmap);
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framebuffer_release(info);
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}
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if (rfb->obj) {
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radeonfb_destroy_pinned_object(rfb->obj);
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rfb->obj = NULL;
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}
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drm_fb_helper_fini(&rfbdev->helper);
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drm_framebuffer_cleanup(&rfb->base);
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return 0;
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}
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static struct drm_fb_helper_funcs radeon_fb_helper_funcs = {
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.gamma_set = radeon_crtc_fb_gamma_set,
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.gamma_get = radeon_crtc_fb_gamma_get,
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.fb_probe = radeon_fb_find_or_create_single,
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};
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int radeon_fbdev_init(struct radeon_device *rdev)
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{
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struct radeon_fbdev *rfbdev;
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int bpp_sel = 32;
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int ret;
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/* select 8 bpp console on RN50 or 16MB cards */
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if (ASIC_IS_RN50(rdev) || rdev->mc.real_vram_size <= (32*1024*1024))
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bpp_sel = 8;
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rfbdev = kzalloc(sizeof(struct radeon_fbdev), GFP_KERNEL);
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if (!rfbdev)
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return -ENOMEM;
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rfbdev->rdev = rdev;
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rdev->mode_info.rfbdev = rfbdev;
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rfbdev->helper.funcs = &radeon_fb_helper_funcs;
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ret = drm_fb_helper_init(rdev->ddev, &rfbdev->helper,
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rdev->num_crtc,
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RADEONFB_CONN_LIMIT);
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if (ret) {
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kfree(rfbdev);
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return ret;
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}
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drm_fb_helper_single_add_all_connectors(&rfbdev->helper);
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drm_fb_helper_initial_config(&rfbdev->helper, bpp_sel);
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return 0;
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}
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void radeon_fbdev_fini(struct radeon_device *rdev)
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{
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if (!rdev->mode_info.rfbdev)
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return;
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radeon_fbdev_destroy(rdev->ddev, rdev->mode_info.rfbdev);
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kfree(rdev->mode_info.rfbdev);
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rdev->mode_info.rfbdev = NULL;
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}
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void radeon_fbdev_set_suspend(struct radeon_device *rdev, int state)
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{
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fb_set_suspend(rdev->mode_info.rfbdev->helper.fbdev, state);
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}
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int radeon_fbdev_total_size(struct radeon_device *rdev)
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{
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struct radeon_bo *robj;
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int size = 0;
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robj = rdev->mode_info.rfbdev->rfb.obj->driver_private;
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size += radeon_bo_size(robj);
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return size;
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}
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bool radeon_fbdev_robj_is_fb(struct radeon_device *rdev, struct radeon_bo *robj)
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{
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if (robj == rdev->mode_info.rfbdev->rfb.obj->driver_private)
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return true;
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return false;
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}
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