0b7cbfb5e1
OMAP3430ES2+ introduces a new feature: optional powerdomain context
hardware save-and-restore (SAR). Currently, this feature only applies
to USBHOST and USBTLL module context when the USBHOST or CORE
powerdomains enter a low-power sleep state[1]. This feature avoids
re-enumeration of USB devices when the powerdomains return from idle,
which is potentially time-consuming.
This patch adds support for enabling and disabling hardware
save-and-restore to the powerdomain code. Three new functions are
added, pwrdm_enable_hdwr_sar(), pwrdm_disable_hdwr_sar(), and
pwrdm_can_hdwr_sar(). A new struct powerdomain "flags" field is
added, with a PWRDM_HAS_HDWR_SAR flag to indicate powerdomains with
SAR support.
Thanks to Jouni Högander <jouni.hogander@nokia.com> for reviewing an
earlier version of these patches, and Richard Woodruff <r-woodruff2@ti.com>
for clarifying the purpose of these bits.
1. For the USBHOST controller module, context loss occurs when the
USBHOST powerdomain enters off-idle. For USBTLL, context loss
occurs either if CORE enters off-idle, or if the CORE logic is
configured to turn off when CORE enters retention-idle (OSWR).
34xx ES2 TRM 4.8.6.1.1, 4.8.6.1.2
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
167 lines
4.8 KiB
C
167 lines
4.8 KiB
C
/*
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* OMAP2/3 powerdomain control
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*
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* Copyright (C) 2007-8 Texas Instruments, Inc.
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* Copyright (C) 2007-8 Nokia Corporation
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*
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* Written by Paul Walmsley
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef ASM_ARM_ARCH_OMAP_POWERDOMAIN
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#define ASM_ARM_ARCH_OMAP_POWERDOMAIN
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#include <linux/types.h>
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#include <linux/list.h>
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#include <asm/atomic.h>
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#include <mach/cpu.h>
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/* Powerdomain basic power states */
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#define PWRDM_POWER_OFF 0x0
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#define PWRDM_POWER_RET 0x1
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#define PWRDM_POWER_INACTIVE 0x2
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#define PWRDM_POWER_ON 0x3
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/* Powerdomain allowable state bitfields */
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#define PWRSTS_OFF_ON ((1 << PWRDM_POWER_OFF) | \
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(1 << PWRDM_POWER_ON))
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#define PWRSTS_OFF_RET ((1 << PWRDM_POWER_OFF) | \
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(1 << PWRDM_POWER_RET))
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#define PWRSTS_OFF_RET_ON (PWRSTS_OFF_RET | (1 << PWRDM_POWER_ON))
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/* Powerdomain flags */
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#define PWRDM_HAS_HDWR_SAR (1 << 0) /* hardware save-and-restore support */
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/*
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* Number of memory banks that are power-controllable. On OMAP3430, the
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* maximum is 4.
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*/
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#define PWRDM_MAX_MEM_BANKS 4
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/*
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* Maximum number of clockdomains that can be associated with a powerdomain.
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* CORE powerdomain is probably the worst case.
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*/
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#define PWRDM_MAX_CLKDMS 3
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/* XXX A completely arbitrary number. What is reasonable here? */
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#define PWRDM_TRANSITION_BAILOUT 100000
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struct clockdomain;
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struct powerdomain;
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/* Encodes dependencies between powerdomains - statically defined */
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struct pwrdm_dep {
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/* Powerdomain name */
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const char *pwrdm_name;
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/* Powerdomain pointer - resolved by the powerdomain code */
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struct powerdomain *pwrdm;
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/* Flags to mark OMAP chip restrictions, etc. */
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const struct omap_chip_id omap_chip;
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};
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struct powerdomain {
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/* Powerdomain name */
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const char *name;
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/* the address offset from CM_BASE/PRM_BASE */
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const s16 prcm_offs;
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/* Used to represent the OMAP chip types containing this pwrdm */
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const struct omap_chip_id omap_chip;
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/* Bit shift of this powerdomain's PM_WKDEP/CM_SLEEPDEP bit */
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const u8 dep_bit;
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/* Powerdomains that can be told to wake this powerdomain up */
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struct pwrdm_dep *wkdep_srcs;
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/* Powerdomains that can be told to keep this pwrdm from inactivity */
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struct pwrdm_dep *sleepdep_srcs;
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/* Possible powerdomain power states */
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const u8 pwrsts;
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/* Possible logic power states when pwrdm in RETENTION */
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const u8 pwrsts_logic_ret;
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/* Powerdomain flags */
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const u8 flags;
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/* Number of software-controllable memory banks in this powerdomain */
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const u8 banks;
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/* Possible memory bank pwrstates when pwrdm in RETENTION */
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const u8 pwrsts_mem_ret[PWRDM_MAX_MEM_BANKS];
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/* Possible memory bank pwrstates when pwrdm is ON */
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const u8 pwrsts_mem_on[PWRDM_MAX_MEM_BANKS];
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/* Clockdomains in this powerdomain */
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struct clockdomain *pwrdm_clkdms[PWRDM_MAX_CLKDMS];
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struct list_head node;
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};
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void pwrdm_init(struct powerdomain **pwrdm_list);
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int pwrdm_register(struct powerdomain *pwrdm);
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int pwrdm_unregister(struct powerdomain *pwrdm);
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struct powerdomain *pwrdm_lookup(const char *name);
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int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm));
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int pwrdm_add_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm);
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int pwrdm_del_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm);
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int pwrdm_for_each_clkdm(struct powerdomain *pwrdm,
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int (*fn)(struct powerdomain *pwrdm,
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struct clockdomain *clkdm));
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int pwrdm_add_wkdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2);
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int pwrdm_del_wkdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2);
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int pwrdm_read_wkdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2);
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int pwrdm_add_sleepdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2);
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int pwrdm_del_sleepdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2);
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int pwrdm_read_sleepdep(struct powerdomain *pwrdm1, struct powerdomain *pwrdm2);
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int pwrdm_get_mem_bank_count(struct powerdomain *pwrdm);
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int pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst);
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int pwrdm_read_next_pwrst(struct powerdomain *pwrdm);
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int pwrdm_read_prev_pwrst(struct powerdomain *pwrdm);
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int pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm);
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int pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst);
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int pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, u8 pwrst);
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int pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, u8 pwrst);
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int pwrdm_read_logic_pwrst(struct powerdomain *pwrdm);
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int pwrdm_read_prev_logic_pwrst(struct powerdomain *pwrdm);
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int pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank);
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int pwrdm_read_prev_mem_pwrst(struct powerdomain *pwrdm, u8 bank);
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int pwrdm_enable_hdwr_sar(struct powerdomain *pwrdm);
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int pwrdm_disable_hdwr_sar(struct powerdomain *pwrdm);
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bool pwrdm_has_hdwr_sar(struct powerdomain *pwrdm);
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int pwrdm_wait_transition(struct powerdomain *pwrdm);
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#endif
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