![Jiang Liu](/assets/img/avatar_default.png)
Use kmalloc_node() instead of kmalloc() when possible to optimize for performance on NUMA platforms. Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: David Rientjes <rientjes@google.com> Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Cc: Tony Luck <tony.luck@intel.com> Cc: Joerg Roedel <joro@8bytes.org> Cc: Paul Gortmaker <paul.gortmaker@windriver.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Grant Likely <grant.likely@linaro.org> Cc: Rafael J. Wysocki <rjw@rjwysocki.net> Cc: Randy Dunlap <rdunlap@infradead.org> Cc: Yinghai Lu <yinghai@kernel.org> Link: http://lkml.kernel.org/r/1402302011-23642-6-git-send-email-jiang.liu@linux.intel.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
603 lines
15 KiB
C
603 lines
15 KiB
C
#include <linux/pci.h>
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#include <linux/acpi.h>
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#include <linux/init.h>
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#include <linux/irq.h>
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#include <linux/dmi.h>
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#include <linux/slab.h>
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#include <asm/numa.h>
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#include <asm/pci_x86.h>
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struct pci_root_info {
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struct acpi_device *bridge;
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char name[16];
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unsigned int res_num;
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struct resource *res;
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resource_size_t *res_offset;
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struct pci_sysdata sd;
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#ifdef CONFIG_PCI_MMCONFIG
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bool mcfg_added;
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u16 segment;
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u8 start_bus;
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u8 end_bus;
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#endif
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};
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static bool pci_use_crs = true;
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static bool pci_ignore_seg = false;
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static int __init set_use_crs(const struct dmi_system_id *id)
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{
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pci_use_crs = true;
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return 0;
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}
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static int __init set_nouse_crs(const struct dmi_system_id *id)
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{
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pci_use_crs = false;
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return 0;
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}
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static int __init set_ignore_seg(const struct dmi_system_id *id)
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{
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printk(KERN_INFO "PCI: %s detected: ignoring ACPI _SEG\n", id->ident);
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pci_ignore_seg = true;
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return 0;
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}
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static const struct dmi_system_id pci_crs_quirks[] __initconst = {
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/* http://bugzilla.kernel.org/show_bug.cgi?id=14183 */
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{
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.callback = set_use_crs,
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.ident = "IBM System x3800",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
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DMI_MATCH(DMI_PRODUCT_NAME, "x3800"),
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},
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},
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/* https://bugzilla.kernel.org/show_bug.cgi?id=16007 */
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/* 2006 AMD HT/VIA system with two host bridges */
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{
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.callback = set_use_crs,
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.ident = "ASRock ALiveSATA2-GLAN",
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.matches = {
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DMI_MATCH(DMI_PRODUCT_NAME, "ALiveSATA2-GLAN"),
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},
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},
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/* https://bugzilla.kernel.org/show_bug.cgi?id=30552 */
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/* 2006 AMD HT/VIA system with two host bridges */
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{
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.callback = set_use_crs,
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.ident = "ASUS M2V-MX SE",
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.matches = {
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DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
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DMI_MATCH(DMI_BOARD_NAME, "M2V-MX SE"),
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DMI_MATCH(DMI_BIOS_VENDOR, "American Megatrends Inc."),
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},
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},
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/* https://bugzilla.kernel.org/show_bug.cgi?id=42619 */
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{
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.callback = set_use_crs,
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.ident = "MSI MS-7253",
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.matches = {
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DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
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DMI_MATCH(DMI_BOARD_NAME, "MS-7253"),
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DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies, LTD"),
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},
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},
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/* Now for the blacklist.. */
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/* https://bugzilla.redhat.com/show_bug.cgi?id=769657 */
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{
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.callback = set_nouse_crs,
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.ident = "Dell Studio 1557",
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.matches = {
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DMI_MATCH(DMI_BOARD_VENDOR, "Dell Inc."),
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DMI_MATCH(DMI_PRODUCT_NAME, "Studio 1557"),
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DMI_MATCH(DMI_BIOS_VERSION, "A09"),
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},
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},
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/* https://bugzilla.redhat.com/show_bug.cgi?id=769657 */
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{
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.callback = set_nouse_crs,
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.ident = "Thinkpad SL510",
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.matches = {
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DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"),
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DMI_MATCH(DMI_BOARD_NAME, "2847DFG"),
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DMI_MATCH(DMI_BIOS_VERSION, "6JET85WW (1.43 )"),
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},
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},
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/* https://bugzilla.kernel.org/show_bug.cgi?id=15362 */
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{
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.callback = set_ignore_seg,
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.ident = "HP xw9300",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
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DMI_MATCH(DMI_PRODUCT_NAME, "HP xw9300 Workstation"),
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},
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},
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{}
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};
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void __init pci_acpi_crs_quirks(void)
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{
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int year;
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if (dmi_get_date(DMI_BIOS_DATE, &year, NULL, NULL) && year < 2008)
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pci_use_crs = false;
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dmi_check_system(pci_crs_quirks);
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/*
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* If the user specifies "pci=use_crs" or "pci=nocrs" explicitly, that
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* takes precedence over anything we figured out above.
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*/
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if (pci_probe & PCI_ROOT_NO_CRS)
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pci_use_crs = false;
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else if (pci_probe & PCI_USE__CRS)
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pci_use_crs = true;
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printk(KERN_INFO "PCI: %s host bridge windows from ACPI; "
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"if necessary, use \"pci=%s\" and report a bug\n",
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pci_use_crs ? "Using" : "Ignoring",
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pci_use_crs ? "nocrs" : "use_crs");
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}
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#ifdef CONFIG_PCI_MMCONFIG
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static int check_segment(u16 seg, struct device *dev, char *estr)
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{
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if (seg) {
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dev_err(dev,
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"%s can't access PCI configuration "
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"space under this host bridge.\n",
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estr);
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return -EIO;
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}
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/*
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* Failure in adding MMCFG information is not fatal,
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* just can't access extended configuration space of
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* devices under this host bridge.
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*/
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dev_warn(dev,
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"%s can't access extended PCI configuration "
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"space under this bridge.\n",
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estr);
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return 0;
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}
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static int setup_mcfg_map(struct pci_root_info *info, u16 seg, u8 start,
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u8 end, phys_addr_t addr)
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{
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int result;
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struct device *dev = &info->bridge->dev;
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info->start_bus = start;
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info->end_bus = end;
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info->mcfg_added = false;
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/* return success if MMCFG is not in use */
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if (raw_pci_ext_ops && raw_pci_ext_ops != &pci_mmcfg)
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return 0;
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if (!(pci_probe & PCI_PROBE_MMCONF))
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return check_segment(seg, dev, "MMCONFIG is disabled,");
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result = pci_mmconfig_insert(dev, seg, start, end, addr);
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if (result == 0) {
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/* enable MMCFG if it hasn't been enabled yet */
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if (raw_pci_ext_ops == NULL)
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raw_pci_ext_ops = &pci_mmcfg;
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info->mcfg_added = true;
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} else if (result != -EEXIST)
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return check_segment(seg, dev,
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"fail to add MMCONFIG information,");
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return 0;
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}
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static void teardown_mcfg_map(struct pci_root_info *info)
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{
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if (info->mcfg_added) {
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pci_mmconfig_delete(info->segment, info->start_bus,
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info->end_bus);
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info->mcfg_added = false;
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}
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}
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#else
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static int setup_mcfg_map(struct pci_root_info *info,
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u16 seg, u8 start, u8 end,
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phys_addr_t addr)
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{
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return 0;
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}
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static void teardown_mcfg_map(struct pci_root_info *info)
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{
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}
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#endif
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static acpi_status resource_to_addr(struct acpi_resource *resource,
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struct acpi_resource_address64 *addr)
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{
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acpi_status status;
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struct acpi_resource_memory24 *memory24;
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struct acpi_resource_memory32 *memory32;
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struct acpi_resource_fixed_memory32 *fixed_memory32;
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memset(addr, 0, sizeof(*addr));
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switch (resource->type) {
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case ACPI_RESOURCE_TYPE_MEMORY24:
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memory24 = &resource->data.memory24;
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addr->resource_type = ACPI_MEMORY_RANGE;
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addr->minimum = memory24->minimum;
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addr->address_length = memory24->address_length;
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addr->maximum = addr->minimum + addr->address_length - 1;
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return AE_OK;
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case ACPI_RESOURCE_TYPE_MEMORY32:
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memory32 = &resource->data.memory32;
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addr->resource_type = ACPI_MEMORY_RANGE;
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addr->minimum = memory32->minimum;
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addr->address_length = memory32->address_length;
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addr->maximum = addr->minimum + addr->address_length - 1;
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return AE_OK;
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case ACPI_RESOURCE_TYPE_FIXED_MEMORY32:
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fixed_memory32 = &resource->data.fixed_memory32;
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addr->resource_type = ACPI_MEMORY_RANGE;
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addr->minimum = fixed_memory32->address;
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addr->address_length = fixed_memory32->address_length;
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addr->maximum = addr->minimum + addr->address_length - 1;
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return AE_OK;
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case ACPI_RESOURCE_TYPE_ADDRESS16:
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case ACPI_RESOURCE_TYPE_ADDRESS32:
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case ACPI_RESOURCE_TYPE_ADDRESS64:
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status = acpi_resource_to_address64(resource, addr);
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if (ACPI_SUCCESS(status) &&
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(addr->resource_type == ACPI_MEMORY_RANGE ||
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addr->resource_type == ACPI_IO_RANGE) &&
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addr->address_length > 0) {
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return AE_OK;
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}
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break;
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}
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return AE_ERROR;
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}
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static acpi_status count_resource(struct acpi_resource *acpi_res, void *data)
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{
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struct pci_root_info *info = data;
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struct acpi_resource_address64 addr;
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acpi_status status;
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status = resource_to_addr(acpi_res, &addr);
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if (ACPI_SUCCESS(status))
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info->res_num++;
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return AE_OK;
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}
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static acpi_status setup_resource(struct acpi_resource *acpi_res, void *data)
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{
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struct pci_root_info *info = data;
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struct resource *res;
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struct acpi_resource_address64 addr;
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acpi_status status;
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unsigned long flags;
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u64 start, orig_end, end;
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status = resource_to_addr(acpi_res, &addr);
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if (!ACPI_SUCCESS(status))
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return AE_OK;
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if (addr.resource_type == ACPI_MEMORY_RANGE) {
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flags = IORESOURCE_MEM;
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if (addr.info.mem.caching == ACPI_PREFETCHABLE_MEMORY)
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flags |= IORESOURCE_PREFETCH;
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} else if (addr.resource_type == ACPI_IO_RANGE) {
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flags = IORESOURCE_IO;
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} else
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return AE_OK;
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start = addr.minimum + addr.translation_offset;
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orig_end = end = addr.maximum + addr.translation_offset;
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/* Exclude non-addressable range or non-addressable portion of range */
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end = min(end, (u64)iomem_resource.end);
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if (end <= start) {
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dev_info(&info->bridge->dev,
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"host bridge window [%#llx-%#llx] "
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"(ignored, not CPU addressable)\n", start, orig_end);
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return AE_OK;
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} else if (orig_end != end) {
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dev_info(&info->bridge->dev,
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"host bridge window [%#llx-%#llx] "
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"([%#llx-%#llx] ignored, not CPU addressable)\n",
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start, orig_end, end + 1, orig_end);
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}
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res = &info->res[info->res_num];
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res->name = info->name;
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res->flags = flags;
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res->start = start;
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res->end = end;
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info->res_offset[info->res_num] = addr.translation_offset;
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info->res_num++;
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if (!pci_use_crs)
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dev_printk(KERN_DEBUG, &info->bridge->dev,
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"host bridge window %pR (ignored)\n", res);
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return AE_OK;
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}
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static void coalesce_windows(struct pci_root_info *info, unsigned long type)
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{
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int i, j;
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struct resource *res1, *res2;
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for (i = 0; i < info->res_num; i++) {
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res1 = &info->res[i];
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if (!(res1->flags & type))
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continue;
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for (j = i + 1; j < info->res_num; j++) {
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res2 = &info->res[j];
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if (!(res2->flags & type))
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continue;
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/*
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* I don't like throwing away windows because then
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* our resources no longer match the ACPI _CRS, but
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* the kernel resource tree doesn't allow overlaps.
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*/
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if (resource_overlaps(res1, res2)) {
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res2->start = min(res1->start, res2->start);
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res2->end = max(res1->end, res2->end);
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dev_info(&info->bridge->dev,
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"host bridge window expanded to %pR; %pR ignored\n",
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res2, res1);
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res1->flags = 0;
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}
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}
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}
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}
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static void add_resources(struct pci_root_info *info,
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struct list_head *resources)
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{
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int i;
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struct resource *res, *root, *conflict;
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coalesce_windows(info, IORESOURCE_MEM);
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coalesce_windows(info, IORESOURCE_IO);
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for (i = 0; i < info->res_num; i++) {
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res = &info->res[i];
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if (res->flags & IORESOURCE_MEM)
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root = &iomem_resource;
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else if (res->flags & IORESOURCE_IO)
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root = &ioport_resource;
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else
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continue;
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conflict = insert_resource_conflict(root, res);
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if (conflict)
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dev_info(&info->bridge->dev,
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"ignoring host bridge window %pR (conflicts with %s %pR)\n",
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res, conflict->name, conflict);
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else
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pci_add_resource_offset(resources, res,
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info->res_offset[i]);
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}
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}
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static void free_pci_root_info_res(struct pci_root_info *info)
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{
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kfree(info->res);
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info->res = NULL;
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kfree(info->res_offset);
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info->res_offset = NULL;
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info->res_num = 0;
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}
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static void __release_pci_root_info(struct pci_root_info *info)
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{
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int i;
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struct resource *res;
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for (i = 0; i < info->res_num; i++) {
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res = &info->res[i];
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if (!res->parent)
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continue;
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if (!(res->flags & (IORESOURCE_MEM | IORESOURCE_IO)))
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continue;
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release_resource(res);
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}
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free_pci_root_info_res(info);
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teardown_mcfg_map(info);
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kfree(info);
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}
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static void release_pci_root_info(struct pci_host_bridge *bridge)
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{
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struct pci_root_info *info = bridge->release_data;
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__release_pci_root_info(info);
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}
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static void probe_pci_root_info(struct pci_root_info *info,
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struct acpi_device *device,
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int busnum, int domain)
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{
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size_t size;
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sprintf(info->name, "PCI Bus %04x:%02x", domain, busnum);
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info->bridge = device;
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info->res_num = 0;
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acpi_walk_resources(device->handle, METHOD_NAME__CRS, count_resource,
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info);
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if (!info->res_num)
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return;
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size = sizeof(*info->res) * info->res_num;
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info->res = kzalloc_node(size, GFP_KERNEL, info->sd.node);
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if (!info->res) {
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info->res_num = 0;
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return;
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}
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size = sizeof(*info->res_offset) * info->res_num;
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info->res_num = 0;
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info->res_offset = kzalloc_node(size, GFP_KERNEL, info->sd.node);
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if (!info->res_offset) {
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kfree(info->res);
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info->res = NULL;
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return;
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}
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acpi_walk_resources(device->handle, METHOD_NAME__CRS, setup_resource,
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info);
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}
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struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root)
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{
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struct acpi_device *device = root->device;
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struct pci_root_info *info;
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int domain = root->segment;
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int busnum = root->secondary.start;
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LIST_HEAD(resources);
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struct pci_bus *bus;
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struct pci_sysdata *sd;
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int node;
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if (pci_ignore_seg)
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domain = 0;
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if (domain && !pci_domains_supported) {
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printk(KERN_WARNING "pci_bus %04x:%02x: "
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"ignored (multiple domains not supported)\n",
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domain, busnum);
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return NULL;
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}
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node = acpi_get_node(device->handle);
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if (node == NUMA_NO_NODE) {
|
|
node = x86_pci_root_bus_node(busnum);
|
|
if (node != 0 && node != NUMA_NO_NODE)
|
|
dev_info(&device->dev, FW_BUG "no _PXM; falling back to node %d from hardware (may be inconsistent with ACPI node numbers)\n",
|
|
node);
|
|
}
|
|
|
|
if (node != NUMA_NO_NODE && !node_online(node))
|
|
node = NUMA_NO_NODE;
|
|
|
|
info = kzalloc_node(sizeof(*info), GFP_KERNEL, node);
|
|
if (!info) {
|
|
printk(KERN_WARNING "pci_bus %04x:%02x: "
|
|
"ignored (out of memory)\n", domain, busnum);
|
|
return NULL;
|
|
}
|
|
|
|
sd = &info->sd;
|
|
sd->domain = domain;
|
|
sd->node = node;
|
|
sd->companion = device;
|
|
|
|
bus = pci_find_bus(domain, busnum);
|
|
if (bus) {
|
|
/*
|
|
* If the desired bus has been scanned already, replace
|
|
* its bus->sysdata.
|
|
*/
|
|
memcpy(bus->sysdata, sd, sizeof(*sd));
|
|
kfree(info);
|
|
} else {
|
|
probe_pci_root_info(info, device, busnum, domain);
|
|
|
|
/* insert busn res at first */
|
|
pci_add_resource(&resources, &root->secondary);
|
|
/*
|
|
* _CRS with no apertures is normal, so only fall back to
|
|
* defaults or native bridge info if we're ignoring _CRS.
|
|
*/
|
|
if (pci_use_crs)
|
|
add_resources(info, &resources);
|
|
else {
|
|
free_pci_root_info_res(info);
|
|
x86_pci_root_bus_resources(busnum, &resources);
|
|
}
|
|
|
|
if (!setup_mcfg_map(info, domain, (u8)root->secondary.start,
|
|
(u8)root->secondary.end, root->mcfg_addr))
|
|
bus = pci_create_root_bus(NULL, busnum, &pci_root_ops,
|
|
sd, &resources);
|
|
|
|
if (bus) {
|
|
pci_scan_child_bus(bus);
|
|
pci_set_host_bridge_release(
|
|
to_pci_host_bridge(bus->bridge),
|
|
release_pci_root_info, info);
|
|
} else {
|
|
pci_free_resource_list(&resources);
|
|
__release_pci_root_info(info);
|
|
}
|
|
}
|
|
|
|
/* After the PCI-E bus has been walked and all devices discovered,
|
|
* configure any settings of the fabric that might be necessary.
|
|
*/
|
|
if (bus) {
|
|
struct pci_bus *child;
|
|
list_for_each_entry(child, &bus->children, node)
|
|
pcie_bus_configure_settings(child);
|
|
}
|
|
|
|
if (bus && node != NUMA_NO_NODE)
|
|
dev_printk(KERN_DEBUG, &bus->dev, "on NUMA node %d\n", node);
|
|
|
|
return bus;
|
|
}
|
|
|
|
int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge)
|
|
{
|
|
struct pci_sysdata *sd = bridge->bus->sysdata;
|
|
|
|
ACPI_COMPANION_SET(&bridge->dev, sd->companion);
|
|
return 0;
|
|
}
|
|
|
|
int __init pci_acpi_init(void)
|
|
{
|
|
struct pci_dev *dev = NULL;
|
|
|
|
if (acpi_noirq)
|
|
return -ENODEV;
|
|
|
|
printk(KERN_INFO "PCI: Using ACPI for IRQ routing\n");
|
|
acpi_irq_penalty_init();
|
|
pcibios_enable_irq = acpi_pci_irq_enable;
|
|
pcibios_disable_irq = acpi_pci_irq_disable;
|
|
x86_init.pci.init_irq = x86_init_noop;
|
|
|
|
if (pci_routeirq) {
|
|
/*
|
|
* PCI IRQ routing is set up by pci_enable_device(), but we
|
|
* also do it here in case there are still broken drivers that
|
|
* don't use pci_enable_device().
|
|
*/
|
|
printk(KERN_INFO "PCI: Routing PCI interrupts for all devices because \"pci=routeirq\" specified\n");
|
|
for_each_pci_dev(dev)
|
|
acpi_pci_irq_enable(dev);
|
|
}
|
|
|
|
return 0;
|
|
}
|