![Amir Vadai](/assets/img/avatar_default.png)
The patch allows to enable/disable HW timestamping for incoming and/or outgoing packets. It adds and initializes all structs and callbacks needed by kernel TS API. To enable/disable HW timestamping appropriate ioctl should be used. Currently HWTSTAMP_FILTER_ALL/NONE and HWTSAMP_TX_ON/OFF only are supported. When enabling TS on receive flow - VLAN stripping will be disabled. Also were made all relevant changes in RX/TX flows to consider TS request and plant HW timestamps into relevant structures. mlx4_ib was fixed to compile with new mlx4_cq_alloc() signature. Signed-off-by: Eugenia Emantayev <eugenia@mellanox.com> Signed-off-by: Amir Vadai <amirv@mellanox.com> Signed-off-by: David S. Miller <davem@davemloft.net>
167 lines
4.3 KiB
C
167 lines
4.3 KiB
C
/*
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* Copyright (c) 2007 Cisco Systems, Inc. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#ifndef MLX4_CQ_H
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#define MLX4_CQ_H
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#include <linux/types.h>
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#include <linux/mlx4/device.h>
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#include <linux/mlx4/doorbell.h>
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struct mlx4_cqe {
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__be32 vlan_my_qpn;
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__be32 immed_rss_invalid;
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__be32 g_mlpath_rqpn;
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__be16 sl_vid;
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__be16 rlid;
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__be16 status;
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u8 ipv6_ext_mask;
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u8 badfcs_enc;
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__be32 byte_cnt;
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__be16 wqe_index;
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__be16 checksum;
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u8 reserved[3];
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u8 owner_sr_opcode;
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};
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struct mlx4_err_cqe {
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__be32 my_qpn;
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u32 reserved1[5];
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__be16 wqe_index;
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u8 vendor_err_syndrome;
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u8 syndrome;
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u8 reserved2[3];
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u8 owner_sr_opcode;
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};
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struct mlx4_ts_cqe {
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__be32 vlan_my_qpn;
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__be32 immed_rss_invalid;
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__be32 g_mlpath_rqpn;
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__be32 timestamp_hi;
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__be16 status;
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u8 ipv6_ext_mask;
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u8 badfcs_enc;
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__be32 byte_cnt;
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__be16 wqe_index;
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__be16 checksum;
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u8 reserved;
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__be16 timestamp_lo;
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u8 owner_sr_opcode;
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} __packed;
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enum {
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MLX4_CQE_VLAN_PRESENT_MASK = 1 << 29,
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MLX4_CQE_QPN_MASK = 0xffffff,
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};
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enum {
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MLX4_CQE_OWNER_MASK = 0x80,
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MLX4_CQE_IS_SEND_MASK = 0x40,
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MLX4_CQE_OPCODE_MASK = 0x1f
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};
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enum {
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MLX4_CQE_SYNDROME_LOCAL_LENGTH_ERR = 0x01,
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MLX4_CQE_SYNDROME_LOCAL_QP_OP_ERR = 0x02,
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MLX4_CQE_SYNDROME_LOCAL_PROT_ERR = 0x04,
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MLX4_CQE_SYNDROME_WR_FLUSH_ERR = 0x05,
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MLX4_CQE_SYNDROME_MW_BIND_ERR = 0x06,
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MLX4_CQE_SYNDROME_BAD_RESP_ERR = 0x10,
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MLX4_CQE_SYNDROME_LOCAL_ACCESS_ERR = 0x11,
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MLX4_CQE_SYNDROME_REMOTE_INVAL_REQ_ERR = 0x12,
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MLX4_CQE_SYNDROME_REMOTE_ACCESS_ERR = 0x13,
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MLX4_CQE_SYNDROME_REMOTE_OP_ERR = 0x14,
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MLX4_CQE_SYNDROME_TRANSPORT_RETRY_EXC_ERR = 0x15,
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MLX4_CQE_SYNDROME_RNR_RETRY_EXC_ERR = 0x16,
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MLX4_CQE_SYNDROME_REMOTE_ABORTED_ERR = 0x22,
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};
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enum {
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MLX4_CQE_STATUS_IPV4 = 1 << 6,
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MLX4_CQE_STATUS_IPV4F = 1 << 7,
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MLX4_CQE_STATUS_IPV6 = 1 << 8,
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MLX4_CQE_STATUS_IPV4OPT = 1 << 9,
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MLX4_CQE_STATUS_TCP = 1 << 10,
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MLX4_CQE_STATUS_UDP = 1 << 11,
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MLX4_CQE_STATUS_IPOK = 1 << 12,
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};
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enum {
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MLX4_CQE_LLC = 1,
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MLX4_CQE_SNAP = 1 << 1,
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MLX4_CQE_BAD_FCS = 1 << 4,
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};
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static inline void mlx4_cq_arm(struct mlx4_cq *cq, u32 cmd,
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void __iomem *uar_page,
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spinlock_t *doorbell_lock)
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{
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__be32 doorbell[2];
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u32 sn;
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u32 ci;
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sn = cq->arm_sn & 3;
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ci = cq->cons_index & 0xffffff;
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*cq->arm_db = cpu_to_be32(sn << 28 | cmd | ci);
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/*
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* Make sure that the doorbell record in host memory is
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* written before ringing the doorbell via PCI MMIO.
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*/
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wmb();
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doorbell[0] = cpu_to_be32(sn << 28 | cmd | cq->cqn);
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doorbell[1] = cpu_to_be32(ci);
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mlx4_write64(doorbell, uar_page + MLX4_CQ_DOORBELL, doorbell_lock);
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}
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static inline void mlx4_cq_set_ci(struct mlx4_cq *cq)
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{
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*cq->set_ci_db = cpu_to_be32(cq->cons_index & 0xffffff);
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}
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enum {
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MLX4_CQ_DB_REQ_NOT_SOL = 1 << 24,
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MLX4_CQ_DB_REQ_NOT = 2 << 24
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};
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int mlx4_cq_modify(struct mlx4_dev *dev, struct mlx4_cq *cq,
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u16 count, u16 period);
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int mlx4_cq_resize(struct mlx4_dev *dev, struct mlx4_cq *cq,
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int entries, struct mlx4_mtt *mtt);
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#endif /* MLX4_CQ_H */
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