eac5794994
If we're not connecting external GPIO extenders via i2c or spi or whatever, we probably don't need GPIOLIB. If we provide an alternate implementation of the GPIOLIB functions to use when only on-chip GPIO is needed, we can change ARCH_REQUIRE_GPIOLIB to ARCH_WANTS_OPTIONAL_GPIOLIB so that GPIOLIB becomes optional. The downside is that in the GPIOLIB=n case, we lose all error checking done by gpiolib, ie multiply allocating the gpio, free'ing gpio etc., so that the only checking that can be done is if we reference a gpio on an external part. Targets that need the extra error checking can still select GPIOLIB=y. For the case where GPIOLIB=y, we can simplify the table of gpio chips to use a single chip, eliminating the tables of chips in the 5xxx.c files. The original motivation for the definition of multiple chips was to match the way many of the Coldfire variants defined their gpio as a spare array in memory. However, all this really gains us is some error checking when we request a gpio, gpiolib can check that it doesn't fall in one of the holes. If thats important, I think we can still come up with a better way of accomplishing that. Also in this patch is some general cleanup and reorganizing of the gpio header files (I'm sure I must have had a reason why I sometimes used a prefix of mcf_gpio and other times mcfgpio but for the life of me I can't think of it now). Signed-off-by: Steven King <sfking@fdwdc.com> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
175 lines
3.9 KiB
C
175 lines
3.9 KiB
C
/*
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* Coldfire generic GPIO support.
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*
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* (C) Copyright 2009, Steven King <sfking@fdwdc.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/device.h>
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#include <linux/io.h>
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#include <asm/coldfire.h>
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#include <asm/mcfsim.h>
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#include <asm/mcfgpio.h>
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int __mcfgpio_get_value(unsigned gpio)
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{
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return mcfgpio_read(__mcfgpio_ppdr(gpio)) & mcfgpio_bit(gpio);
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}
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EXPORT_SYMBOL(__mcfgpio_get_value);
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void __mcfgpio_set_value(unsigned gpio, int value)
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{
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if (gpio < MCFGPIO_SCR_START) {
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unsigned long flags;
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MCFGPIO_PORTTYPE data;
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local_irq_save(flags);
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data = mcfgpio_read(__mcfgpio_podr(gpio));
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if (value)
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data |= mcfgpio_bit(gpio);
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else
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data &= ~mcfgpio_bit(gpio);
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mcfgpio_write(data, __mcfgpio_podr(gpio));
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local_irq_restore(flags);
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} else {
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if (value)
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mcfgpio_write(mcfgpio_bit(gpio),
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MCFGPIO_SETR_PORT(gpio));
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else
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mcfgpio_write(~mcfgpio_bit(gpio),
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MCFGPIO_CLRR_PORT(gpio));
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}
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}
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EXPORT_SYMBOL(__mcfgpio_set_value);
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int __mcfgpio_direction_input(unsigned gpio)
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{
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unsigned long flags;
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MCFGPIO_PORTTYPE dir;
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local_irq_save(flags);
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dir = mcfgpio_read(__mcfgpio_pddr(gpio));
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dir &= ~mcfgpio_bit(gpio);
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mcfgpio_write(dir, __mcfgpio_pddr(gpio));
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local_irq_restore(flags);
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return 0;
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}
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EXPORT_SYMBOL(__mcfgpio_direction_input);
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int __mcfgpio_direction_output(unsigned gpio, int value)
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{
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unsigned long flags;
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MCFGPIO_PORTTYPE data;
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local_irq_save(flags);
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data = mcfgpio_read(__mcfgpio_pddr(gpio));
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if (value)
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data |= mcfgpio_bit(gpio);
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else
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data &= mcfgpio_bit(gpio);
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mcfgpio_write(data, __mcfgpio_pddr(gpio));
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/* now set the data to output */
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if (gpio < MCFGPIO_SCR_START) {
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data = mcfgpio_read(__mcfgpio_podr(gpio));
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if (value)
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data |= mcfgpio_bit(gpio);
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else
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data &= ~mcfgpio_bit(gpio);
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mcfgpio_write(data, __mcfgpio_podr(gpio));
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} else {
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if (value)
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mcfgpio_write(mcfgpio_bit(gpio),
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MCFGPIO_SETR_PORT(gpio));
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else
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mcfgpio_write(~mcfgpio_bit(gpio),
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MCFGPIO_CLRR_PORT(gpio));
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}
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local_irq_restore(flags);
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return 0;
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}
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EXPORT_SYMBOL(__mcfgpio_direction_output);
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int __mcfgpio_request(unsigned gpio)
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{
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return 0;
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}
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EXPORT_SYMBOL(__mcfgpio_request);
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void __mcfgpio_free(unsigned gpio)
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{
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__mcfgpio_direction_input(gpio);
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}
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EXPORT_SYMBOL(__mcfgpio_free);
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#ifdef CONFIG_GPIOLIB
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int mcfgpio_direction_input(struct gpio_chip *chip, unsigned offset)
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{
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return __mcfgpio_direction_input(offset);
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}
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int mcfgpio_get_value(struct gpio_chip *chip, unsigned offset)
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{
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return __mcfgpio_get_value(offset);
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}
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int mcfgpio_direction_output(struct gpio_chip *chip, unsigned offset, int value)
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{
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return __mcfgpio_direction_output(offset, value);
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}
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void mcfgpio_set_value(struct gpio_chip *chip, unsigned offset, int value)
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{
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__mcfgpio_set_value(offset, value);
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}
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int mcfgpio_request(struct gpio_chip *chip, unsigned offset)
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{
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return __mcfgpio_request(offset);
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}
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void mcfgpio_free(struct gpio_chip *chip, unsigned offset)
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{
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__mcfgpio_free(offset);
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}
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struct bus_type mcfgpio_subsys = {
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.name = "gpio",
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.dev_name = "gpio",
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};
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static struct gpio_chip mcfgpio_chip = {
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.label = "mcfgpio",
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.request = mcfgpio_request,
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.free = mcfgpio_free,
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.direction_input = mcfgpio_direction_input,
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.direction_output = mcfgpio_direction_output,
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.get = mcfgpio_get_value,
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.set = mcfgpio_set_value,
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.base = 0,
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.ngpio = MCFGPIO_PIN_MAX,
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};
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static int __init mcfgpio_sysinit(void)
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{
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gpiochip_add(&mcfgpio_chip);
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return subsys_system_register(&mcfgpio_subsys, NULL);
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}
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core_initcall(mcfgpio_sysinit);
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#endif
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