![Greg Ungerer](/assets/img/avatar_default.png)
Make all definitions of the ColdFire Chip Select registers absolute addresses. Currently some are relative to the MBAR peripheral region. The various ColdFire parts use different methods to address the internal registers, some are absolute, some are relative to peripheral regions which can be mapped at different address ranges (such as the MBAR and IPSBAR registers). We don't want to deal with this in the code when we are accessing these registers, so make all register definitions the absolute address - factoring out whether it is an offset into a peripheral region. This makes them all consistently defined, and reduces the occasional bugs caused by inconsistent definition of the register addresses. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
154 lines
4 KiB
C
154 lines
4 KiB
C
/***************************************************************************/
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/*
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* nettel.c -- startup code support for the NETtel boards
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*
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* Copyright (C) 2009, Greg Ungerer (gerg@snapgear.com)
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*/
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/***************************************************************************/
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#include <linux/kernel.h>
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#include <linux/param.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/platform_device.h>
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#include <asm/coldfire.h>
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#include <asm/mcfsim.h>
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#include <asm/nettel.h>
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/***************************************************************************/
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/*
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* Define the IO and interrupt resources of the 2 SMC9196 interfaces.
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*/
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#define NETTEL_SMC0_ADDR 0x30600300
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#define NETTEL_SMC0_IRQ 29
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#define NETTEL_SMC1_ADDR 0x30600000
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#define NETTEL_SMC1_IRQ 27
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/*
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* We need some access into the SMC9196 registers. Define those registers
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* we will need here (including the smc91x.h doesn't seem to give us these
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* in a simple form).
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*/
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#define SMC91xx_BANKSELECT 14
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#define SMC91xx_BASEADDR 2
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#define SMC91xx_BASEMAC 4
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/***************************************************************************/
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static struct resource nettel_smc91x_0_resources[] = {
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{
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.start = NETTEL_SMC0_ADDR,
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.end = NETTEL_SMC0_ADDR + 0x20,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = NETTEL_SMC0_IRQ,
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.end = NETTEL_SMC0_IRQ,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct resource nettel_smc91x_1_resources[] = {
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{
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.start = NETTEL_SMC1_ADDR,
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.end = NETTEL_SMC1_ADDR + 0x20,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = NETTEL_SMC1_IRQ,
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.end = NETTEL_SMC1_IRQ,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device nettel_smc91x[] = {
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{
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.name = "smc91x",
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.id = 0,
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.num_resources = ARRAY_SIZE(nettel_smc91x_0_resources),
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.resource = nettel_smc91x_0_resources,
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},
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{
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.name = "smc91x",
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.id = 1,
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.num_resources = ARRAY_SIZE(nettel_smc91x_1_resources),
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.resource = nettel_smc91x_1_resources,
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},
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};
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static struct platform_device *nettel_devices[] __initdata = {
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&nettel_smc91x[0],
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&nettel_smc91x[1],
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};
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/***************************************************************************/
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static u8 nettel_macdefault[] __initdata = {
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0x00, 0xd0, 0xcf, 0x00, 0x00, 0x01,
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};
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/*
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* Set flash contained MAC address into SMC9196 core. Make sure the flash
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* MAC address is sane, and not an empty flash. If no good use the Moreton
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* Bay default MAC address instead.
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*/
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static void __init nettel_smc91x_setmac(unsigned int ioaddr, unsigned int flashaddr)
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{
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u16 *macp;
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macp = (u16 *) flashaddr;
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if ((macp[0] == 0xffff) && (macp[1] == 0xffff) && (macp[2] == 0xffff))
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macp = (u16 *) &nettel_macdefault[0];
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writew(1, NETTEL_SMC0_ADDR + SMC91xx_BANKSELECT);
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writew(macp[0], ioaddr + SMC91xx_BASEMAC);
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writew(macp[1], ioaddr + SMC91xx_BASEMAC + 2);
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writew(macp[2], ioaddr + SMC91xx_BASEMAC + 4);
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}
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/***************************************************************************/
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/*
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* Re-map the address space of at least one of the SMC ethernet
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* parts. Both parts power up decoding the same address, so we
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* need to move one of them first, before doing anything else.
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*/
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static void __init nettel_smc91x_init(void)
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{
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writew(0x00ec, MCFSIM_PADDR);
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mcf_setppdata(0, 0x0080);
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writew(1, NETTEL_SMC0_ADDR + SMC91xx_BANKSELECT);
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writew(0x0067, NETTEL_SMC0_ADDR + SMC91xx_BASEADDR);
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mcf_setppdata(0x0080, 0);
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/* Set correct chip select timing for SMC9196 accesses */
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writew(0x1180, MCFSIM_CSCR3);
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/* Set the SMC interrupts to be auto-vectored */
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mcf_autovector(NETTEL_SMC0_IRQ);
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mcf_autovector(NETTEL_SMC1_IRQ);
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/* Set MAC addresses from flash for both interfaces */
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nettel_smc91x_setmac(NETTEL_SMC0_ADDR, 0xf0006000);
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nettel_smc91x_setmac(NETTEL_SMC1_ADDR, 0xf0006006);
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}
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/***************************************************************************/
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static int __init init_nettel(void)
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{
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nettel_smc91x_init();
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platform_add_devices(nettel_devices, ARRAY_SIZE(nettel_devices));
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return 0;
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}
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arch_initcall(init_nettel);
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/***************************************************************************/
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