df595746fa
When system enter suspend, we can set the DDR IO to high-Z state to save DDR IOs' power consumption, this operation can save many power(from ~26mA@1.5V to ~15mA@1.5V, measured on i.MX6Q SabreSD board, R25) of DDR IOs. To achieve that, we need to copy the suspend code to ocram and run the low level hardware related code(set DDR IOs to high-Z state) in ocram. If there is no ocram space available, then system will still do suspend in external DDR, hence no DDR IOs will be set to high-Z. The OCRAM usage layout is as below, ocram suspend region(4K currently): ======================== high address ====================== . . . ^ ^ ^ imx6_suspend code PM_INFO structure(imx6_cpu_pm_info) ======================== low address ======================= Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Anson Huang <b20788@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
86 lines
2 KiB
C
86 lines
2 KiB
C
/*
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* Copyright 2013 Freescale Semiconductor, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#include <linux/irqchip.h>
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#include <linux/of.h>
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#include <linux/of_platform.h>
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#include <linux/mfd/syscon.h>
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#include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
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#include <linux/regmap.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include "common.h"
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#include "cpuidle.h"
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static void __init imx6sl_fec_init(void)
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{
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struct regmap *gpr;
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/* set FEC clock from internal PLL clock source */
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gpr = syscon_regmap_lookup_by_compatible("fsl,imx6sl-iomuxc-gpr");
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if (!IS_ERR(gpr)) {
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regmap_update_bits(gpr, IOMUXC_GPR1,
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IMX6SL_GPR1_FEC_CLOCK_MUX2_SEL_MASK, 0);
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regmap_update_bits(gpr, IOMUXC_GPR1,
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IMX6SL_GPR1_FEC_CLOCK_MUX1_SEL_MASK, 0);
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} else {
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pr_err("failed to find fsl,imx6sl-iomux-gpr regmap\n");
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}
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}
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static void __init imx6sl_init_late(void)
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{
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/* imx6sl reuses imx6q cpufreq driver */
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if (IS_ENABLED(CONFIG_ARM_IMX6Q_CPUFREQ))
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platform_device_register_simple("imx6q-cpufreq", -1, NULL, 0);
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imx6sl_cpuidle_init();
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}
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static void __init imx6sl_init_machine(void)
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{
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struct device *parent;
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mxc_arch_reset_init_dt();
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parent = imx_soc_device_init();
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if (parent == NULL)
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pr_warn("failed to initialize soc device\n");
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of_platform_populate(NULL, of_default_bus_match_table, NULL, parent);
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imx6sl_fec_init();
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imx_anatop_init();
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imx6sl_pm_init();
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}
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static void __init imx6sl_init_irq(void)
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{
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imx_init_revision_from_anatop();
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imx_init_l2cache();
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imx_src_init();
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imx_gpc_init();
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irqchip_init();
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}
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static const char *imx6sl_dt_compat[] __initconst = {
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"fsl,imx6sl",
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NULL,
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};
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DT_MACHINE_START(IMX6SL, "Freescale i.MX6 SoloLite (Device Tree)")
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.map_io = debug_ll_io_init,
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.init_irq = imx6sl_init_irq,
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.init_machine = imx6sl_init_machine,
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.init_late = imx6sl_init_late,
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.dt_compat = imx6sl_dt_compat,
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.restart = mxc_restart,
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MACHINE_END
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