edfaf05c2f
All OMAP IP blocks expect LE data, but CPU may operate in BE mode. Need to use endian neutral functions to read/write h/w registers. I.e instead of __raw_read[lw] and __raw_write[lw] functions code need to use read[lw]_relaxed and write[lw]_relaxed functions. If the first simply reads/writes register, the second will byteswap it if host operates in BE mode. Changes are trivial sed like replacement of __raw_xxx functions with xxx_relaxed variant. Signed-off-by: Victor Kamensky <victor.kamensky@linaro.org> Signed-off-by: Taras Kondratiuk <taras.kondratiuk@linaro.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
48 lines
1 KiB
C
48 lines
1 KiB
C
/*
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* OMAP2xxx sys_clk-specific clock code
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*
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* Copyright (C) 2005-2008 Texas Instruments, Inc.
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* Copyright (C) 2004-2010 Nokia Corporation
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*
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* Contacts:
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* Richard Woodruff <r-woodruff2@ti.com>
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* Paul Walmsley
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*
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* Based on earlier work by Tuukka Tikkanen, Tony Lindgren,
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* Gordon McNutt and RidgeRun, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#undef DEBUG
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include "clock.h"
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#include "clock2xxx.h"
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#include "prm2xxx_3xxx.h"
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#include "prm-regbits-24xx.h"
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void __iomem *prcm_clksrc_ctrl;
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u32 omap2xxx_get_sysclkdiv(void)
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{
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u32 div;
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div = readl_relaxed(prcm_clksrc_ctrl);
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div &= OMAP_SYSCLKDIV_MASK;
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div >>= OMAP_SYSCLKDIV_SHIFT;
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return div;
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}
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unsigned long omap2xxx_sys_clk_recalc(struct clk_hw *clk,
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unsigned long parent_rate)
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{
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return parent_rate / omap2xxx_get_sysclkdiv();
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}
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