![yu-cheng yu](/assets/img/avatar_default.png)
This issue is a fallout from the command-line parsing move. When "eagerfpu=off" is given as a command-line input, the kernel should disable MPX support. The decision for turning off MPX was made in fpu__init_system_ctx_switch(), which is after the selection of the XSAVE format. This patch fixes it by getting that decision done earlier in fpu__init_system_xstate(). Signed-off-by: Yu-cheng Yu <yu-cheng.yu@intel.com> Cc: Andy Lutomirski <luto@amacapital.net> Cc: Borislav Petkov <bp@alien8.de> Cc: Borislav Petkov <bp@suse.de> Cc: Dave Hansen <dave.hansen@linux.intel.com> Cc: Fenghua Yu <fenghua.yu@intel.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Oleg Nesterov <oleg@redhat.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Quentin Casasnovas <quentin.casasnovas@oracle.com> Cc: Ravi V. Shankar <ravi.v.shankar@intel.com> Cc: Sai Praneeth Prakhya <sai.praneeth.prakhya@intel.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: yu-cheng yu <yu-cheng.yu@intel.com> Link: http://lkml.kernel.org/r/1452119094-7252-4-git-send-email-yu-cheng.yu@intel.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
753 lines
20 KiB
C
753 lines
20 KiB
C
/*
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* xsave/xrstor support.
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*
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* Author: Suresh Siddha <suresh.b.siddha@intel.com>
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*/
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#include <linux/compat.h>
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#include <linux/cpu.h>
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#include <asm/fpu/api.h>
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#include <asm/fpu/internal.h>
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#include <asm/fpu/signal.h>
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#include <asm/fpu/regset.h>
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#include <asm/tlbflush.h>
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static const char *xfeature_names[] =
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{
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"x87 floating point registers" ,
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"SSE registers" ,
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"AVX registers" ,
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"MPX bounds registers" ,
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"MPX CSR" ,
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"AVX-512 opmask" ,
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"AVX-512 Hi256" ,
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"AVX-512 ZMM_Hi256" ,
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"unknown xstate feature" ,
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};
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/*
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* Mask of xstate features supported by the CPU and the kernel:
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*/
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u64 xfeatures_mask __read_mostly;
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static unsigned int xstate_offsets[XFEATURE_MAX] = { [ 0 ... XFEATURE_MAX - 1] = -1};
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static unsigned int xstate_sizes[XFEATURE_MAX] = { [ 0 ... XFEATURE_MAX - 1] = -1};
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static unsigned int xstate_comp_offsets[sizeof(xfeatures_mask)*8];
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/*
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* Clear all of the X86_FEATURE_* bits that are unavailable
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* when the CPU has no XSAVE support.
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*/
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void fpu__xstate_clear_all_cpu_caps(void)
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{
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setup_clear_cpu_cap(X86_FEATURE_XSAVE);
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setup_clear_cpu_cap(X86_FEATURE_XSAVEOPT);
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setup_clear_cpu_cap(X86_FEATURE_XSAVEC);
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setup_clear_cpu_cap(X86_FEATURE_XSAVES);
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setup_clear_cpu_cap(X86_FEATURE_AVX);
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setup_clear_cpu_cap(X86_FEATURE_AVX2);
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setup_clear_cpu_cap(X86_FEATURE_AVX512F);
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setup_clear_cpu_cap(X86_FEATURE_AVX512PF);
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setup_clear_cpu_cap(X86_FEATURE_AVX512ER);
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setup_clear_cpu_cap(X86_FEATURE_AVX512CD);
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setup_clear_cpu_cap(X86_FEATURE_MPX);
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setup_clear_cpu_cap(X86_FEATURE_XGETBV1);
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}
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/*
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* Return whether the system supports a given xfeature.
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*
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* Also return the name of the (most advanced) feature that the caller requested:
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*/
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int cpu_has_xfeatures(u64 xfeatures_needed, const char **feature_name)
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{
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u64 xfeatures_missing = xfeatures_needed & ~xfeatures_mask;
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if (unlikely(feature_name)) {
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long xfeature_idx, max_idx;
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u64 xfeatures_print;
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/*
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* So we use FLS here to be able to print the most advanced
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* feature that was requested but is missing. So if a driver
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* asks about "XFEATURE_MASK_SSE | XFEATURE_MASK_YMM" we'll print the
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* missing AVX feature - this is the most informative message
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* to users:
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*/
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if (xfeatures_missing)
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xfeatures_print = xfeatures_missing;
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else
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xfeatures_print = xfeatures_needed;
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xfeature_idx = fls64(xfeatures_print)-1;
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max_idx = ARRAY_SIZE(xfeature_names)-1;
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xfeature_idx = min(xfeature_idx, max_idx);
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*feature_name = xfeature_names[xfeature_idx];
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}
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if (xfeatures_missing)
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return 0;
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return 1;
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}
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EXPORT_SYMBOL_GPL(cpu_has_xfeatures);
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/*
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* When executing XSAVEOPT (or other optimized XSAVE instructions), if
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* a processor implementation detects that an FPU state component is still
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* (or is again) in its initialized state, it may clear the corresponding
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* bit in the header.xfeatures field, and can skip the writeout of registers
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* to the corresponding memory layout.
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*
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* This means that when the bit is zero, the state component might still contain
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* some previous - non-initialized register state.
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*
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* Before writing xstate information to user-space we sanitize those components,
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* to always ensure that the memory layout of a feature will be in the init state
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* if the corresponding header bit is zero. This is to ensure that user-space doesn't
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* see some stale state in the memory layout during signal handling, debugging etc.
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*/
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void fpstate_sanitize_xstate(struct fpu *fpu)
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{
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struct fxregs_state *fx = &fpu->state.fxsave;
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int feature_bit;
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u64 xfeatures;
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if (!use_xsaveopt())
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return;
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xfeatures = fpu->state.xsave.header.xfeatures;
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/*
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* None of the feature bits are in init state. So nothing else
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* to do for us, as the memory layout is up to date.
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*/
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if ((xfeatures & xfeatures_mask) == xfeatures_mask)
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return;
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/*
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* FP is in init state
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*/
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if (!(xfeatures & XFEATURE_MASK_FP)) {
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fx->cwd = 0x37f;
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fx->swd = 0;
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fx->twd = 0;
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fx->fop = 0;
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fx->rip = 0;
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fx->rdp = 0;
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memset(&fx->st_space[0], 0, 128);
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}
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/*
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* SSE is in init state
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*/
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if (!(xfeatures & XFEATURE_MASK_SSE))
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memset(&fx->xmm_space[0], 0, 256);
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/*
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* First two features are FPU and SSE, which above we handled
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* in a special way already:
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*/
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feature_bit = 0x2;
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xfeatures = (xfeatures_mask & ~xfeatures) >> 2;
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/*
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* Update all the remaining memory layouts according to their
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* standard xstate layout, if their header bit is in the init
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* state:
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*/
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while (xfeatures) {
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if (xfeatures & 0x1) {
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int offset = xstate_offsets[feature_bit];
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int size = xstate_sizes[feature_bit];
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memcpy((void *)fx + offset,
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(void *)&init_fpstate.xsave + offset,
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size);
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}
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xfeatures >>= 1;
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feature_bit++;
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}
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}
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/*
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* Enable the extended processor state save/restore feature.
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* Called once per CPU onlining.
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*/
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void fpu__init_cpu_xstate(void)
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{
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if (!cpu_has_xsave || !xfeatures_mask)
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return;
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cr4_set_bits(X86_CR4_OSXSAVE);
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xsetbv(XCR_XFEATURE_ENABLED_MASK, xfeatures_mask);
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}
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/*
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* Note that in the future we will likely need a pair of
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* functions here: one for user xstates and the other for
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* system xstates. For now, they are the same.
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*/
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static int xfeature_enabled(enum xfeature xfeature)
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{
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return !!(xfeatures_mask & (1UL << xfeature));
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}
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/*
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* Record the offsets and sizes of various xstates contained
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* in the XSAVE state memory layout.
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*/
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static void __init setup_xstate_features(void)
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{
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u32 eax, ebx, ecx, edx, i;
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/* start at the beginnning of the "extended state" */
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unsigned int last_good_offset = offsetof(struct xregs_state,
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extended_state_area);
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for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) {
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if (!xfeature_enabled(i))
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continue;
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cpuid_count(XSTATE_CPUID, i, &eax, &ebx, &ecx, &edx);
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xstate_offsets[i] = ebx;
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xstate_sizes[i] = eax;
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/*
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* In our xstate size checks, we assume that the
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* highest-numbered xstate feature has the
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* highest offset in the buffer. Ensure it does.
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*/
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WARN_ONCE(last_good_offset > xstate_offsets[i],
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"x86/fpu: misordered xstate at %d\n", last_good_offset);
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last_good_offset = xstate_offsets[i];
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printk(KERN_INFO "x86/fpu: xstate_offset[%d]: %4d, xstate_sizes[%d]: %4d\n", i, ebx, i, eax);
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}
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}
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static void __init print_xstate_feature(u64 xstate_mask)
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{
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const char *feature_name;
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if (cpu_has_xfeatures(xstate_mask, &feature_name))
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pr_info("x86/fpu: Supporting XSAVE feature 0x%02Lx: '%s'\n", xstate_mask, feature_name);
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}
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/*
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* Print out all the supported xstate features:
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*/
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static void __init print_xstate_features(void)
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{
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print_xstate_feature(XFEATURE_MASK_FP);
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print_xstate_feature(XFEATURE_MASK_SSE);
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print_xstate_feature(XFEATURE_MASK_YMM);
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print_xstate_feature(XFEATURE_MASK_BNDREGS);
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print_xstate_feature(XFEATURE_MASK_BNDCSR);
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print_xstate_feature(XFEATURE_MASK_OPMASK);
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print_xstate_feature(XFEATURE_MASK_ZMM_Hi256);
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print_xstate_feature(XFEATURE_MASK_Hi16_ZMM);
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}
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/*
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* This function sets up offsets and sizes of all extended states in
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* xsave area. This supports both standard format and compacted format
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* of the xsave aread.
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*/
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static void __init setup_xstate_comp(void)
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{
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unsigned int xstate_comp_sizes[sizeof(xfeatures_mask)*8];
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int i;
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/*
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* The FP xstates and SSE xstates are legacy states. They are always
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* in the fixed offsets in the xsave area in either compacted form
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* or standard form.
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*/
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xstate_comp_offsets[0] = 0;
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xstate_comp_offsets[1] = offsetof(struct fxregs_state, xmm_space);
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if (!cpu_has_xsaves) {
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for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) {
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if (xfeature_enabled(i)) {
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xstate_comp_offsets[i] = xstate_offsets[i];
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xstate_comp_sizes[i] = xstate_sizes[i];
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}
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}
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return;
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}
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xstate_comp_offsets[FIRST_EXTENDED_XFEATURE] =
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FXSAVE_SIZE + XSAVE_HDR_SIZE;
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for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) {
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if (xfeature_enabled(i))
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xstate_comp_sizes[i] = xstate_sizes[i];
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else
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xstate_comp_sizes[i] = 0;
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if (i > FIRST_EXTENDED_XFEATURE)
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xstate_comp_offsets[i] = xstate_comp_offsets[i-1]
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+ xstate_comp_sizes[i-1];
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}
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}
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/*
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* setup the xstate image representing the init state
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*/
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static void __init setup_init_fpu_buf(void)
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{
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static int on_boot_cpu __initdata = 1;
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WARN_ON_FPU(!on_boot_cpu);
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on_boot_cpu = 0;
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if (!cpu_has_xsave)
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return;
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setup_xstate_features();
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print_xstate_features();
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if (cpu_has_xsaves) {
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init_fpstate.xsave.header.xcomp_bv = (u64)1 << 63 | xfeatures_mask;
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init_fpstate.xsave.header.xfeatures = xfeatures_mask;
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}
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/*
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* Init all the features state with header_bv being 0x0
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*/
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copy_kernel_to_xregs_booting(&init_fpstate.xsave);
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/*
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* Dump the init state again. This is to identify the init state
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* of any feature which is not represented by all zero's.
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*/
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copy_xregs_to_kernel_booting(&init_fpstate.xsave);
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}
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static int xfeature_is_supervisor(int xfeature_nr)
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{
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/*
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* We currently do not support supervisor states, but if
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* we did, we could find out like this.
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*
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* SDM says: If state component i is a user state component,
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* ECX[0] return 0; if state component i is a supervisor
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* state component, ECX[0] returns 1.
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u32 eax, ebx, ecx, edx;
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cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx;
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return !!(ecx & 1);
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*/
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return 0;
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}
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/*
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static int xfeature_is_user(int xfeature_nr)
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{
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return !xfeature_is_supervisor(xfeature_nr);
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}
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*/
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/*
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* This check is important because it is easy to get XSTATE_*
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* confused with XSTATE_BIT_*.
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*/
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#define CHECK_XFEATURE(nr) do { \
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WARN_ON(nr < FIRST_EXTENDED_XFEATURE); \
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WARN_ON(nr >= XFEATURE_MAX); \
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} while (0)
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/*
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* We could cache this like xstate_size[], but we only use
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* it here, so it would be a waste of space.
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*/
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static int xfeature_is_aligned(int xfeature_nr)
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{
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u32 eax, ebx, ecx, edx;
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CHECK_XFEATURE(xfeature_nr);
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cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx);
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/*
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* The value returned by ECX[1] indicates the alignment
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* of state component i when the compacted format
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* of the extended region of an XSAVE area is used
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*/
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return !!(ecx & 2);
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}
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static int xfeature_uncompacted_offset(int xfeature_nr)
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{
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u32 eax, ebx, ecx, edx;
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CHECK_XFEATURE(xfeature_nr);
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cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx);
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return ebx;
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}
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static int xfeature_size(int xfeature_nr)
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{
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u32 eax, ebx, ecx, edx;
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CHECK_XFEATURE(xfeature_nr);
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cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx);
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return eax;
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}
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/*
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* 'XSAVES' implies two different things:
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* 1. saving of supervisor/system state
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* 2. using the compacted format
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*
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* Use this function when dealing with the compacted format so
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* that it is obvious which aspect of 'XSAVES' is being handled
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* by the calling code.
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*/
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static int using_compacted_format(void)
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{
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return cpu_has_xsaves;
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}
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static void __xstate_dump_leaves(void)
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{
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int i;
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u32 eax, ebx, ecx, edx;
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static int should_dump = 1;
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if (!should_dump)
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return;
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should_dump = 0;
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/*
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* Dump out a few leaves past the ones that we support
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* just in case there are some goodies up there
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*/
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for (i = 0; i < XFEATURE_MAX + 10; i++) {
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cpuid_count(XSTATE_CPUID, i, &eax, &ebx, &ecx, &edx);
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pr_warn("CPUID[%02x, %02x]: eax=%08x ebx=%08x ecx=%08x edx=%08x\n",
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XSTATE_CPUID, i, eax, ebx, ecx, edx);
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}
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}
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#define XSTATE_WARN_ON(x) do { \
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if (WARN_ONCE(x, "XSAVE consistency problem, dumping leaves")) { \
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__xstate_dump_leaves(); \
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} \
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} while (0)
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#define XCHECK_SZ(sz, nr, nr_macro, __struct) do { \
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if ((nr == nr_macro) && \
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WARN_ONCE(sz != sizeof(__struct), \
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"%s: struct is %zu bytes, cpu state %d bytes\n", \
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__stringify(nr_macro), sizeof(__struct), sz)) { \
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__xstate_dump_leaves(); \
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} \
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} while (0)
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/*
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* We have a C struct for each 'xstate'. We need to ensure
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* that our software representation matches what the CPU
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* tells us about the state's size.
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*/
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static void check_xstate_against_struct(int nr)
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{
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/*
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* Ask the CPU for the size of the state.
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*/
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int sz = xfeature_size(nr);
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/*
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* Match each CPU state with the corresponding software
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* structure.
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*/
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XCHECK_SZ(sz, nr, XFEATURE_YMM, struct ymmh_struct);
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XCHECK_SZ(sz, nr, XFEATURE_BNDREGS, struct mpx_bndreg_state);
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XCHECK_SZ(sz, nr, XFEATURE_BNDCSR, struct mpx_bndcsr_state);
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XCHECK_SZ(sz, nr, XFEATURE_OPMASK, struct avx_512_opmask_state);
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XCHECK_SZ(sz, nr, XFEATURE_ZMM_Hi256, struct avx_512_zmm_uppers_state);
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XCHECK_SZ(sz, nr, XFEATURE_Hi16_ZMM, struct avx_512_hi16_state);
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/*
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* Make *SURE* to add any feature numbers in below if
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* there are "holes" in the xsave state component
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* numbers.
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|
*/
|
|
if ((nr < XFEATURE_YMM) ||
|
|
(nr >= XFEATURE_MAX)) {
|
|
WARN_ONCE(1, "no structure for xstate: %d\n", nr);
|
|
XSTATE_WARN_ON(1);
|
|
}
|
|
}
|
|
|
|
/*
|
|
* This essentially double-checks what the cpu told us about
|
|
* how large the XSAVE buffer needs to be. We are recalculating
|
|
* it to be safe.
|
|
*/
|
|
static void do_extra_xstate_size_checks(void)
|
|
{
|
|
int paranoid_xstate_size = FXSAVE_SIZE + XSAVE_HDR_SIZE;
|
|
int i;
|
|
|
|
for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) {
|
|
if (!xfeature_enabled(i))
|
|
continue;
|
|
|
|
check_xstate_against_struct(i);
|
|
/*
|
|
* Supervisor state components can be managed only by
|
|
* XSAVES, which is compacted-format only.
|
|
*/
|
|
if (!using_compacted_format())
|
|
XSTATE_WARN_ON(xfeature_is_supervisor(i));
|
|
|
|
/* Align from the end of the previous feature */
|
|
if (xfeature_is_aligned(i))
|
|
paranoid_xstate_size = ALIGN(paranoid_xstate_size, 64);
|
|
/*
|
|
* The offset of a given state in the non-compacted
|
|
* format is given to us in a CPUID leaf. We check
|
|
* them for being ordered (increasing offsets) in
|
|
* setup_xstate_features().
|
|
*/
|
|
if (!using_compacted_format())
|
|
paranoid_xstate_size = xfeature_uncompacted_offset(i);
|
|
/*
|
|
* The compacted-format offset always depends on where
|
|
* the previous state ended.
|
|
*/
|
|
paranoid_xstate_size += xfeature_size(i);
|
|
}
|
|
XSTATE_WARN_ON(paranoid_xstate_size != xstate_size);
|
|
}
|
|
|
|
/*
|
|
* Calculate total size of enabled xstates in XCR0/xfeatures_mask.
|
|
*
|
|
* Note the SDM's wording here. "sub-function 0" only enumerates
|
|
* the size of the *user* states. If we use it to size a buffer
|
|
* that we use 'XSAVES' on, we could potentially overflow the
|
|
* buffer because 'XSAVES' saves system states too.
|
|
*
|
|
* Note that we do not currently set any bits on IA32_XSS so
|
|
* 'XCR0 | IA32_XSS == XCR0' for now.
|
|
*/
|
|
static unsigned int __init calculate_xstate_size(void)
|
|
{
|
|
unsigned int eax, ebx, ecx, edx;
|
|
unsigned int calculated_xstate_size;
|
|
|
|
if (!cpu_has_xsaves) {
|
|
/*
|
|
* - CPUID function 0DH, sub-function 0:
|
|
* EBX enumerates the size (in bytes) required by
|
|
* the XSAVE instruction for an XSAVE area
|
|
* containing all the *user* state components
|
|
* corresponding to bits currently set in XCR0.
|
|
*/
|
|
cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx);
|
|
calculated_xstate_size = ebx;
|
|
} else {
|
|
/*
|
|
* - CPUID function 0DH, sub-function 1:
|
|
* EBX enumerates the size (in bytes) required by
|
|
* the XSAVES instruction for an XSAVE area
|
|
* containing all the state components
|
|
* corresponding to bits currently set in
|
|
* XCR0 | IA32_XSS.
|
|
*/
|
|
cpuid_count(XSTATE_CPUID, 1, &eax, &ebx, &ecx, &edx);
|
|
calculated_xstate_size = ebx;
|
|
}
|
|
return calculated_xstate_size;
|
|
}
|
|
|
|
/*
|
|
* Will the runtime-enumerated 'xstate_size' fit in the init
|
|
* task's statically-allocated buffer?
|
|
*/
|
|
static bool is_supported_xstate_size(unsigned int test_xstate_size)
|
|
{
|
|
if (test_xstate_size <= sizeof(union fpregs_state))
|
|
return true;
|
|
|
|
pr_warn("x86/fpu: xstate buffer too small (%zu < %d), disabling xsave\n",
|
|
sizeof(union fpregs_state), test_xstate_size);
|
|
return false;
|
|
}
|
|
|
|
static int init_xstate_size(void)
|
|
{
|
|
/* Recompute the context size for enabled features: */
|
|
unsigned int possible_xstate_size = calculate_xstate_size();
|
|
|
|
/* Ensure we have the space to store all enabled: */
|
|
if (!is_supported_xstate_size(possible_xstate_size))
|
|
return -EINVAL;
|
|
|
|
/*
|
|
* The size is OK, we are definitely going to use xsave,
|
|
* make it known to the world that we need more space.
|
|
*/
|
|
xstate_size = possible_xstate_size;
|
|
do_extra_xstate_size_checks();
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* We enabled the XSAVE hardware, but something went wrong and
|
|
* we can not use it. Disable it.
|
|
*/
|
|
static void fpu__init_disable_system_xstate(void)
|
|
{
|
|
xfeatures_mask = 0;
|
|
cr4_clear_bits(X86_CR4_OSXSAVE);
|
|
fpu__xstate_clear_all_cpu_caps();
|
|
}
|
|
|
|
/*
|
|
* Enable and initialize the xsave feature.
|
|
* Called once per system bootup.
|
|
*/
|
|
void __init fpu__init_system_xstate(void)
|
|
{
|
|
unsigned int eax, ebx, ecx, edx;
|
|
static int on_boot_cpu __initdata = 1;
|
|
int err;
|
|
|
|
WARN_ON_FPU(!on_boot_cpu);
|
|
on_boot_cpu = 0;
|
|
|
|
if (!cpu_has_xsave) {
|
|
pr_info("x86/fpu: Legacy x87 FPU detected.\n");
|
|
return;
|
|
}
|
|
|
|
if (boot_cpu_data.cpuid_level < XSTATE_CPUID) {
|
|
WARN_ON_FPU(1);
|
|
return;
|
|
}
|
|
|
|
cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx);
|
|
xfeatures_mask = eax + ((u64)edx << 32);
|
|
|
|
if ((xfeatures_mask & XFEATURE_MASK_FPSSE) != XFEATURE_MASK_FPSSE) {
|
|
pr_err("x86/fpu: FP/SSE not present amongst the CPU's xstate features: 0x%llx.\n", xfeatures_mask);
|
|
BUG();
|
|
}
|
|
|
|
xfeatures_mask &= fpu__get_supported_xfeatures_mask();
|
|
|
|
/* Enable xstate instructions to be able to continue with initialization: */
|
|
fpu__init_cpu_xstate();
|
|
err = init_xstate_size();
|
|
if (err) {
|
|
/* something went wrong, boot without any XSAVE support */
|
|
fpu__init_disable_system_xstate();
|
|
return;
|
|
}
|
|
|
|
update_regset_xstate_info(xstate_size, xfeatures_mask);
|
|
fpu__init_prepare_fx_sw_frame();
|
|
setup_init_fpu_buf();
|
|
setup_xstate_comp();
|
|
|
|
pr_info("x86/fpu: Enabled xstate features 0x%llx, context size is %d bytes, using '%s' format.\n",
|
|
xfeatures_mask,
|
|
xstate_size,
|
|
cpu_has_xsaves ? "compacted" : "standard");
|
|
}
|
|
|
|
/*
|
|
* Restore minimal FPU state after suspend:
|
|
*/
|
|
void fpu__resume_cpu(void)
|
|
{
|
|
/*
|
|
* Restore XCR0 on xsave capable CPUs:
|
|
*/
|
|
if (cpu_has_xsave)
|
|
xsetbv(XCR_XFEATURE_ENABLED_MASK, xfeatures_mask);
|
|
}
|
|
|
|
/*
|
|
* Given the xsave area and a state inside, this function returns the
|
|
* address of the state.
|
|
*
|
|
* This is the API that is called to get xstate address in either
|
|
* standard format or compacted format of xsave area.
|
|
*
|
|
* Note that if there is no data for the field in the xsave buffer
|
|
* this will return NULL.
|
|
*
|
|
* Inputs:
|
|
* xstate: the thread's storage area for all FPU data
|
|
* xstate_feature: state which is defined in xsave.h (e.g.
|
|
* XFEATURE_MASK_FP, XFEATURE_MASK_SSE, etc...)
|
|
* Output:
|
|
* address of the state in the xsave area, or NULL if the
|
|
* field is not present in the xsave buffer.
|
|
*/
|
|
void *get_xsave_addr(struct xregs_state *xsave, int xstate_feature)
|
|
{
|
|
int feature_nr = fls64(xstate_feature) - 1;
|
|
/*
|
|
* Do we even *have* xsave state?
|
|
*/
|
|
if (!boot_cpu_has(X86_FEATURE_XSAVE))
|
|
return NULL;
|
|
|
|
/*
|
|
* We should not ever be requesting features that we
|
|
* have not enabled. Remember that pcntxt_mask is
|
|
* what we write to the XCR0 register.
|
|
*/
|
|
WARN_ONCE(!(xfeatures_mask & xstate_feature),
|
|
"get of unsupported state");
|
|
/*
|
|
* This assumes the last 'xsave*' instruction to
|
|
* have requested that 'xstate_feature' be saved.
|
|
* If it did not, we might be seeing and old value
|
|
* of the field in the buffer.
|
|
*
|
|
* This can happen because the last 'xsave' did not
|
|
* request that this feature be saved (unlikely)
|
|
* or because the "init optimization" caused it
|
|
* to not be saved.
|
|
*/
|
|
if (!(xsave->header.xfeatures & xstate_feature))
|
|
return NULL;
|
|
|
|
return (void *)xsave + xstate_comp_offsets[feature_nr];
|
|
}
|
|
EXPORT_SYMBOL_GPL(get_xsave_addr);
|
|
|
|
/*
|
|
* This wraps up the common operations that need to occur when retrieving
|
|
* data from xsave state. It first ensures that the current task was
|
|
* using the FPU and retrieves the data in to a buffer. It then calculates
|
|
* the offset of the requested field in the buffer.
|
|
*
|
|
* This function is safe to call whether the FPU is in use or not.
|
|
*
|
|
* Note that this only works on the current task.
|
|
*
|
|
* Inputs:
|
|
* @xsave_state: state which is defined in xsave.h (e.g. XFEATURE_MASK_FP,
|
|
* XFEATURE_MASK_SSE, etc...)
|
|
* Output:
|
|
* address of the state in the xsave area or NULL if the state
|
|
* is not present or is in its 'init state'.
|
|
*/
|
|
const void *get_xsave_field_ptr(int xsave_state)
|
|
{
|
|
struct fpu *fpu = ¤t->thread.fpu;
|
|
|
|
if (!fpu->fpstate_active)
|
|
return NULL;
|
|
/*
|
|
* fpu__save() takes the CPU's xstate registers
|
|
* and saves them off to the 'fpu memory buffer.
|
|
*/
|
|
fpu__save(fpu);
|
|
|
|
return get_xsave_addr(&fpu->state.xsave, xsave_state);
|
|
}
|