![Will Deacon](/assets/img/avatar_default.png)
Currently, -1 is used as the GPIO0 interrupt on realview PB1176 and an AMBA device is registered with this parameter. With the pending NO_IRQ cleanup, this will lead to a warning at boot time, since -1 is obviously broken. This patch updates the interrupt used for GPIO0 to match that specified by the TRM. Unfortunately, it's not clear how to trigger this interrupt so we trust that the documentation is correct. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
101 lines
4.1 KiB
C
101 lines
4.1 KiB
C
/*
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* arch/arm/mach-realview/include/mach/irqs-pb1176.h
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*
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* Copyright (C) 2008 ARM Limited
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
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* MA 02110-1301, USA.
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*/
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#ifndef __MACH_IRQS_PB1176_H
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#define __MACH_IRQS_PB1176_H
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#define IRQ_DC1176_GIC_START 32
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#define IRQ_PB1176_GIC_START 64
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/*
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* ARM1176 DevChip interrupt sources (primary GIC)
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*/
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#define IRQ_DC1176_WATCHDOG (IRQ_DC1176_GIC_START + 0) /* Watchdog timer */
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#define IRQ_DC1176_SOFTINT (IRQ_DC1176_GIC_START + 1) /* Software interrupt */
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#define IRQ_DC1176_COMMRx (IRQ_DC1176_GIC_START + 2) /* Debug Comm Rx interrupt */
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#define IRQ_DC1176_COMMTx (IRQ_DC1176_GIC_START + 3) /* Debug Comm Tx interrupt */
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#define IRQ_DC1176_CORE_PMU (IRQ_DC1176_GIC_START + 7) /* Core PMU interrupt */
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#define IRQ_DC1176_TIMER0 (IRQ_DC1176_GIC_START + 8) /* Timer 0 */
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#define IRQ_DC1176_TIMER1 (IRQ_DC1176_GIC_START + 9) /* Timer 1 */
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#define IRQ_DC1176_TIMER2 (IRQ_DC1176_GIC_START + 10) /* Timer 2 */
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#define IRQ_DC1176_APC (IRQ_DC1176_GIC_START + 11)
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#define IRQ_DC1176_IEC (IRQ_DC1176_GIC_START + 12)
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#define IRQ_DC1176_L2CC (IRQ_DC1176_GIC_START + 13)
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#define IRQ_DC1176_RTC (IRQ_DC1176_GIC_START + 14)
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#define IRQ_DC1176_CLCD (IRQ_DC1176_GIC_START + 15) /* CLCD controller */
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#define IRQ_DC1176_GPIO0 (IRQ_DC1176_GIC_START + 16)
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#define IRQ_DC1176_SSP (IRQ_DC1176_GIC_START + 17) /* SSP port */
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#define IRQ_DC1176_UART0 (IRQ_DC1176_GIC_START + 18) /* UART 0 on development chip */
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#define IRQ_DC1176_UART1 (IRQ_DC1176_GIC_START + 19) /* UART 1 on development chip */
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#define IRQ_DC1176_UART2 (IRQ_DC1176_GIC_START + 20) /* UART 2 on development chip */
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#define IRQ_DC1176_UART3 (IRQ_DC1176_GIC_START + 21) /* UART 3 on development chip */
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#define IRQ_DC1176_PB_IRQ2 (IRQ_DC1176_GIC_START + 30) /* tile GIC */
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#define IRQ_DC1176_PB_IRQ1 (IRQ_DC1176_GIC_START + 31) /* main GIC */
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/*
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* RealView PB1176 interrupt sources (secondary GIC)
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*/
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#define IRQ_PB1176_MMCI0A (IRQ_PB1176_GIC_START + 1) /* Multimedia Card 0A */
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#define IRQ_PB1176_MMCI0B (IRQ_PB1176_GIC_START + 2) /* Multimedia Card 0A */
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#define IRQ_PB1176_KMI0 (IRQ_PB1176_GIC_START + 3) /* Keyboard/Mouse port 0 */
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#define IRQ_PB1176_KMI1 (IRQ_PB1176_GIC_START + 4) /* Keyboard/Mouse port 1 */
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#define IRQ_PB1176_SCI (IRQ_PB1176_GIC_START + 5)
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#define IRQ_PB1176_UART4 (IRQ_PB1176_GIC_START + 6) /* UART 4 on baseboard */
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#define IRQ_PB1176_CHARLCD (IRQ_PB1176_GIC_START + 7) /* Character LCD */
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#define IRQ_PB1176_GPIO1 (IRQ_PB1176_GIC_START + 8)
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#define IRQ_PB1176_GPIO2 (IRQ_PB1176_GIC_START + 9)
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#define IRQ_PB1176_ETH (IRQ_PB1176_GIC_START + 10) /* Ethernet controller */
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#define IRQ_PB1176_USB (IRQ_PB1176_GIC_START + 11) /* USB controller */
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#define IRQ_PB1176_PISMO (IRQ_PB1176_GIC_START + 16)
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#define IRQ_PB1176_AACI (IRQ_PB1176_GIC_START + 19) /* Audio Codec */
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#define IRQ_PB1176_TIMER0_1 (IRQ_PB1176_GIC_START + 22)
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#define IRQ_PB1176_TIMER2_3 (IRQ_PB1176_GIC_START + 23)
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#define IRQ_PB1176_DMAC (IRQ_PB1176_GIC_START + 24) /* DMA controller */
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#define IRQ_PB1176_RTC (IRQ_PB1176_GIC_START + 25) /* Real Time Clock */
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#define IRQ_PB1176_SCTL -1
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#define NR_GIC_PB1176 2
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/*
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* Only define NR_IRQS if less than NR_IRQS_PB1176
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*/
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#define NR_IRQS_PB1176 (IRQ_DC1176_GIC_START + 96)
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#if defined(CONFIG_MACH_REALVIEW_PB1176)
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#if !defined(NR_IRQS) || (NR_IRQS < NR_IRQS_PB1176)
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#undef NR_IRQS
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#define NR_IRQS NR_IRQS_PB1176
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#endif
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#if !defined(MAX_GIC_NR) || (MAX_GIC_NR < NR_GIC_PB1176)
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#undef MAX_GIC_NR
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#define MAX_GIC_NR NR_GIC_PB1176
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#endif
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#endif /* CONFIG_MACH_REALVIEW_PB1176 */
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#endif /* __MACH_IRQS_PB1176_H */
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