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alistair23-linux/arch/powerpc/include/asm/book3s/64
Nicholas Piggin 2275d7b575 powerpc/64s/radix: introduce options to disable use of the tlbie instruction
Introduce two options to control the use of the tlbie instruction. A
boot time option which completely disables the kernel using the
instruction, this is currently incompatible with HASH MMU, KVM, and
coherent accelerators.

And a debugfs option can be switched at runtime and avoids using tlbie
for invalidating CPU TLBs for normal process and kernel address
mappings. Coherent accelerators are still managed with tlbie, as will
KVM partition scope translations.

Cross-CPU TLB flushing is implemented with IPIs and tlbiel. This is a
basic implementation which does not attempt to make any optimisation
beyond the tlbie implementation.

This is useful for performance testing among other things. For example
in certain situations on large systems, using IPIs may be faster than
tlbie as they can be directed rather than broadcast. Later we may also
take advantage of the IPIs to do more interesting things such as trim
the mm cpumask more aggressively.

Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20190902152931.17840-7-npiggin@gmail.com
2019-09-05 14:22:41 +10:00
..
hash-4k.h powerpc/mm/hash: Simplify the region id calculation. 2019-04-21 23:12:40 +10:00
hash-64k.h powerpc/mm/hash: Simplify the region id calculation. 2019-04-21 23:12:40 +10:00
hash.h powerpc/mm/hash: Fix get_region_id() for invalid addresses 2019-05-17 22:57:40 +10:00
hugetlb.h hugetlb: allow to free gigantic pages regardless of the configuration 2019-05-14 09:47:47 -07:00
kup-radix.h powerpc/64s: Use early_mmu_has_feature() in set_kuap() 2019-05-09 14:28:56 +10:00
mmu-hash.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152 2019-05-30 11:26:32 -07:00
mmu.h powerpc/64s: remove register_process_table callback 2019-09-05 14:22:40 +10:00
pgalloc.h treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152 2019-05-30 11:26:32 -07:00
pgtable-4k.h powerpc/mm/hash/4k: Free hugetlb page table caches correctly. 2018-06-20 09:13:25 +10:00
pgtable-64k.h powerpc/mm/thp: update pmd_trans_huge to check for pmd_present 2018-10-03 15:40:00 +10:00
pgtable.h powerpc/mm: refactor ioremap vm area setup. 2019-08-27 13:03:35 +10:00
radix-4k.h powerpc/mm/64: Document the sizes of/sizes mapped by Pxx_INDEX_SIZE 2019-04-20 22:02:11 +10:00
radix-64k.h powerpc/mm/64: Document the sizes of/sizes mapped by Pxx_INDEX_SIZE 2019-04-20 22:02:11 +10:00
radix.h powerpc/mm: refactor ioremap_range() and use ioremap_page_range() 2019-08-27 13:03:35 +10:00
slice.h powerpc/mm: define subarch SLB_ADDR_LIMIT_DEFAULT 2019-05-03 01:20:23 +10:00
tlbflush-hash.h powerpc/64s: Improve local TLB flush for boot and MCE on POWER9 2018-01-18 00:40:31 +11:00
tlbflush-radix.h powerpc/64s/radix: tidy up TLB flushing code 2019-09-05 14:22:40 +10:00
tlbflush.h powerpc/64s/radix: introduce options to disable use of the tlbie instruction 2019-09-05 14:22:41 +10:00