![Linus Torvalds](/assets/img/avatar_default.png)
- CPU ops and PSCI (Power State Coordination Interface) refactoring following the merging of the arm64 ACPI support, together with handling of Trusted (secure) OS instances - Using fixmap for permanent FDT mapping, removing the initial dtb placement requirements (within 512MB from the start of the kernel image). This required moving the FDT self reservation out of the memreserve processing - Idmap (1:1 mapping used for MMU on/off) handling clean-up - Removing flush_cache_all() - not safe on ARM unless the MMU is off. Last stages of CPU power down/up are handled by firmware already - "Alternatives" (run-time code patching) refactoring and support for immediate branch patching, GICv3 CPU interface access - User faults handling clean-up And some fixes: - Fix for VDSO building with broken ELF toolchains - Fixing another case of init_mm.pgd usage for user mappings (during ASID roll-over broadcasting) - Fix for FPSIMD reloading after CPU hotplug - Fix for missing syscall trace exit - Workaround for .inst asm bug - Compat fix for switching the user tls tpidr_el0 register -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJVitZgAAoJEGvWsS0AyF7x+ToP/0Yci5bNsYVwVay8N1rK6WHh SGzDMzyxcSBjQpz2IhhTJ28eTAEH+a+HWQms+0tBehjqxqkvjuzBN0okDkc/z8NB 7Z0BV2aLkQcMwTbjgIh5jm25ZpGmvmvbWPD5oBwgmgQ4v4i1OLRKgx7+YQ+z9rWZ zC70d0UwyWjs2oxmjd2ZrAkps7v/qozEFhcRHxLzCn8Mbw+3FcTQsqMbfnoWGnH0 YuGfHQQqBY4/HC7uAslMCy7tXeJXqb+NsgrnAovjfEbHGDjsg0KNl06K++LHwE37 A5Noa3M0AQEPYqx/sg0Ec8RNUUEMB4RA2DCaibp7XlVGncXOwFfiyk/M5uVrYXIO ku5QF0ytUfZKzrMq3yQKbEDuCPOFTqjjdVpkeXKFdW66zYTohKVc3vUBV5xHZ5uO 7Kr8H0ZnhAv3OxPyKdEwAuQ5sJdWwQSvZyGClxMUO4eC/UzD0Mwwf1Y8WYtiAXx+ NSTeBKw/m33W3/KhNuNH1+qGEOKhuXuKX7AcYA84Rab8ytxYWcurHCG2bmhzpEse 2DZtNMybrP/HMQPyJlYgGac8B3QbsAIAkkU1f+dJTAv9otuBDhscaDQyZ9Y6WVht /k8zJiZeMEuGAmwgTkzLmWs/8pQq42nW4J4eQdXPZAwp4ghCIypPWfaZASAwee6/ p+es3v8P4k9wkv2TFZMh =YeGl -----END PGP SIGNATURE----- Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 updates from Catalin Marinas: "Mostly refactoring/clean-up: - CPU ops and PSCI (Power State Coordination Interface) refactoring following the merging of the arm64 ACPI support, together with handling of Trusted (secure) OS instances - Using fixmap for permanent FDT mapping, removing the initial dtb placement requirements (within 512MB from the start of the kernel image). This required moving the FDT self reservation out of the memreserve processing - Idmap (1:1 mapping used for MMU on/off) handling clean-up - Removing flush_cache_all() - not safe on ARM unless the MMU is off. Last stages of CPU power down/up are handled by firmware already - "Alternatives" (run-time code patching) refactoring and support for immediate branch patching, GICv3 CPU interface access - User faults handling clean-up And some fixes: - Fix for VDSO building with broken ELF toolchains - Fix another case of init_mm.pgd usage for user mappings (during ASID roll-over broadcasting) - Fix for FPSIMD reloading after CPU hotplug - Fix for missing syscall trace exit - Workaround for .inst asm bug - Compat fix for switching the user tls tpidr_el0 register" * tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (42 commits) arm64: use private ratelimit state along with show_unhandled_signals arm64: show unhandled SP/PC alignment faults arm64: vdso: work-around broken ELF toolchains in Makefile arm64: kernel: rename __cpu_suspend to keep it aligned with arm arm64: compat: print compat_sp instead of sp arm64: mm: Fix freeing of the wrong memmap entries with !SPARSEMEM_VMEMMAP arm64: entry: fix context tracking for el0_sp_pc arm64: defconfig: enable memtest arm64: mm: remove reference to tlb.S from comment block arm64: Do not attempt to use init_mm in reset_context() arm64: KVM: Switch vgic save/restore to alternative_insn arm64: alternative: Introduce feature for GICv3 CPU interface arm64: psci: fix !CONFIG_HOTPLUG_CPU build warning arm64: fix bug for reloading FPSIMD state after CPU hotplug. arm64: kernel thread don't need to save fpsimd context. arm64: fix missing syscall trace exit arm64: alternative: Work around .inst assembler bugs arm64: alternative: Merge alternative-asm.h into alternative.h arm64: alternative: Allow immediate branch as alternative instruction arm64: Rework alternate sequence for ARM erratum 845719 ...
323 lines
8.2 KiB
C
323 lines
8.2 KiB
C
/*
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* Copyright (C) 2012 - ARM Ltd
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* Author: Marc Zyngier <marc.zyngier@arm.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/preempt.h>
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#include <linux/kvm_host.h>
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#include <linux/wait.h>
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#include <asm/cputype.h>
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#include <asm/kvm_emulate.h>
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#include <asm/kvm_psci.h>
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#include <asm/kvm_host.h>
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#include <uapi/linux/psci.h>
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/*
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* This is an implementation of the Power State Coordination Interface
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* as described in ARM document number ARM DEN 0022A.
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*/
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#define AFFINITY_MASK(level) ~((0x1UL << ((level) * MPIDR_LEVEL_BITS)) - 1)
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static unsigned long psci_affinity_mask(unsigned long affinity_level)
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{
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if (affinity_level <= 3)
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return MPIDR_HWID_BITMASK & AFFINITY_MASK(affinity_level);
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return 0;
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}
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static unsigned long kvm_psci_vcpu_suspend(struct kvm_vcpu *vcpu)
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{
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/*
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* NOTE: For simplicity, we make VCPU suspend emulation to be
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* same-as WFI (Wait-for-interrupt) emulation.
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*
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* This means for KVM the wakeup events are interrupts and
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* this is consistent with intended use of StateID as described
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* in section 5.4.1 of PSCI v0.2 specification (ARM DEN 0022A).
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*
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* Further, we also treat power-down request to be same as
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* stand-by request as-per section 5.4.2 clause 3 of PSCI v0.2
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* specification (ARM DEN 0022A). This means all suspend states
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* for KVM will preserve the register state.
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*/
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kvm_vcpu_block(vcpu);
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return PSCI_RET_SUCCESS;
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}
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static void kvm_psci_vcpu_off(struct kvm_vcpu *vcpu)
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{
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vcpu->arch.pause = true;
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}
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static unsigned long kvm_psci_vcpu_on(struct kvm_vcpu *source_vcpu)
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{
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struct kvm *kvm = source_vcpu->kvm;
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struct kvm_vcpu *vcpu = NULL;
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wait_queue_head_t *wq;
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unsigned long cpu_id;
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unsigned long context_id;
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phys_addr_t target_pc;
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cpu_id = *vcpu_reg(source_vcpu, 1) & MPIDR_HWID_BITMASK;
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if (vcpu_mode_is_32bit(source_vcpu))
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cpu_id &= ~((u32) 0);
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vcpu = kvm_mpidr_to_vcpu(kvm, cpu_id);
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/*
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* Make sure the caller requested a valid CPU and that the CPU is
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* turned off.
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*/
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if (!vcpu)
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return PSCI_RET_INVALID_PARAMS;
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if (!vcpu->arch.pause) {
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if (kvm_psci_version(source_vcpu) != KVM_ARM_PSCI_0_1)
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return PSCI_RET_ALREADY_ON;
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else
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return PSCI_RET_INVALID_PARAMS;
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}
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target_pc = *vcpu_reg(source_vcpu, 2);
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context_id = *vcpu_reg(source_vcpu, 3);
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kvm_reset_vcpu(vcpu);
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/* Gracefully handle Thumb2 entry point */
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if (vcpu_mode_is_32bit(vcpu) && (target_pc & 1)) {
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target_pc &= ~((phys_addr_t) 1);
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vcpu_set_thumb(vcpu);
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}
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/* Propagate caller endianness */
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if (kvm_vcpu_is_be(source_vcpu))
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kvm_vcpu_set_be(vcpu);
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*vcpu_pc(vcpu) = target_pc;
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/*
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* NOTE: We always update r0 (or x0) because for PSCI v0.1
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* the general puspose registers are undefined upon CPU_ON.
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*/
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*vcpu_reg(vcpu, 0) = context_id;
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vcpu->arch.pause = false;
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smp_mb(); /* Make sure the above is visible */
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wq = kvm_arch_vcpu_wq(vcpu);
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wake_up_interruptible(wq);
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return PSCI_RET_SUCCESS;
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}
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static unsigned long kvm_psci_vcpu_affinity_info(struct kvm_vcpu *vcpu)
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{
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int i;
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unsigned long mpidr;
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unsigned long target_affinity;
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unsigned long target_affinity_mask;
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unsigned long lowest_affinity_level;
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struct kvm *kvm = vcpu->kvm;
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struct kvm_vcpu *tmp;
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target_affinity = *vcpu_reg(vcpu, 1);
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lowest_affinity_level = *vcpu_reg(vcpu, 2);
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/* Determine target affinity mask */
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target_affinity_mask = psci_affinity_mask(lowest_affinity_level);
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if (!target_affinity_mask)
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return PSCI_RET_INVALID_PARAMS;
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/* Ignore other bits of target affinity */
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target_affinity &= target_affinity_mask;
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/*
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* If one or more VCPU matching target affinity are running
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* then ON else OFF
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*/
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kvm_for_each_vcpu(i, tmp, kvm) {
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mpidr = kvm_vcpu_get_mpidr_aff(tmp);
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if (((mpidr & target_affinity_mask) == target_affinity) &&
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!tmp->arch.pause) {
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return PSCI_0_2_AFFINITY_LEVEL_ON;
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}
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}
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return PSCI_0_2_AFFINITY_LEVEL_OFF;
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}
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static void kvm_prepare_system_event(struct kvm_vcpu *vcpu, u32 type)
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{
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int i;
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struct kvm_vcpu *tmp;
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/*
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* The KVM ABI specifies that a system event exit may call KVM_RUN
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* again and may perform shutdown/reboot at a later time that when the
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* actual request is made. Since we are implementing PSCI and a
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* caller of PSCI reboot and shutdown expects that the system shuts
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* down or reboots immediately, let's make sure that VCPUs are not run
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* after this call is handled and before the VCPUs have been
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* re-initialized.
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*/
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kvm_for_each_vcpu(i, tmp, vcpu->kvm) {
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tmp->arch.pause = true;
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kvm_vcpu_kick(tmp);
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}
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memset(&vcpu->run->system_event, 0, sizeof(vcpu->run->system_event));
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vcpu->run->system_event.type = type;
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vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
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}
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static void kvm_psci_system_off(struct kvm_vcpu *vcpu)
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{
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kvm_prepare_system_event(vcpu, KVM_SYSTEM_EVENT_SHUTDOWN);
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}
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static void kvm_psci_system_reset(struct kvm_vcpu *vcpu)
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{
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kvm_prepare_system_event(vcpu, KVM_SYSTEM_EVENT_RESET);
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}
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int kvm_psci_version(struct kvm_vcpu *vcpu)
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{
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if (test_bit(KVM_ARM_VCPU_PSCI_0_2, vcpu->arch.features))
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return KVM_ARM_PSCI_0_2;
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return KVM_ARM_PSCI_0_1;
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}
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static int kvm_psci_0_2_call(struct kvm_vcpu *vcpu)
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{
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int ret = 1;
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unsigned long psci_fn = *vcpu_reg(vcpu, 0) & ~((u32) 0);
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unsigned long val;
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switch (psci_fn) {
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case PSCI_0_2_FN_PSCI_VERSION:
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/*
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* Bits[31:16] = Major Version = 0
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* Bits[15:0] = Minor Version = 2
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*/
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val = 2;
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break;
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case PSCI_0_2_FN_CPU_SUSPEND:
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case PSCI_0_2_FN64_CPU_SUSPEND:
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val = kvm_psci_vcpu_suspend(vcpu);
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break;
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case PSCI_0_2_FN_CPU_OFF:
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kvm_psci_vcpu_off(vcpu);
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val = PSCI_RET_SUCCESS;
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break;
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case PSCI_0_2_FN_CPU_ON:
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case PSCI_0_2_FN64_CPU_ON:
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val = kvm_psci_vcpu_on(vcpu);
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break;
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case PSCI_0_2_FN_AFFINITY_INFO:
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case PSCI_0_2_FN64_AFFINITY_INFO:
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val = kvm_psci_vcpu_affinity_info(vcpu);
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break;
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case PSCI_0_2_FN_MIGRATE_INFO_TYPE:
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/*
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* Trusted OS is MP hence does not require migration
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* or
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* Trusted OS is not present
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*/
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val = PSCI_0_2_TOS_MP;
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break;
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case PSCI_0_2_FN_SYSTEM_OFF:
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kvm_psci_system_off(vcpu);
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/*
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* We should'nt be going back to guest VCPU after
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* receiving SYSTEM_OFF request.
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*
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* If user space accidently/deliberately resumes
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* guest VCPU after SYSTEM_OFF request then guest
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* VCPU should see internal failure from PSCI return
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* value. To achieve this, we preload r0 (or x0) with
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* PSCI return value INTERNAL_FAILURE.
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*/
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val = PSCI_RET_INTERNAL_FAILURE;
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ret = 0;
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break;
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case PSCI_0_2_FN_SYSTEM_RESET:
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kvm_psci_system_reset(vcpu);
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/*
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* Same reason as SYSTEM_OFF for preloading r0 (or x0)
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* with PSCI return value INTERNAL_FAILURE.
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*/
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val = PSCI_RET_INTERNAL_FAILURE;
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ret = 0;
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break;
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default:
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val = PSCI_RET_NOT_SUPPORTED;
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break;
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}
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*vcpu_reg(vcpu, 0) = val;
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return ret;
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}
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static int kvm_psci_0_1_call(struct kvm_vcpu *vcpu)
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{
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unsigned long psci_fn = *vcpu_reg(vcpu, 0) & ~((u32) 0);
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unsigned long val;
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switch (psci_fn) {
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case KVM_PSCI_FN_CPU_OFF:
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kvm_psci_vcpu_off(vcpu);
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val = PSCI_RET_SUCCESS;
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break;
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case KVM_PSCI_FN_CPU_ON:
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val = kvm_psci_vcpu_on(vcpu);
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break;
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default:
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val = PSCI_RET_NOT_SUPPORTED;
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break;
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}
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*vcpu_reg(vcpu, 0) = val;
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return 1;
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}
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/**
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* kvm_psci_call - handle PSCI call if r0 value is in range
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* @vcpu: Pointer to the VCPU struct
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*
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* Handle PSCI calls from guests through traps from HVC instructions.
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* The calling convention is similar to SMC calls to the secure world
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* where the function number is placed in r0.
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*
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* This function returns: > 0 (success), 0 (success but exit to user
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* space), and < 0 (errors)
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*
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* Errors:
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* -EINVAL: Unrecognized PSCI function
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*/
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int kvm_psci_call(struct kvm_vcpu *vcpu)
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{
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switch (kvm_psci_version(vcpu)) {
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case KVM_ARM_PSCI_0_2:
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return kvm_psci_0_2_call(vcpu);
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case KVM_ARM_PSCI_0_1:
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return kvm_psci_0_1_call(vcpu);
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default:
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return -EINVAL;
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};
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}
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