![Andi Kleen](/assets/img/avatar_default.png)
Tell the compiler that the inline assembler statement references lguest_entry. This fixes compile problems with LTO where the variable and the assembler code may end up in different files. Cc: x86@kernel.org Cc: rusty@rustcorp.com.au Signed-off-by: Andi Kleen <ak@linux.intel.com> Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
721 lines
23 KiB
C
721 lines
23 KiB
C
/*
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* Copyright (C) 2006, Rusty Russell <rusty@rustcorp.com.au> IBM Corporation.
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* Copyright (C) 2007, Jes Sorensen <jes@sgi.com> SGI.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
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* NON INFRINGEMENT. See the GNU General Public License for more
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* details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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/*P:450
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* This file contains the x86-specific lguest code. It used to be all
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* mixed in with drivers/lguest/core.c but several foolhardy code slashers
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* wrestled most of the dependencies out to here in preparation for porting
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* lguest to other architectures (see what I mean by foolhardy?).
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*
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* This also contains a couple of non-obvious setup and teardown pieces which
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* were implemented after days of debugging pain.
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:*/
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#include <linux/kernel.h>
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#include <linux/start_kernel.h>
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#include <linux/string.h>
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#include <linux/console.h>
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#include <linux/screen_info.h>
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#include <linux/irq.h>
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#include <linux/interrupt.h>
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#include <linux/clocksource.h>
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#include <linux/clockchips.h>
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#include <linux/cpu.h>
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#include <linux/lguest.h>
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#include <linux/lguest_launcher.h>
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#include <asm/paravirt.h>
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#include <asm/param.h>
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#include <asm/page.h>
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#include <asm/pgtable.h>
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#include <asm/desc.h>
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#include <asm/setup.h>
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#include <asm/lguest.h>
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#include <asm/uaccess.h>
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#include <asm/i387.h>
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#include "../lg.h"
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static int cpu_had_pge;
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static struct {
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unsigned long offset;
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unsigned short segment;
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} lguest_entry;
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/* Offset from where switcher.S was compiled to where we've copied it */
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static unsigned long switcher_offset(void)
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{
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return switcher_addr - (unsigned long)start_switcher_text;
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}
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/* This cpu's struct lguest_pages (after the Switcher text page) */
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static struct lguest_pages *lguest_pages(unsigned int cpu)
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{
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return &(((struct lguest_pages *)(switcher_addr + PAGE_SIZE))[cpu]);
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}
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static DEFINE_PER_CPU(struct lg_cpu *, lg_last_cpu);
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/*S:010
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* We approach the Switcher.
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*
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* Remember that each CPU has two pages which are visible to the Guest when it
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* runs on that CPU. This has to contain the state for that Guest: we copy the
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* state in just before we run the Guest.
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*
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* Each Guest has "changed" flags which indicate what has changed in the Guest
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* since it last ran. We saw this set in interrupts_and_traps.c and
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* segments.c.
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*/
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static void copy_in_guest_info(struct lg_cpu *cpu, struct lguest_pages *pages)
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{
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/*
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* Copying all this data can be quite expensive. We usually run the
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* same Guest we ran last time (and that Guest hasn't run anywhere else
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* meanwhile). If that's not the case, we pretend everything in the
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* Guest has changed.
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*/
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if (__this_cpu_read(lg_last_cpu) != cpu || cpu->last_pages != pages) {
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__this_cpu_write(lg_last_cpu, cpu);
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cpu->last_pages = pages;
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cpu->changed = CHANGED_ALL;
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}
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/*
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* These copies are pretty cheap, so we do them unconditionally: */
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/* Save the current Host top-level page directory.
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*/
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pages->state.host_cr3 = __pa(current->mm->pgd);
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/*
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* Set up the Guest's page tables to see this CPU's pages (and no
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* other CPU's pages).
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*/
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map_switcher_in_guest(cpu, pages);
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/*
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* Set up the two "TSS" members which tell the CPU what stack to use
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* for traps which do directly into the Guest (ie. traps at privilege
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* level 1).
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*/
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pages->state.guest_tss.sp1 = cpu->esp1;
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pages->state.guest_tss.ss1 = cpu->ss1;
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/* Copy direct-to-Guest trap entries. */
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if (cpu->changed & CHANGED_IDT)
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copy_traps(cpu, pages->state.guest_idt, default_idt_entries);
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/* Copy all GDT entries which the Guest can change. */
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if (cpu->changed & CHANGED_GDT)
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copy_gdt(cpu, pages->state.guest_gdt);
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/* If only the TLS entries have changed, copy them. */
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else if (cpu->changed & CHANGED_GDT_TLS)
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copy_gdt_tls(cpu, pages->state.guest_gdt);
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/* Mark the Guest as unchanged for next time. */
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cpu->changed = 0;
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}
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/* Finally: the code to actually call into the Switcher to run the Guest. */
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static void run_guest_once(struct lg_cpu *cpu, struct lguest_pages *pages)
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{
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/* This is a dummy value we need for GCC's sake. */
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unsigned int clobber;
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/*
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* Copy the guest-specific information into this CPU's "struct
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* lguest_pages".
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*/
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copy_in_guest_info(cpu, pages);
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/*
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* Set the trap number to 256 (impossible value). If we fault while
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* switching to the Guest (bad segment registers or bug), this will
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* cause us to abort the Guest.
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*/
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cpu->regs->trapnum = 256;
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/*
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* Now: we push the "eflags" register on the stack, then do an "lcall".
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* This is how we change from using the kernel code segment to using
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* the dedicated lguest code segment, as well as jumping into the
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* Switcher.
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*
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* The lcall also pushes the old code segment (KERNEL_CS) onto the
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* stack, then the address of this call. This stack layout happens to
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* exactly match the stack layout created by an interrupt...
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*/
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asm volatile("pushf; lcall *%4"
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/*
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* This is how we tell GCC that %eax ("a") and %ebx ("b")
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* are changed by this routine. The "=" means output.
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*/
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: "=a"(clobber), "=b"(clobber)
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/*
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* %eax contains the pages pointer. ("0" refers to the
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* 0-th argument above, ie "a"). %ebx contains the
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* physical address of the Guest's top-level page
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* directory.
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*/
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: "0"(pages),
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"1"(__pa(cpu->lg->pgdirs[cpu->cpu_pgd].pgdir)),
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"m"(lguest_entry)
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/*
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* We tell gcc that all these registers could change,
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* which means we don't have to save and restore them in
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* the Switcher.
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*/
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: "memory", "%edx", "%ecx", "%edi", "%esi");
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}
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/*:*/
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/*M:002
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* There are hooks in the scheduler which we can register to tell when we
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* get kicked off the CPU (preempt_notifier_register()). This would allow us
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* to lazily disable SYSENTER which would regain some performance, and should
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* also simplify copy_in_guest_info(). Note that we'd still need to restore
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* things when we exit to Launcher userspace, but that's fairly easy.
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*
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* We could also try using these hooks for PGE, but that might be too expensive.
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*
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* The hooks were designed for KVM, but we can also put them to good use.
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:*/
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/*H:040
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* This is the i386-specific code to setup and run the Guest. Interrupts
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* are disabled: we own the CPU.
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*/
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void lguest_arch_run_guest(struct lg_cpu *cpu)
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{
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/*
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* Remember the awfully-named TS bit? If the Guest has asked to set it
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* we set it now, so we can trap and pass that trap to the Guest if it
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* uses the FPU.
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*/
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if (cpu->ts && user_has_fpu())
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stts();
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/*
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* SYSENTER is an optimized way of doing system calls. We can't allow
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* it because it always jumps to privilege level 0. A normal Guest
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* won't try it because we don't advertise it in CPUID, but a malicious
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* Guest (or malicious Guest userspace program) could, so we tell the
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* CPU to disable it before running the Guest.
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*/
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if (boot_cpu_has(X86_FEATURE_SEP))
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wrmsr(MSR_IA32_SYSENTER_CS, 0, 0);
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/*
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* Now we actually run the Guest. It will return when something
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* interesting happens, and we can examine its registers to see what it
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* was doing.
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*/
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run_guest_once(cpu, lguest_pages(raw_smp_processor_id()));
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/*
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* Note that the "regs" structure contains two extra entries which are
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* not really registers: a trap number which says what interrupt or
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* trap made the switcher code come back, and an error code which some
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* traps set.
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*/
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/* Restore SYSENTER if it's supposed to be on. */
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if (boot_cpu_has(X86_FEATURE_SEP))
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wrmsr(MSR_IA32_SYSENTER_CS, __KERNEL_CS, 0);
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/* Clear the host TS bit if it was set above. */
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if (cpu->ts && user_has_fpu())
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clts();
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/*
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* If the Guest page faulted, then the cr2 register will tell us the
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* bad virtual address. We have to grab this now, because once we
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* re-enable interrupts an interrupt could fault and thus overwrite
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* cr2, or we could even move off to a different CPU.
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*/
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if (cpu->regs->trapnum == 14)
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cpu->arch.last_pagefault = read_cr2();
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/*
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* Similarly, if we took a trap because the Guest used the FPU,
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* we have to restore the FPU it expects to see.
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* math_state_restore() may sleep and we may even move off to
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* a different CPU. So all the critical stuff should be done
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* before this.
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*/
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else if (cpu->regs->trapnum == 7 && !user_has_fpu())
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math_state_restore();
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}
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/*H:130
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* Now we've examined the hypercall code; our Guest can make requests.
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* Our Guest is usually so well behaved; it never tries to do things it isn't
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* allowed to, and uses hypercalls instead. Unfortunately, Linux's paravirtual
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* infrastructure isn't quite complete, because it doesn't contain replacements
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* for the Intel I/O instructions. As a result, the Guest sometimes fumbles
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* across one during the boot process as it probes for various things which are
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* usually attached to a PC.
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*
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* When the Guest uses one of these instructions, we get a trap (General
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* Protection Fault) and come here. We see if it's one of those troublesome
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* instructions and skip over it. We return true if we did.
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*/
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static int emulate_insn(struct lg_cpu *cpu)
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{
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u8 insn;
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unsigned int insnlen = 0, in = 0, small_operand = 0;
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/*
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* The eip contains the *virtual* address of the Guest's instruction:
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* walk the Guest's page tables to find the "physical" address.
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*/
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unsigned long physaddr = guest_pa(cpu, cpu->regs->eip);
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/*
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* This must be the Guest kernel trying to do something, not userspace!
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* The bottom two bits of the CS segment register are the privilege
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* level.
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*/
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if ((cpu->regs->cs & 3) != GUEST_PL)
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return 0;
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/* Decoding x86 instructions is icky. */
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insn = lgread(cpu, physaddr, u8);
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/*
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* Around 2.6.33, the kernel started using an emulation for the
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* cmpxchg8b instruction in early boot on many configurations. This
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* code isn't paravirtualized, and it tries to disable interrupts.
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* Ignore it, which will Mostly Work.
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*/
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if (insn == 0xfa) {
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/* "cli", or Clear Interrupt Enable instruction. Skip it. */
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cpu->regs->eip++;
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return 1;
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}
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/*
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* 0x66 is an "operand prefix". It means a 16, not 32 bit in/out.
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*/
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if (insn == 0x66) {
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small_operand = 1;
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/* The instruction is 1 byte so far, read the next byte. */
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insnlen = 1;
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insn = lgread(cpu, physaddr + insnlen, u8);
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}
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/*
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* We can ignore the lower bit for the moment and decode the 4 opcodes
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* we need to emulate.
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*/
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switch (insn & 0xFE) {
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case 0xE4: /* in <next byte>,%al */
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insnlen += 2;
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in = 1;
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break;
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case 0xEC: /* in (%dx),%al */
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insnlen += 1;
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in = 1;
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break;
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case 0xE6: /* out %al,<next byte> */
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insnlen += 2;
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break;
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case 0xEE: /* out %al,(%dx) */
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insnlen += 1;
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break;
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default:
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/* OK, we don't know what this is, can't emulate. */
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return 0;
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}
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/*
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* If it was an "IN" instruction, they expect the result to be read
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* into %eax, so we change %eax. We always return all-ones, which
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* traditionally means "there's nothing there".
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*/
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if (in) {
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/* Lower bit tells means it's a 32/16 bit access */
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if (insn & 0x1) {
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if (small_operand)
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cpu->regs->eax |= 0xFFFF;
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else
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cpu->regs->eax = 0xFFFFFFFF;
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} else
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cpu->regs->eax |= 0xFF;
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}
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/* Finally, we've "done" the instruction, so move past it. */
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cpu->regs->eip += insnlen;
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/* Success! */
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return 1;
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}
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/*H:050 Once we've re-enabled interrupts, we look at why the Guest exited. */
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void lguest_arch_handle_trap(struct lg_cpu *cpu)
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{
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switch (cpu->regs->trapnum) {
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case 13: /* We've intercepted a General Protection Fault. */
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/*
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* Check if this was one of those annoying IN or OUT
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* instructions which we need to emulate. If so, we just go
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* back into the Guest after we've done it.
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*/
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if (cpu->regs->errcode == 0) {
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if (emulate_insn(cpu))
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return;
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}
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break;
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case 14: /* We've intercepted a Page Fault. */
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/*
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* The Guest accessed a virtual address that wasn't mapped.
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* This happens a lot: we don't actually set up most of the page
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* tables for the Guest at all when we start: as it runs it asks
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* for more and more, and we set them up as required. In this
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* case, we don't even tell the Guest that the fault happened.
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*
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* The errcode tells whether this was a read or a write, and
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* whether kernel or userspace code.
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*/
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if (demand_page(cpu, cpu->arch.last_pagefault,
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cpu->regs->errcode))
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return;
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/*
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* OK, it's really not there (or not OK): the Guest needs to
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* know. We write out the cr2 value so it knows where the
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* fault occurred.
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*
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* Note that if the Guest were really messed up, this could
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* happen before it's done the LHCALL_LGUEST_INIT hypercall, so
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* lg->lguest_data could be NULL
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*/
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if (cpu->lg->lguest_data &&
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put_user(cpu->arch.last_pagefault,
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&cpu->lg->lguest_data->cr2))
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kill_guest(cpu, "Writing cr2");
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break;
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case 7: /* We've intercepted a Device Not Available fault. */
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/*
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* If the Guest doesn't want to know, we already restored the
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* Floating Point Unit, so we just continue without telling it.
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*/
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if (!cpu->ts)
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return;
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break;
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case 32 ... 255:
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/*
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* These values mean a real interrupt occurred, in which case
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* the Host handler has already been run. We just do a
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* friendly check if another process should now be run, then
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* return to run the Guest again.
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*/
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cond_resched();
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return;
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case LGUEST_TRAP_ENTRY:
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/*
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* Our 'struct hcall_args' maps directly over our regs: we set
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* up the pointer now to indicate a hypercall is pending.
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*/
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cpu->hcall = (struct hcall_args *)cpu->regs;
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return;
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}
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/* We didn't handle the trap, so it needs to go to the Guest. */
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if (!deliver_trap(cpu, cpu->regs->trapnum))
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/*
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* If the Guest doesn't have a handler (either it hasn't
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* registered any yet, or it's one of the faults we don't let
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* it handle), it dies with this cryptic error message.
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*/
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kill_guest(cpu, "unhandled trap %li at %#lx (%#lx)",
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cpu->regs->trapnum, cpu->regs->eip,
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cpu->regs->trapnum == 14 ? cpu->arch.last_pagefault
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: cpu->regs->errcode);
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}
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/*
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* Now we can look at each of the routines this calls, in increasing order of
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* complexity: do_hypercalls(), emulate_insn(), maybe_do_interrupt(),
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* deliver_trap() and demand_page(). After all those, we'll be ready to
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* examine the Switcher, and our philosophical understanding of the Host/Guest
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* duality will be complete.
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:*/
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static void adjust_pge(void *on)
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{
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if (on)
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write_cr4(read_cr4() | X86_CR4_PGE);
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else
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write_cr4(read_cr4() & ~X86_CR4_PGE);
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}
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/*H:020
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* Now the Switcher is mapped and every thing else is ready, we need to do
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* some more i386-specific initialization.
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*/
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void __init lguest_arch_host_init(void)
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{
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int i;
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/*
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* Most of the x86/switcher_32.S doesn't care that it's been moved; on
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* Intel, jumps are relative, and it doesn't access any references to
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* external code or data.
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*
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* The only exception is the interrupt handlers in switcher.S: their
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* addresses are placed in a table (default_idt_entries), so we need to
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* update the table with the new addresses. switcher_offset() is a
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* convenience function which returns the distance between the
|
|
* compiled-in switcher code and the high-mapped copy we just made.
|
|
*/
|
|
for (i = 0; i < IDT_ENTRIES; i++)
|
|
default_idt_entries[i] += switcher_offset();
|
|
|
|
/*
|
|
* Set up the Switcher's per-cpu areas.
|
|
*
|
|
* Each CPU gets two pages of its own within the high-mapped region
|
|
* (aka. "struct lguest_pages"). Much of this can be initialized now,
|
|
* but some depends on what Guest we are running (which is set up in
|
|
* copy_in_guest_info()).
|
|
*/
|
|
for_each_possible_cpu(i) {
|
|
/* lguest_pages() returns this CPU's two pages. */
|
|
struct lguest_pages *pages = lguest_pages(i);
|
|
/* This is a convenience pointer to make the code neater. */
|
|
struct lguest_ro_state *state = &pages->state;
|
|
|
|
/*
|
|
* The Global Descriptor Table: the Host has a different one
|
|
* for each CPU. We keep a descriptor for the GDT which says
|
|
* where it is and how big it is (the size is actually the last
|
|
* byte, not the size, hence the "-1").
|
|
*/
|
|
state->host_gdt_desc.size = GDT_SIZE-1;
|
|
state->host_gdt_desc.address = (long)get_cpu_gdt_table(i);
|
|
|
|
/*
|
|
* All CPUs on the Host use the same Interrupt Descriptor
|
|
* Table, so we just use store_idt(), which gets this CPU's IDT
|
|
* descriptor.
|
|
*/
|
|
store_idt(&state->host_idt_desc);
|
|
|
|
/*
|
|
* The descriptors for the Guest's GDT and IDT can be filled
|
|
* out now, too. We copy the GDT & IDT into ->guest_gdt and
|
|
* ->guest_idt before actually running the Guest.
|
|
*/
|
|
state->guest_idt_desc.size = sizeof(state->guest_idt)-1;
|
|
state->guest_idt_desc.address = (long)&state->guest_idt;
|
|
state->guest_gdt_desc.size = sizeof(state->guest_gdt)-1;
|
|
state->guest_gdt_desc.address = (long)&state->guest_gdt;
|
|
|
|
/*
|
|
* We know where we want the stack to be when the Guest enters
|
|
* the Switcher: in pages->regs. The stack grows upwards, so
|
|
* we start it at the end of that structure.
|
|
*/
|
|
state->guest_tss.sp0 = (long)(&pages->regs + 1);
|
|
/*
|
|
* And this is the GDT entry to use for the stack: we keep a
|
|
* couple of special LGUEST entries.
|
|
*/
|
|
state->guest_tss.ss0 = LGUEST_DS;
|
|
|
|
/*
|
|
* x86 can have a finegrained bitmap which indicates what I/O
|
|
* ports the process can use. We set it to the end of our
|
|
* structure, meaning "none".
|
|
*/
|
|
state->guest_tss.io_bitmap_base = sizeof(state->guest_tss);
|
|
|
|
/*
|
|
* Some GDT entries are the same across all Guests, so we can
|
|
* set them up now.
|
|
*/
|
|
setup_default_gdt_entries(state);
|
|
/* Most IDT entries are the same for all Guests, too.*/
|
|
setup_default_idt_entries(state, default_idt_entries);
|
|
|
|
/*
|
|
* The Host needs to be able to use the LGUEST segments on this
|
|
* CPU, too, so put them in the Host GDT.
|
|
*/
|
|
get_cpu_gdt_table(i)[GDT_ENTRY_LGUEST_CS] = FULL_EXEC_SEGMENT;
|
|
get_cpu_gdt_table(i)[GDT_ENTRY_LGUEST_DS] = FULL_SEGMENT;
|
|
}
|
|
|
|
/*
|
|
* In the Switcher, we want the %cs segment register to use the
|
|
* LGUEST_CS GDT entry: we've put that in the Host and Guest GDTs, so
|
|
* it will be undisturbed when we switch. To change %cs and jump we
|
|
* need this structure to feed to Intel's "lcall" instruction.
|
|
*/
|
|
lguest_entry.offset = (long)switch_to_guest + switcher_offset();
|
|
lguest_entry.segment = LGUEST_CS;
|
|
|
|
/*
|
|
* Finally, we need to turn off "Page Global Enable". PGE is an
|
|
* optimization where page table entries are specially marked to show
|
|
* they never change. The Host kernel marks all the kernel pages this
|
|
* way because it's always present, even when userspace is running.
|
|
*
|
|
* Lguest breaks this: unbeknownst to the rest of the Host kernel, we
|
|
* switch to the Guest kernel. If you don't disable this on all CPUs,
|
|
* you'll get really weird bugs that you'll chase for two days.
|
|
*
|
|
* I used to turn PGE off every time we switched to the Guest and back
|
|
* on when we return, but that slowed the Switcher down noticibly.
|
|
*/
|
|
|
|
/*
|
|
* We don't need the complexity of CPUs coming and going while we're
|
|
* doing this.
|
|
*/
|
|
get_online_cpus();
|
|
if (cpu_has_pge) { /* We have a broader idea of "global". */
|
|
/* Remember that this was originally set (for cleanup). */
|
|
cpu_had_pge = 1;
|
|
/*
|
|
* adjust_pge is a helper function which sets or unsets the PGE
|
|
* bit on its CPU, depending on the argument (0 == unset).
|
|
*/
|
|
on_each_cpu(adjust_pge, (void *)0, 1);
|
|
/* Turn off the feature in the global feature set. */
|
|
clear_cpu_cap(&boot_cpu_data, X86_FEATURE_PGE);
|
|
}
|
|
put_online_cpus();
|
|
}
|
|
/*:*/
|
|
|
|
void __exit lguest_arch_host_fini(void)
|
|
{
|
|
/* If we had PGE before we started, turn it back on now. */
|
|
get_online_cpus();
|
|
if (cpu_had_pge) {
|
|
set_cpu_cap(&boot_cpu_data, X86_FEATURE_PGE);
|
|
/* adjust_pge's argument "1" means set PGE. */
|
|
on_each_cpu(adjust_pge, (void *)1, 1);
|
|
}
|
|
put_online_cpus();
|
|
}
|
|
|
|
|
|
/*H:122 The i386-specific hypercalls simply farm out to the right functions. */
|
|
int lguest_arch_do_hcall(struct lg_cpu *cpu, struct hcall_args *args)
|
|
{
|
|
switch (args->arg0) {
|
|
case LHCALL_LOAD_GDT_ENTRY:
|
|
load_guest_gdt_entry(cpu, args->arg1, args->arg2, args->arg3);
|
|
break;
|
|
case LHCALL_LOAD_IDT_ENTRY:
|
|
load_guest_idt_entry(cpu, args->arg1, args->arg2, args->arg3);
|
|
break;
|
|
case LHCALL_LOAD_TLS:
|
|
guest_load_tls(cpu, args->arg1);
|
|
break;
|
|
default:
|
|
/* Bad Guest. Bad! */
|
|
return -EIO;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
/*H:126 i386-specific hypercall initialization: */
|
|
int lguest_arch_init_hypercalls(struct lg_cpu *cpu)
|
|
{
|
|
u32 tsc_speed;
|
|
|
|
/*
|
|
* The pointer to the Guest's "struct lguest_data" is the only argument.
|
|
* We check that address now.
|
|
*/
|
|
if (!lguest_address_ok(cpu->lg, cpu->hcall->arg1,
|
|
sizeof(*cpu->lg->lguest_data)))
|
|
return -EFAULT;
|
|
|
|
/*
|
|
* Having checked it, we simply set lg->lguest_data to point straight
|
|
* into the Launcher's memory at the right place and then use
|
|
* copy_to_user/from_user from now on, instead of lgread/write. I put
|
|
* this in to show that I'm not immune to writing stupid
|
|
* optimizations.
|
|
*/
|
|
cpu->lg->lguest_data = cpu->lg->mem_base + cpu->hcall->arg1;
|
|
|
|
/*
|
|
* We insist that the Time Stamp Counter exist and doesn't change with
|
|
* cpu frequency. Some devious chip manufacturers decided that TSC
|
|
* changes could be handled in software. I decided that time going
|
|
* backwards might be good for benchmarks, but it's bad for users.
|
|
*
|
|
* We also insist that the TSC be stable: the kernel detects unreliable
|
|
* TSCs for its own purposes, and we use that here.
|
|
*/
|
|
if (boot_cpu_has(X86_FEATURE_CONSTANT_TSC) && !check_tsc_unstable())
|
|
tsc_speed = tsc_khz;
|
|
else
|
|
tsc_speed = 0;
|
|
if (put_user(tsc_speed, &cpu->lg->lguest_data->tsc_khz))
|
|
return -EFAULT;
|
|
|
|
/* The interrupt code might not like the system call vector. */
|
|
if (!check_syscall_vector(cpu->lg))
|
|
kill_guest(cpu, "bad syscall vector");
|
|
|
|
return 0;
|
|
}
|
|
/*:*/
|
|
|
|
/*L:030
|
|
* Most of the Guest's registers are left alone: we used get_zeroed_page() to
|
|
* allocate the structure, so they will be 0.
|
|
*/
|
|
void lguest_arch_setup_regs(struct lg_cpu *cpu, unsigned long start)
|
|
{
|
|
struct lguest_regs *regs = cpu->regs;
|
|
|
|
/*
|
|
* There are four "segment" registers which the Guest needs to boot:
|
|
* The "code segment" register (cs) refers to the kernel code segment
|
|
* __KERNEL_CS, and the "data", "extra" and "stack" segment registers
|
|
* refer to the kernel data segment __KERNEL_DS.
|
|
*
|
|
* The privilege level is packed into the lower bits. The Guest runs
|
|
* at privilege level 1 (GUEST_PL).
|
|
*/
|
|
regs->ds = regs->es = regs->ss = __KERNEL_DS|GUEST_PL;
|
|
regs->cs = __KERNEL_CS|GUEST_PL;
|
|
|
|
/*
|
|
* The "eflags" register contains miscellaneous flags. Bit 1 (0x002)
|
|
* is supposed to always be "1". Bit 9 (0x200) controls whether
|
|
* interrupts are enabled. We always leave interrupts enabled while
|
|
* running the Guest.
|
|
*/
|
|
regs->eflags = X86_EFLAGS_IF | X86_EFLAGS_FIXED;
|
|
|
|
/*
|
|
* The "Extended Instruction Pointer" register says where the Guest is
|
|
* running.
|
|
*/
|
|
regs->eip = start;
|
|
|
|
/*
|
|
* %esi points to our boot information, at physical address 0, so don't
|
|
* touch it.
|
|
*/
|
|
|
|
/* There are a couple of GDT entries the Guest expects at boot. */
|
|
setup_guest_gdt(cpu);
|
|
}
|