![Thomas Gleixner](/assets/img/avatar_default.png)
Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Enrico Weigelt <info@metux.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
98 lines
2.7 KiB
C
98 lines
2.7 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* The platform specific code for virtex devices since a boot loader is not
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* always used.
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*
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* (C) Copyright 2008 Xilinx, Inc.
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*/
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#include "ops.h"
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#include "io.h"
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#include "stdio.h"
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#define UART_DLL 0 /* Out: Divisor Latch Low */
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#define UART_DLM 1 /* Out: Divisor Latch High */
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#define UART_FCR 2 /* Out: FIFO Control Register */
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#define UART_FCR_CLEAR_RCVR 0x02 /* Clear the RCVR FIFO */
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#define UART_FCR_CLEAR_XMIT 0x04 /* Clear the XMIT FIFO */
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#define UART_LCR 3 /* Out: Line Control Register */
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#define UART_MCR 4 /* Out: Modem Control Register */
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#define UART_MCR_RTS 0x02 /* RTS complement */
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#define UART_MCR_DTR 0x01 /* DTR complement */
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#define UART_LCR_DLAB 0x80 /* Divisor latch access bit */
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#define UART_LCR_WLEN8 0x03 /* Wordlength: 8 bits */
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static int virtex_ns16550_console_init(void *devp)
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{
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unsigned char *reg_base;
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u32 reg_shift, reg_offset, clk, spd;
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u16 divisor;
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int n;
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if (dt_get_virtual_reg(devp, (void **)®_base, 1) < 1)
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return -1;
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n = getprop(devp, "reg-offset", ®_offset, sizeof(reg_offset));
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if (n == sizeof(reg_offset))
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reg_base += reg_offset;
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n = getprop(devp, "reg-shift", ®_shift, sizeof(reg_shift));
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if (n != sizeof(reg_shift))
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reg_shift = 0;
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n = getprop(devp, "current-speed", (void *)&spd, sizeof(spd));
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if (n != sizeof(spd))
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spd = 9600;
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/* should there be a default clock rate?*/
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n = getprop(devp, "clock-frequency", (void *)&clk, sizeof(clk));
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if (n != sizeof(clk))
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return -1;
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divisor = clk / (16 * spd);
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/* Access baud rate */
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out_8(reg_base + (UART_LCR << reg_shift), UART_LCR_DLAB);
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/* Baud rate based on input clock */
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out_8(reg_base + (UART_DLL << reg_shift), divisor & 0xFF);
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out_8(reg_base + (UART_DLM << reg_shift), divisor >> 8);
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/* 8 data, 1 stop, no parity */
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out_8(reg_base + (UART_LCR << reg_shift), UART_LCR_WLEN8);
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/* RTS/DTR */
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out_8(reg_base + (UART_MCR << reg_shift), UART_MCR_RTS | UART_MCR_DTR);
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/* Clear transmitter and receiver */
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out_8(reg_base + (UART_FCR << reg_shift),
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UART_FCR_CLEAR_XMIT | UART_FCR_CLEAR_RCVR);
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return 0;
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}
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/* For virtex, the kernel may be loaded without using a bootloader and if so
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some UARTs need more setup than is provided in the normal console init
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*/
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int platform_specific_init(void)
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{
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void *devp;
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char devtype[MAX_PROP_LEN];
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char path[MAX_PATH_LEN];
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devp = finddevice("/chosen");
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if (devp == NULL)
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return -1;
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if (getprop(devp, "linux,stdout-path", path, MAX_PATH_LEN) > 0) {
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devp = finddevice(path);
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if (devp == NULL)
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return -1;
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if ((getprop(devp, "device_type", devtype, sizeof(devtype)) > 0)
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&& !strcmp(devtype, "serial")
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&& (dt_is_compatible(devp, "ns16550")))
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virtex_ns16550_console_init(devp);
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}
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return 0;
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}
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