![Xu Yilun](/assets/img/avatar_default.png)
This patch implements the basic functions of the BMC chip for some Intel FPGA PCIe Acceleration Cards (PAC). The BMC is implemented using the Intel MAX 10 CPLD. This BMC chip is connected to the FPGA by a SPI bus. To provide direct register access from the FPGA, the "SPI slave to Avalon Master Bridge" (spi-avmm) IP is integrated in the chip. It converts encoded streams of bytes from the host to the internal register read/write on the Avalon bus. So This driver uses the regmap-spi-avmm for register accessing. Signed-off-by: Xu Yilun <yilun.xu@intel.com> Signed-off-by: Wu Hao <hao.wu@intel.com> Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com> Signed-off-by: Russ Weight <russell.h.weight@intel.com> Reviewed-by: Tom Rix <trix@redhat.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
165 lines
3.8 KiB
C
165 lines
3.8 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Intel MAX 10 Board Management Controller chip
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*
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* Copyright (C) 2018-2020 Intel Corporation. All rights reserved.
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*/
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#include <linux/bitfield.h>
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#include <linux/init.h>
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#include <linux/mfd/core.h>
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#include <linux/mfd/intel-m10-bmc.h>
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#include <linux/module.h>
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#include <linux/mutex.h>
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#include <linux/regmap.h>
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#include <linux/spi/spi.h>
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enum m10bmc_type {
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M10_N3000,
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};
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static struct mfd_cell m10bmc_pacn3000_subdevs[] = {
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{ .name = "n3000bmc-hwmon" },
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{ .name = "n3000bmc-retimer" },
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{ .name = "n3000bmc-secure" },
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};
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static struct regmap_config intel_m10bmc_regmap_config = {
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.reg_bits = 32,
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.val_bits = 32,
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.reg_stride = 4,
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.max_register = M10BMC_MEM_END,
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};
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static ssize_t bmc_version_show(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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struct intel_m10bmc *ddata = dev_get_drvdata(dev);
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unsigned int val;
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int ret;
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ret = m10bmc_sys_read(ddata, M10BMC_BUILD_VER, &val);
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if (ret)
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return ret;
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return sprintf(buf, "0x%x\n", val);
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}
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static DEVICE_ATTR_RO(bmc_version);
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static ssize_t bmcfw_version_show(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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struct intel_m10bmc *ddata = dev_get_drvdata(dev);
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unsigned int val;
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int ret;
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ret = m10bmc_sys_read(ddata, NIOS2_FW_VERSION, &val);
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if (ret)
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return ret;
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return sprintf(buf, "0x%x\n", val);
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}
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static DEVICE_ATTR_RO(bmcfw_version);
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static struct attribute *m10bmc_attrs[] = {
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&dev_attr_bmc_version.attr,
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&dev_attr_bmcfw_version.attr,
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NULL,
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};
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ATTRIBUTE_GROUPS(m10bmc);
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static int check_m10bmc_version(struct intel_m10bmc *ddata)
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{
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unsigned int v;
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int ret;
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/*
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* This check is to filter out the very old legacy BMC versions,
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* M10BMC_LEGACY_SYS_BASE is the offset to this old block of mmio
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* registers. In the old BMC chips, the BMC version info is stored
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* in this old version register (M10BMC_LEGACY_SYS_BASE +
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* M10BMC_BUILD_VER), so its read out value would have not been
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* LEGACY_INVALID (0xffffffff). But in new BMC chips that the
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* driver supports, the value of this register should be
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* LEGACY_INVALID.
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*/
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ret = m10bmc_raw_read(ddata,
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M10BMC_LEGACY_SYS_BASE + M10BMC_BUILD_VER, &v);
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if (ret)
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return -ENODEV;
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if (v != M10BMC_VER_LEGACY_INVALID) {
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dev_err(ddata->dev, "bad version M10BMC detected\n");
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return -ENODEV;
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}
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return 0;
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}
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static int intel_m10_bmc_spi_probe(struct spi_device *spi)
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{
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const struct spi_device_id *id = spi_get_device_id(spi);
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struct device *dev = &spi->dev;
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struct mfd_cell *cells;
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struct intel_m10bmc *ddata;
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int ret, n_cell;
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ddata = devm_kzalloc(dev, sizeof(*ddata), GFP_KERNEL);
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if (!ddata)
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return -ENOMEM;
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ddata->dev = dev;
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ddata->regmap =
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devm_regmap_init_spi_avmm(spi, &intel_m10bmc_regmap_config);
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if (IS_ERR(ddata->regmap)) {
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ret = PTR_ERR(ddata->regmap);
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dev_err(dev, "Failed to allocate regmap: %d\n", ret);
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return ret;
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}
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spi_set_drvdata(spi, ddata);
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ret = check_m10bmc_version(ddata);
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if (ret) {
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dev_err(dev, "Failed to identify m10bmc hardware\n");
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return ret;
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}
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switch (id->driver_data) {
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case M10_N3000:
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cells = m10bmc_pacn3000_subdevs;
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n_cell = ARRAY_SIZE(m10bmc_pacn3000_subdevs);
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break;
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default:
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return -ENODEV;
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}
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ret = devm_mfd_add_devices(dev, PLATFORM_DEVID_AUTO, cells, n_cell,
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NULL, 0, NULL);
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if (ret)
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dev_err(dev, "Failed to register sub-devices: %d\n", ret);
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return ret;
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}
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static const struct spi_device_id m10bmc_spi_id[] = {
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{ "m10-n3000", M10_N3000 },
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{ }
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};
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MODULE_DEVICE_TABLE(spi, m10bmc_spi_id);
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static struct spi_driver intel_m10bmc_spi_driver = {
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.driver = {
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.name = "intel-m10-bmc",
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.dev_groups = m10bmc_groups,
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},
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.probe = intel_m10_bmc_spi_probe,
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.id_table = m10bmc_spi_id,
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};
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module_spi_driver(intel_m10bmc_spi_driver);
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MODULE_DESCRIPTION("Intel MAX 10 BMC Device Driver");
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MODULE_AUTHOR("Intel Corporation");
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MODULE_LICENSE("GPL v2");
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MODULE_ALIAS("spi:intel-m10-bmc");
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