69df578c5f
Ocelot has the concept of a CPU port. The CPU port is represented in the forwarding and the queueing system, but it is not a physical device. The CPU port can either be accessed via register-based injection/extraction (which is the case of Ocelot), via Frame-DMA (similar to the first one), or "connected" to a physical Ethernet port (called NPI in the datasheet) which is the case of the Felix DSA switch. In Ocelot the CPU port is at index 11. In Felix the CPU port is at index 6. The CPU bit is treated special in the forwarding, as it is never cleared from the forwarding port mask (once added to it). Other than that, it is treated the same as a normal front port. Both Felix and Ocelot should use the CPU port in the same way. This means that Felix should not use the NPI port directly when forwarding to the CPU, but instead use the CPU port. This patch is fixing this such that Felix will use port 6 as its CPU port, and just use the NPI port to carry the traffic. Therefore, eliminate the "ocelot->cpu" variable which was holding the index of the NPI port for Felix, and the index of the CPU port module for Ocelot, so the variable was actually configuring different things for different drivers and causing at least part of the confusion. Also remove the "ocelot->num_cpu_ports" variable, which is the result of another confusion. The 2 CPU ports mentioned in the datasheet are because there are two frame extraction channels (register based or DMA based). This is of no relevance to the driver at the moment, and invisible to the analyzer module. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Suggested-by: Allan W. Nielsen <allan.nielsen@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
243 lines
11 KiB
C
243 lines
11 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/* Copyright 2019 NXP Semiconductors
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*/
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#include <soc/mscc/ocelot.h>
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#include <linux/packing.h>
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#include "dsa_priv.h"
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/* The CPU injection header and the CPU extraction header can have 3 types of
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* prefixes: long, short and no prefix. The format of the header itself is the
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* same in all 3 cases.
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*
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* Extraction with long prefix:
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*
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* +-------------------+-------------------+------+------+------------+-------+
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* | ff:ff:ff:ff:ff:ff | ff:ff:ff:ff:ff:ff | 8880 | 000a | extraction | frame |
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* | | | | | header | |
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* +-------------------+-------------------+------+------+------------+-------+
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* 48 bits 48 bits 16 bits 16 bits 128 bits
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*
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* Extraction with short prefix:
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*
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* +------+------+------------+-------+
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* | 8880 | 000a | extraction | frame |
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* | | | header | |
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* +------+------+------------+-------+
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* 16 bits 16 bits 128 bits
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*
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* Extraction with no prefix:
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*
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* +------------+-------+
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* | extraction | frame |
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* | header | |
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* +------------+-------+
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* 128 bits
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*
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*
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* Injection with long prefix:
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*
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* +-------------------+-------------------+------+------+------------+-------+
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* | any dmac | any smac | 8880 | 000a | injection | frame |
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* | | | | | header | |
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* +-------------------+-------------------+------+------+------------+-------+
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* 48 bits 48 bits 16 bits 16 bits 128 bits
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*
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* Injection with short prefix:
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*
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* +------+------+------------+-------+
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* | 8880 | 000a | injection | frame |
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* | | | header | |
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* +------+------+------------+-------+
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* 16 bits 16 bits 128 bits
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*
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* Injection with no prefix:
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*
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* +------------+-------+
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* | injection | frame |
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* | header | |
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* +------------+-------+
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* 128 bits
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*
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* The injection header looks like this (network byte order, bit 127
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* is part of lowest address byte in memory, bit 0 is part of highest
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* address byte):
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*
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* +------+------+------+------+------+------+------+------+
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* 127:120 |BYPASS| MASQ | MASQ_PORT |REW_OP|REW_OP|
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* +------+------+------+------+------+------+------+------+
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* 119:112 | REW_OP |
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* +------+------+------+------+------+------+------+------+
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* 111:104 | REW_VAL |
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* +------+------+------+------+------+------+------+------+
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* 103: 96 | REW_VAL |
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* +------+------+------+------+------+------+------+------+
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* 95: 88 | REW_VAL |
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* +------+------+------+------+------+------+------+------+
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* 87: 80 | REW_VAL |
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* +------+------+------+------+------+------+------+------+
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* 79: 72 | RSV |
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* +------+------+------+------+------+------+------+------+
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* 71: 64 | RSV | DEST |
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* +------+------+------+------+------+------+------+------+
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* 63: 56 | DEST |
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* +------+------+------+------+------+------+------+------+
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* 55: 48 | RSV |
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* +------+------+------+------+------+------+------+------+
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* 47: 40 | RSV | SRC_PORT | RSV |TFRM_TIMER|
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* +------+------+------+------+------+------+------+------+
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* 39: 32 | TFRM_TIMER | RSV |
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* +------+------+------+------+------+------+------+------+
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* 31: 24 | RSV | DP | POP_CNT | CPUQ |
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* +------+------+------+------+------+------+------+------+
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* 23: 16 | CPUQ | QOS_CLASS |TAG_TYPE|
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* +------+------+------+------+------+------+------+------+
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* 15: 8 | PCP | DEI | VID |
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* +------+------+------+------+------+------+------+------+
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* 7: 0 | VID |
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* +------+------+------+------+------+------+------+------+
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*
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* And the extraction header looks like this:
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*
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* +------+------+------+------+------+------+------+------+
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* 127:120 | RSV | REW_OP |
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* +------+------+------+------+------+------+------+------+
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* 119:112 | REW_OP | REW_VAL |
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* +------+------+------+------+------+------+------+------+
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* 111:104 | REW_VAL |
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* +------+------+------+------+------+------+------+------+
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* 103: 96 | REW_VAL |
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* +------+------+------+------+------+------+------+------+
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* 95: 88 | REW_VAL |
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* +------+------+------+------+------+------+------+------+
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* 87: 80 | REW_VAL | LLEN |
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* +------+------+------+------+------+------+------+------+
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* 79: 72 | LLEN | WLEN |
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* +------+------+------+------+------+------+------+------+
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* 71: 64 | WLEN | RSV |
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* +------+------+------+------+------+------+------+------+
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* 63: 56 | RSV |
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* +------+------+------+------+------+------+------+------+
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* 55: 48 | RSV |
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* +------+------+------+------+------+------+------+------+
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* 47: 40 | RSV | SRC_PORT | ACL_ID |
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* +------+------+------+------+------+------+------+------+
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* 39: 32 | ACL_ID | RSV | SFLOW_ID |
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* +------+------+------+------+------+------+------+------+
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* 31: 24 |ACL_HIT| DP | LRN_FLAGS | CPUQ |
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* +------+------+------+------+------+------+------+------+
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* 23: 16 | CPUQ | QOS_CLASS |TAG_TYPE|
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* +------+------+------+------+------+------+------+------+
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* 15: 8 | PCP | DEI | VID |
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* +------+------+------+------+------+------+------+------+
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* 7: 0 | VID |
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* +------+------+------+------+------+------+------+------+
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*/
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static struct sk_buff *ocelot_xmit(struct sk_buff *skb,
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struct net_device *netdev)
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{
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struct dsa_port *dp = dsa_slave_to_port(netdev);
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u64 bypass, dest, src, qos_class, rew_op;
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struct dsa_switch *ds = dp->ds;
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int port = dp->index;
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struct ocelot *ocelot = ds->priv;
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struct ocelot_port *ocelot_port = ocelot->ports[port];
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u8 *injection;
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if (unlikely(skb_cow_head(skb, OCELOT_TAG_LEN) < 0)) {
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netdev_err(netdev, "Cannot make room for tag.\n");
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return NULL;
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}
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injection = skb_push(skb, OCELOT_TAG_LEN);
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memset(injection, 0, OCELOT_TAG_LEN);
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/* Set the source port as the CPU port module and not the NPI port */
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src = ocelot->num_phys_ports;
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dest = BIT(port);
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bypass = true;
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qos_class = skb->priority;
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packing(injection, &bypass, 127, 127, OCELOT_TAG_LEN, PACK, 0);
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packing(injection, &dest, 68, 56, OCELOT_TAG_LEN, PACK, 0);
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packing(injection, &src, 46, 43, OCELOT_TAG_LEN, PACK, 0);
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packing(injection, &qos_class, 19, 17, OCELOT_TAG_LEN, PACK, 0);
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if (ocelot->ptp && (skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
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rew_op = ocelot_port->ptp_cmd;
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if (ocelot_port->ptp_cmd == IFH_REW_OP_TWO_STEP_PTP) {
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rew_op |= (ocelot_port->ts_id % 4) << 3;
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ocelot_port->ts_id++;
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}
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packing(injection, &rew_op, 125, 117, OCELOT_TAG_LEN, PACK, 0);
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}
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return skb;
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}
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static struct sk_buff *ocelot_rcv(struct sk_buff *skb,
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struct net_device *netdev,
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struct packet_type *pt)
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{
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u64 src_port, qos_class;
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u8 *start = skb->data;
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u8 *extraction;
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/* Revert skb->data by the amount consumed by the DSA master,
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* so it points to the beginning of the frame.
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*/
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skb_push(skb, ETH_HLEN);
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/* We don't care about the long prefix, it is just for easy entrance
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* into the DSA master's RX filter. Discard it now by moving it into
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* the headroom.
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*/
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skb_pull(skb, OCELOT_LONG_PREFIX_LEN);
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/* And skb->data now points to the extraction frame header.
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* Keep a pointer to it.
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*/
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extraction = skb->data;
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/* Now the EFH is part of the headroom as well */
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skb_pull(skb, OCELOT_TAG_LEN);
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/* Reset the pointer to the real MAC header */
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skb_reset_mac_header(skb);
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skb_reset_mac_len(skb);
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/* And move skb->data to the correct location again */
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skb_pull(skb, ETH_HLEN);
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/* Remove from inet csum the extraction header */
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skb_postpull_rcsum(skb, start, OCELOT_LONG_PREFIX_LEN + OCELOT_TAG_LEN);
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packing(extraction, &src_port, 46, 43, OCELOT_TAG_LEN, UNPACK, 0);
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packing(extraction, &qos_class, 19, 17, OCELOT_TAG_LEN, UNPACK, 0);
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skb->dev = dsa_master_find_slave(netdev, 0, src_port);
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if (!skb->dev)
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/* The switch will reflect back some frames sent through
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* sockets opened on the bare DSA master. These will come back
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* with src_port equal to the index of the CPU port, for which
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* there is no slave registered. So don't print any error
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* message here (ignore and drop those frames).
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*/
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return NULL;
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skb->offload_fwd_mark = 1;
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skb->priority = qos_class;
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return skb;
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}
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static struct dsa_device_ops ocelot_netdev_ops = {
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.name = "ocelot",
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.proto = DSA_TAG_PROTO_OCELOT,
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.xmit = ocelot_xmit,
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.rcv = ocelot_rcv,
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.overhead = OCELOT_TAG_LEN + OCELOT_LONG_PREFIX_LEN,
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};
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MODULE_LICENSE("GPL v2");
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MODULE_ALIAS_DSA_TAG_DRIVER(DSA_TAG_PROTO_OCELOT);
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module_dsa_tag_driver(ocelot_netdev_ops);
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