f9f3f864b5
Section mismatches can now result in build failures. As result, cris:allnoconfig fails to build as follows. WARNING: modpost: Found 7 section mismatch(es). To see full details build your kernel with: 'make CONFIG_DEBUG_SECTION_MISMATCH=y' FATAL: modpost: Section mismatches detected. Set CONFIG_SECTION_MISMATCH_WARN_ONLY=y to allow them. Part of the problem is that references from .text to .init.text are not permitted, and such references are used in cris startup code. Since references from .head.text to .init.text are permitted, move cris startup code to a new section .head.text. Signed-off-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Jesper Nilsson <jesper.nilsson@axis.com>
439 lines
12 KiB
ArmAsm
439 lines
12 KiB
ArmAsm
/*
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* CRISv32 kernel startup code.
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*
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* Copyright (C) 2003, Axis Communications AB
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*/
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#include <linux/init.h>
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#define ASSEMBLER_MACROS_ONLY
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/*
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* The macros found in mmu_defs_asm.h uses the ## concatenation operator, so
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* -traditional must not be used when assembling this file.
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*/
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#include <arch/memmap.h>
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#include <hwregs/reg_rdwr.h>
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#include <hwregs/intr_vect.h>
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#include <hwregs/asm/mmu_defs_asm.h>
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#include <hwregs/asm/reg_map_asm.h>
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#include <mach/startup.inc>
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#define CRAMFS_MAGIC 0x28cd3d45
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#define JHEAD_MAGIC 0x1FF528A6
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#define JHEAD_SIZE 8
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#define RAM_INIT_MAGIC 0x56902387
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#define COMMAND_LINE_MAGIC 0x87109563
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#define NAND_BOOT_MAGIC 0x9a9db001
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;; NOTE: R8 and R9 carry information from the decompressor (if the
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;; kernel was compressed). They must not be used in the code below
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;; until they are read!
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;; Exported symbols.
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.global etrax_irv
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.global romfs_start
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.global romfs_length
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.global romfs_in_flash
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.global nand_boot
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.global swapper_pg_dir
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__HEAD
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tstart:
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;; This is the entry point of the kernel. The CPU is currently in
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;; supervisor mode.
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;;
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;; 0x00000000 if flash.
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;; 0x40004000 if DRAM.
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;;
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di
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START_CLOCKS
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SETUP_WAIT_STATES
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GIO_INIT
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;; Setup and enable the MMU. Use same configuration for both the data
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;; and the instruction MMU.
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;;
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;; Note; 3 cycles is needed for a bank-select to take effect. Further;
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;; bank 1 is the instruction MMU, bank 2 is the data MMU.
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#ifdef CONFIG_CRIS_MACH_ARTPEC3
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move.d REG_FIELD(mmu, rw_mm_kbase_hi, base_e, 8) \
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| REG_FIELD(mmu, rw_mm_kbase_hi, base_c, 4) \
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| REG_FIELD(mmu, rw_mm_kbase_hi, base_d, 5) \
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| REG_FIELD(mmu, rw_mm_kbase_hi, base_b, 0xb), $r0
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#else
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move.d REG_FIELD(mmu, rw_mm_kbase_hi, base_e, 8) \
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| REG_FIELD(mmu, rw_mm_kbase_hi, base_c, 4) \
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| REG_FIELD(mmu, rw_mm_kbase_hi, base_b, 0xb), $r0
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#endif
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;; Temporary map of 0x40 -> 0x40 and 0x00 -> 0x00.
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move.d REG_FIELD(mmu, rw_mm_kbase_lo, base_4, 4) \
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| REG_FIELD(mmu, rw_mm_kbase_lo, base_0, 0), $r1
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;; Enable certain page protections and setup linear mapping
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;; for f,e,c,b,4,0.
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;; ARTPEC-3:
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;; c,d used for linear kernel mapping, up to 512 MB
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;; e used for vmalloc
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;; f unused, but page mapped to get page faults
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;; ETRAX FS:
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;; c used for linear kernel mapping, up to 256 MB
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;; d used for vmalloc
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;; e,f used for memory-mapped NOR flash
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#ifdef CONFIG_CRIS_MACH_ARTPEC3
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move.d REG_STATE(mmu, rw_mm_cfg, we, on) \
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| REG_STATE(mmu, rw_mm_cfg, acc, on) \
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| REG_STATE(mmu, rw_mm_cfg, ex, on) \
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| REG_STATE(mmu, rw_mm_cfg, inv, on) \
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| REG_STATE(mmu, rw_mm_cfg, seg_f, page) \
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| REG_STATE(mmu, rw_mm_cfg, seg_e, page) \
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| REG_STATE(mmu, rw_mm_cfg, seg_d, linear) \
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| REG_STATE(mmu, rw_mm_cfg, seg_c, linear) \
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| REG_STATE(mmu, rw_mm_cfg, seg_b, linear) \
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| REG_STATE(mmu, rw_mm_cfg, seg_a, page) \
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| REG_STATE(mmu, rw_mm_cfg, seg_9, page) \
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| REG_STATE(mmu, rw_mm_cfg, seg_8, page) \
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| REG_STATE(mmu, rw_mm_cfg, seg_7, page) \
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| REG_STATE(mmu, rw_mm_cfg, seg_6, page) \
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| REG_STATE(mmu, rw_mm_cfg, seg_5, page) \
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| REG_STATE(mmu, rw_mm_cfg, seg_4, linear) \
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| REG_STATE(mmu, rw_mm_cfg, seg_3, page) \
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| REG_STATE(mmu, rw_mm_cfg, seg_2, page) \
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| REG_STATE(mmu, rw_mm_cfg, seg_1, page) \
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| REG_STATE(mmu, rw_mm_cfg, seg_0, linear), $r2
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#else
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move.d REG_STATE(mmu, rw_mm_cfg, we, on) \
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| REG_STATE(mmu, rw_mm_cfg, acc, on) \
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| REG_STATE(mmu, rw_mm_cfg, ex, on) \
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| REG_STATE(mmu, rw_mm_cfg, inv, on) \
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| REG_STATE(mmu, rw_mm_cfg, seg_f, linear) \
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| REG_STATE(mmu, rw_mm_cfg, seg_e, linear) \
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| REG_STATE(mmu, rw_mm_cfg, seg_d, page) \
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| REG_STATE(mmu, rw_mm_cfg, seg_c, linear) \
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| REG_STATE(mmu, rw_mm_cfg, seg_b, linear) \
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| REG_STATE(mmu, rw_mm_cfg, seg_a, page) \
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| REG_STATE(mmu, rw_mm_cfg, seg_9, page) \
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| REG_STATE(mmu, rw_mm_cfg, seg_8, page) \
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| REG_STATE(mmu, rw_mm_cfg, seg_7, page) \
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| REG_STATE(mmu, rw_mm_cfg, seg_6, page) \
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| REG_STATE(mmu, rw_mm_cfg, seg_5, page) \
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| REG_STATE(mmu, rw_mm_cfg, seg_4, linear) \
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| REG_STATE(mmu, rw_mm_cfg, seg_3, page) \
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| REG_STATE(mmu, rw_mm_cfg, seg_2, page) \
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| REG_STATE(mmu, rw_mm_cfg, seg_1, page) \
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| REG_STATE(mmu, rw_mm_cfg, seg_0, linear), $r2
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#endif
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;; Update instruction MMU.
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move 1, $srs
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nop
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nop
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nop
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move $r0, $s2 ; kbase_hi.
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move $r1, $s1 ; kbase_lo.
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move $r2, $s0 ; mm_cfg, virtual memory configuration.
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;; Update data MMU.
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move 2, $srs
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nop
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nop
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nop
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move $r0, $s2 ; kbase_hi.
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move $r1, $s1 ; kbase_lo
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move $r2, $s0 ; mm_cfg, virtual memory configuration.
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;; Enable data and instruction MMU.
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move 0, $srs
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moveq 0xf, $r0 ; IMMU, DMMU, DCache, Icache on
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nop
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nop
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nop
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move $r0, $s0
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nop
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nop
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nop
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; Check if starting from DRAM (network->RAM boot or unpacked
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; compressed kernel), or directly from flash.
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lapcq ., $r0
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and.d 0x7fffffff, $r0 ; Mask off the non-cache bit.
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cmp.d 0x10000, $r0 ; Arbitrary, something above this code.
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blo _inflash0
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nop
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jump _inram ; Jump to cached RAM.
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nop
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;; Jumpgate.
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_inflash0:
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jump _inflash
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nop
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;; Put the following in a section so that storage for it can be
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;; reclaimed after init is finished.
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__INIT
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_inflash:
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;; Initialize DRAM.
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cmp.d RAM_INIT_MAGIC, $r8 ; Already initialized?
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beq _dram_initialized
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nop
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#if defined CONFIG_ETRAXFS
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#include "../mach-fs/dram_init.S"
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#elif defined CONFIG_CRIS_MACH_ARTPEC3
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#include "../mach-a3/dram_init.S"
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#else
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#error Only ETRAXFS and ARTPEC-3 supported!
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#endif
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_dram_initialized:
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;; Copy the text and data section to DRAM. This depends on that the
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;; variables used below are correctly set up by the linker script.
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;; The calculated value stored in R4 is used below.
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;; Leave the cramfs file system (piggybacked after the kernel) in flash.
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moveq 0, $r0 ; Source.
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move.d text_start, $r1 ; Destination.
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move.d __vmlinux_end, $r2
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move.d $r2, $r4
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sub.d $r1, $r4
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1: move.w [$r0+], $r3
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move.w $r3, [$r1+]
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cmp.d $r2, $r1
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blo 1b
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nop
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;; Check for cramfs.
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moveq 0, $r0
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move.d romfs_length, $r1
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move.d $r0, [$r1]
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move.d [$r4], $r0 ; cramfs_super.magic
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cmp.d CRAMFS_MAGIC, $r0
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bne 1f
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nop
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;; Set length and start of cramfs, set romfs_in_flash flag
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addoq +4, $r4, $acr
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move.d [$acr], $r0
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move.d romfs_length, $r1
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move.d $r0, [$r1]
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add.d 0xf0000000, $r4 ; Add cached flash start in virtual memory.
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move.d romfs_start, $r1
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move.d $r4, [$r1]
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1: moveq 1, $r0
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move.d romfs_in_flash, $r1
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move.d $r0, [$r1]
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jump _start_it ; Jump to cached code.
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nop
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_inram:
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;; Check if booting from NAND flash; if so, set appropriate flags
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;; and move on.
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cmp.d NAND_BOOT_MAGIC, $r12
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bne move_cramfs ; not nand, jump
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moveq 1, $r0
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move.d nand_boot, $r1 ; tell axisflashmap we're booting from NAND
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move.d $r0, [$r1]
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moveq 0, $r0 ; tell axisflashmap romfs is not in
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move.d romfs_in_flash, $r1 ; (directly accessed) flash
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move.d $r0, [$r1]
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jump _start_it ; continue with boot
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nop
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move_cramfs:
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;; kernel is in DRAM.
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;; Must figure out if there is a piggybacked rootfs image or not.
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;; Set romfs_length to 0 => no rootfs image available by default.
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moveq 0, $r0
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move.d romfs_length, $r1
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move.d $r0, [$r1]
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;; The kernel could have been unpacked to DRAM by the loader, but
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;; the cramfs image could still be in the flash immediately
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;; following the compressed kernel image. The loader passes the address
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;; of the byte succeeding the last compressed byte in the flash in
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;; register R9 when starting the kernel.
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cmp.d 0x0ffffff8, $r9
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bhs _no_romfs_in_flash ; R9 points outside the flash area.
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nop
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;; cramfs rootfs might to be in flash. Check for it.
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move.d [$r9], $r0 ; cramfs_super.magic
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cmp.d CRAMFS_MAGIC, $r0
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bne _no_romfs_in_flash
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nop
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;; found cramfs in flash. set address and size, and romfs_in_flash flag.
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addoq +4, $r9, $acr
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move.d [$acr], $r0
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move.d romfs_length, $r1
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move.d $r0, [$r1]
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add.d 0xf0000000, $r9 ; Add cached flash start in virtual memory.
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move.d romfs_start, $r1
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move.d $r9, [$r1]
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moveq 1, $r0
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move.d romfs_in_flash, $r1
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move.d $r0, [$r1]
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jump _start_it ; Jump to cached code.
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nop
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_no_romfs_in_flash:
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;; No romfs in flash, so look for cramfs, or jffs2 with jhead,
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;; after kernel in RAM, as is the case with network->RAM boot.
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;; For cramfs, partition starts with magic and length.
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;; For jffs2, a jhead is prepended which contains with magic and length.
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;; The jhead is not part of the jffs2 partition however.
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move.d __bss_start, $r0
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move.d [$r0], $r1
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cmp.d CRAMFS_MAGIC, $r1 ; cramfs magic?
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beq 2f ; yes, jump
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nop
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cmp.d JHEAD_MAGIC, $r1 ; jffs2 (jhead) magic?
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bne 4f ; no, skip copy
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nop
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addq 4, $r0 ; location of jffs2 size
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move.d [$r0+], $r2 ; fetch jffs2 size -> r2
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; r0 now points to start of jffs2
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ba 3f
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nop
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2:
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addoq +4, $r0, $acr ; location of cramfs size
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move.d [$acr], $r2 ; fetch cramfs size -> r2
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; r0 still points to start of cramfs
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3:
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;; Now, move the root fs to after kernel's BSS
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move.d _end, $r1 ; start of cramfs -> r1
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move.d romfs_start, $r3
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move.d $r1, [$r3] ; store at romfs_start (for axisflashmap)
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move.d romfs_length, $r3
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move.d $r2, [$r3] ; store size at romfs_length
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add.d $r2, $r0 ; copy from end and downwards
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add.d $r2, $r1
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lsrq 1, $r2 ; Size is in bytes, we copy words.
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addq 1, $r2
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1:
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move.w [$r0], $r3
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move.w $r3, [$r1]
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subq 2, $r0
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subq 2, $r1
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subq 1, $r2
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bne 1b
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nop
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4:
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;; BSS move done.
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;; Clear romfs_in_flash flag, as we now know romfs is in DRAM
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;; Also clear nand_boot flag; if we got here, we know we've not
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;; booted from NAND flash.
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moveq 0, $r0
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move.d romfs_in_flash, $r1
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move.d $r0, [$r1]
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moveq 0, $r0
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move.d nand_boot, $r1
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move.d $r0, [$r1]
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jump _start_it ; Jump to cached code.
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nop
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_start_it:
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;; Check if kernel command line is supplied
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cmp.d COMMAND_LINE_MAGIC, $r10
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bne no_command_line
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nop
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move.d 256, $r13
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move.d cris_command_line, $r10
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or.d 0x80000000, $r11 ; Make it virtual
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1:
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move.b [$r11+], $r1
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move.b $r1, [$r10+]
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subq 1, $r13
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bne 1b
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nop
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no_command_line:
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;; The kernel stack contains a task structure for each task. This
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;; the initial kernel stack is in the same page as the init_task,
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;; but starts at the top of the page, i.e. + 8192 bytes.
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move.d init_thread_union + 8192, $sp
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move.d ebp_start, $r0 ; Defined in linker-script.
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move $r0, $ebp
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move.d etrax_irv, $r1 ; Set the exception base register and pointer.
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move.d $r0, [$r1]
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;; Clear the BSS region from _bss_start to _end.
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move.d __bss_start, $r0
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move.d _end, $r1
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1: clear.d [$r0+]
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cmp.d $r1, $r0
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blo 1b
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nop
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; Initialize registers to increase determinism
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move.d __bss_start, $r0
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movem [$r0], $r13
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#ifdef CONFIG_ETRAX_L2CACHE
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jsr l2cache_init
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nop
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#endif
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jump start_kernel ; Jump to start_kernel() in init/main.c.
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nop
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.data
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etrax_irv:
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.dword 0
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; Variables for communication with the Axis flash map driver (axisflashmap),
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; and for setting up memory in arch/cris/kernel/setup.c .
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; romfs_start is set to the start of the root file system, if it exists
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; in directly accessible memory (i.e. NOR Flash when booting from Flash,
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; or RAM when booting directly from a network-downloaded RAM image)
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romfs_start:
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.dword 0
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; romfs_length is set to the size of the root file system image, if it exists
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; in directly accessible memory (see romfs_start). Otherwise it is set to 0.
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romfs_length:
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.dword 0
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; romfs_in_flash is set to 1 if the root file system resides in directly
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; accessible flash memory (i.e. NOR flash). It is set to 0 for RAM boot
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; or NAND flash boot.
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romfs_in_flash:
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.dword 0
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; nand_boot is set to 1 when the kernel has been booted from NAND flash
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nand_boot:
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.dword 0
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swapper_pg_dir = 0xc0002000
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.section ".init.data", "aw"
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#if defined CONFIG_ETRAXFS
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#include "../mach-fs/hw_settings.S"
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#elif defined CONFIG_CRIS_MACH_ARTPEC3
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#include "../mach-a3/hw_settings.S"
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#else
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#error Only ETRAXFS and ARTPEC-3 supported!
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#endif
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