ebe021e268
Since the Armada XP Matrix board has 4 GB of RAM and not 2 GB, we update the Device Tree to take into account the correct amount of memory. As noted in the new comment, the last 256 MB of RAM are in fact not usable, due to the overlap with the MBus Window address range. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
81 lines
1.5 KiB
Plaintext
81 lines
1.5 KiB
Plaintext
/*
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* Device Tree file for Marvell Armada XP Matrix board
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*
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* Copyright (C) 2013 Marvell
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*
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* Lior Amsalem <alior@marvell.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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/dts-v1/;
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#include "armada-xp-mv78460.dtsi"
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/ {
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model = "Marvell Armada XP Matrix Board";
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compatible = "marvell,axp-matrix", "marvell,armadaxp-mv78460", "marvell,armadaxp", "marvell,armada-370-xp";
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chosen {
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bootargs = "console=ttyS0,115200 earlyprintk";
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};
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memory {
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device_type = "memory";
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/*
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* This board has 4 GB of RAM, but the last 256 MB of
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* RAM are not usable due to the overlap with the MBus
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* Window address range
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*/
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reg = <0 0x00000000 0 0xf0000000>;
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};
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soc {
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ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
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MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000>;
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internal-regs {
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serial@12000 {
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clock-frequency = <250000000>;
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status = "okay";
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};
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serial@12100 {
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clock-frequency = <250000000>;
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status = "okay";
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};
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serial@12200 {
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clock-frequency = <250000000>;
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status = "okay";
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};
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serial@12300 {
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clock-frequency = <250000000>;
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status = "okay";
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};
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sata@a0000 {
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nr-ports = <2>;
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status = "okay";
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};
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ethernet@30000 {
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status = "okay";
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phy-mode = "sgmii";
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};
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pcie-controller {
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status = "okay";
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pcie@1,0 {
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/* Port 0, Lane 0 */
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status = "okay";
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};
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};
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usb@50000 {
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status = "okay";
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};
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};
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};
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};
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