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This is a collection of header file cleanups, mostly for OMAP and AT91, that keeps moving the platforms in the direction of multiplatform by removing the need for mach-dependent header files used in drivers and other places. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJQx2reAAoJEIwa5zzehBx3Z/oQAIHp8aXbUD0GvbBPQ2vIydZ8 Qfdh2ypbyFB9GSLmPP6BhurEFUcwmW3MH2r9Kq68omPt4XxrFEt1SdEn3TgZlhTY YYzEv2DLbWfmKCDBFAEFullsfVkrpggyou5ty30YVp/u2lVLvChpkciE5/9HADy5 uoh/W2KZcLE51tvnbRy/1DBaOtxEdCjJ9hTaef7FCB9ugOG+yMDYwIPRW/b4fNA6 o/1NuZTWp0H4ePRG2oqLxYnjSiF63DVTJZjSJ+c5gW34bWgh8+/xzaLFA9U++/ig meGUD1Oe65+ctr+Wk2mV29eb02jauUe6qvkwt+iFIDDopgc2mn5BcW+ENpgpjhe3 6l3ClRd94qh4cMWzqDa5PZCdetshiKqSH2IGpKS/dHNB1h5sBP7CCbvbalwzWd5n qjfkPC7kSFyU3XV+9SEAXE6HLKsiMQy9kRcKOMdTE5BA4FEAZk0wfiG9WcVCvS2D 9tDC3X0aScyXx4Mkd4wIAZVhY68QuI17fPft9zZSj691YiUW5cR2yF1qbCka0yd5 pHu/QSZg1+dUitMUvMPQmWJ15jnAtEYUtV/8zQFFVchgkxlrW+UtvW3zxghB6D+J ZwcjAMfQQz9fLoMQXlVovjQIhYsjw3SlV62ReBH7eyPs3+KfPIBn7Ks6mVQs3dS5 AMUWORsB5u92XHl9EL9C =aggA -----END PGP SIGNATURE----- Merge tag 'headers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC Header cleanups from Olof Johansson: "This is a collection of header file cleanups, mostly for OMAP and AT91, that keeps moving the platforms in the direction of multiplatform by removing the need for mach-dependent header files used in drivers and other places." Fix up mostly trivial conflicts as per Olof. * tag 'headers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (106 commits) ARM: OMAP2+: Move iommu/iovmm headers to platform_data ARM: OMAP2+: Make some definitions local ARM: OMAP2+: Move iommu2 to drivers/iommu/omap-iommu2.c ARM: OMAP2+: Move plat/iovmm.h to include/linux/omap-iommu.h ARM: OMAP2+: Move iopgtable header to drivers/iommu/ ARM: OMAP: Merge iommu2.h into iommu.h atmel: move ATMEL_MAX_UART to platform_data/atmel.h ARM: OMAP: Remove omap_init_consistent_dma_size() arm: at91: move at91rm9200 rtc header in drivers/rtc arm: at91: move reset controller header to arm/arm/mach-at91 arm: at91: move pit define to the driver arm: at91: move at91_shdwc.h to arch/arm/mach-at91 arm: at91: move board header to arch/arm/mach-at91 arn: at91: move at91_tc.h to arch/arm/mach-at91 arm: at91 move at91_aic.h to arch/arm/mach-at91 arm: at91 move board.h to arch/arm/mach-at91 arm: at91: move platfarm_data to include/linux/platform_data/atmel.h arm: at91: drop machine defconfig ARM: OMAP: Remove NEED_MACH_GPIO_H ARM: OMAP: Remove unnecessary mach and plat includes ...
1906 lines
47 KiB
C
1906 lines
47 KiB
C
/*
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* Driver for Atmel AT91 / AT32 Serial ports
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* Copyright (C) 2003 Rick Bronson
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*
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* Based on drivers/char/serial_sa1100.c, by Deep Blue Solutions Ltd.
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* Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
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*
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* DMA support added by Chip Coldwell.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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*/
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#include <linux/module.h>
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#include <linux/tty.h>
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#include <linux/ioport.h>
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#include <linux/slab.h>
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#include <linux/init.h>
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#include <linux/serial.h>
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#include <linux/clk.h>
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#include <linux/console.h>
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#include <linux/sysrq.h>
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#include <linux/tty_flip.h>
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#include <linux/platform_device.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/dma-mapping.h>
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#include <linux/atmel_pdc.h>
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#include <linux/atmel_serial.h>
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#include <linux/uaccess.h>
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#include <linux/pinctrl/consumer.h>
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#include <linux/platform_data/atmel.h>
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#include <asm/io.h>
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#include <asm/ioctls.h>
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#ifdef CONFIG_ARM
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#include <mach/cpu.h>
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#include <asm/gpio.h>
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#endif
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#define PDC_BUFFER_SIZE 512
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/* Revisit: We should calculate this based on the actual port settings */
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#define PDC_RX_TIMEOUT (3 * 10) /* 3 bytes */
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#if defined(CONFIG_SERIAL_ATMEL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
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#define SUPPORT_SYSRQ
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#endif
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#include <linux/serial_core.h>
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static void atmel_start_rx(struct uart_port *port);
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static void atmel_stop_rx(struct uart_port *port);
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#ifdef CONFIG_SERIAL_ATMEL_TTYAT
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/* Use device name ttyAT, major 204 and minor 154-169. This is necessary if we
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* should coexist with the 8250 driver, such as if we have an external 16C550
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* UART. */
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#define SERIAL_ATMEL_MAJOR 204
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#define MINOR_START 154
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#define ATMEL_DEVICENAME "ttyAT"
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#else
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/* Use device name ttyS, major 4, minor 64-68. This is the usual serial port
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* name, but it is legally reserved for the 8250 driver. */
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#define SERIAL_ATMEL_MAJOR TTY_MAJOR
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#define MINOR_START 64
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#define ATMEL_DEVICENAME "ttyS"
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#endif
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#define ATMEL_ISR_PASS_LIMIT 256
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/* UART registers. CR is write-only, hence no GET macro */
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#define UART_PUT_CR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_CR)
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#define UART_GET_MR(port) __raw_readl((port)->membase + ATMEL_US_MR)
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#define UART_PUT_MR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_MR)
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#define UART_PUT_IER(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IER)
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#define UART_PUT_IDR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IDR)
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#define UART_GET_IMR(port) __raw_readl((port)->membase + ATMEL_US_IMR)
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#define UART_GET_CSR(port) __raw_readl((port)->membase + ATMEL_US_CSR)
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#define UART_GET_CHAR(port) __raw_readl((port)->membase + ATMEL_US_RHR)
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#define UART_PUT_CHAR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_THR)
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#define UART_GET_BRGR(port) __raw_readl((port)->membase + ATMEL_US_BRGR)
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#define UART_PUT_BRGR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_BRGR)
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#define UART_PUT_RTOR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_RTOR)
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#define UART_PUT_TTGR(port, v) __raw_writel(v, (port)->membase + ATMEL_US_TTGR)
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/* PDC registers */
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#define UART_PUT_PTCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_PTCR)
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#define UART_GET_PTSR(port) __raw_readl((port)->membase + ATMEL_PDC_PTSR)
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#define UART_PUT_RPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RPR)
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#define UART_GET_RPR(port) __raw_readl((port)->membase + ATMEL_PDC_RPR)
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#define UART_PUT_RCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RCR)
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#define UART_PUT_RNPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNPR)
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#define UART_PUT_RNCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNCR)
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#define UART_PUT_TPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TPR)
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#define UART_PUT_TCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TCR)
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#define UART_GET_TCR(port) __raw_readl((port)->membase + ATMEL_PDC_TCR)
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static int (*atmel_open_hook)(struct uart_port *);
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static void (*atmel_close_hook)(struct uart_port *);
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struct atmel_dma_buffer {
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unsigned char *buf;
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dma_addr_t dma_addr;
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unsigned int dma_size;
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unsigned int ofs;
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};
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struct atmel_uart_char {
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u16 status;
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u16 ch;
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};
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#define ATMEL_SERIAL_RINGSIZE 1024
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/*
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* We wrap our port structure around the generic uart_port.
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*/
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struct atmel_uart_port {
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struct uart_port uart; /* uart */
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struct clk *clk; /* uart clock */
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int may_wakeup; /* cached value of device_may_wakeup for times we need to disable it */
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u32 backup_imr; /* IMR saved during suspend */
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int break_active; /* break being received */
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short use_dma_rx; /* enable PDC receiver */
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short pdc_rx_idx; /* current PDC RX buffer */
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struct atmel_dma_buffer pdc_rx[2]; /* PDC receier */
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short use_dma_tx; /* enable PDC transmitter */
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struct atmel_dma_buffer pdc_tx; /* PDC transmitter */
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struct tasklet_struct tasklet;
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unsigned int irq_status;
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unsigned int irq_status_prev;
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struct circ_buf rx_ring;
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struct serial_rs485 rs485; /* rs485 settings */
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unsigned int tx_done_mask;
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};
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static struct atmel_uart_port atmel_ports[ATMEL_MAX_UART];
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static unsigned long atmel_ports_in_use;
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#ifdef SUPPORT_SYSRQ
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static struct console atmel_console;
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#endif
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#if defined(CONFIG_OF)
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static const struct of_device_id atmel_serial_dt_ids[] = {
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{ .compatible = "atmel,at91rm9200-usart" },
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{ .compatible = "atmel,at91sam9260-usart" },
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, atmel_serial_dt_ids);
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#endif
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static inline struct atmel_uart_port *
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to_atmel_uart_port(struct uart_port *uart)
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{
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return container_of(uart, struct atmel_uart_port, uart);
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}
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#ifdef CONFIG_SERIAL_ATMEL_PDC
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static bool atmel_use_dma_rx(struct uart_port *port)
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{
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struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
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return atmel_port->use_dma_rx;
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}
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static bool atmel_use_dma_tx(struct uart_port *port)
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{
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struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
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return atmel_port->use_dma_tx;
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}
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#else
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static bool atmel_use_dma_rx(struct uart_port *port)
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{
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return false;
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}
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static bool atmel_use_dma_tx(struct uart_port *port)
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{
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return false;
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}
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#endif
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/* Enable or disable the rs485 support */
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void atmel_config_rs485(struct uart_port *port, struct serial_rs485 *rs485conf)
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{
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struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
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unsigned int mode;
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unsigned long flags;
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spin_lock_irqsave(&port->lock, flags);
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/* Disable interrupts */
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UART_PUT_IDR(port, atmel_port->tx_done_mask);
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mode = UART_GET_MR(port);
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/* Resetting serial mode to RS232 (0x0) */
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mode &= ~ATMEL_US_USMODE;
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atmel_port->rs485 = *rs485conf;
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if (rs485conf->flags & SER_RS485_ENABLED) {
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dev_dbg(port->dev, "Setting UART to RS485\n");
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atmel_port->tx_done_mask = ATMEL_US_TXEMPTY;
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if ((rs485conf->delay_rts_after_send) > 0)
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UART_PUT_TTGR(port, rs485conf->delay_rts_after_send);
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mode |= ATMEL_US_USMODE_RS485;
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} else {
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dev_dbg(port->dev, "Setting UART to RS232\n");
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if (atmel_use_dma_tx(port))
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atmel_port->tx_done_mask = ATMEL_US_ENDTX |
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ATMEL_US_TXBUFE;
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else
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atmel_port->tx_done_mask = ATMEL_US_TXRDY;
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}
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UART_PUT_MR(port, mode);
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/* Enable interrupts */
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UART_PUT_IER(port, atmel_port->tx_done_mask);
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spin_unlock_irqrestore(&port->lock, flags);
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}
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/*
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* Return TIOCSER_TEMT when transmitter FIFO and Shift register is empty.
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*/
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static u_int atmel_tx_empty(struct uart_port *port)
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{
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return (UART_GET_CSR(port) & ATMEL_US_TXEMPTY) ? TIOCSER_TEMT : 0;
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}
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/*
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* Set state of the modem control output lines
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*/
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static void atmel_set_mctrl(struct uart_port *port, u_int mctrl)
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{
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unsigned int control = 0;
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unsigned int mode;
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struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
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#ifdef CONFIG_ARCH_AT91RM9200
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if (cpu_is_at91rm9200()) {
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/*
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* AT91RM9200 Errata #39: RTS0 is not internally connected
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* to PA21. We need to drive the pin manually.
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*/
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if (port->mapbase == AT91RM9200_BASE_US0) {
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if (mctrl & TIOCM_RTS)
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at91_set_gpio_value(AT91_PIN_PA21, 0);
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else
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at91_set_gpio_value(AT91_PIN_PA21, 1);
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}
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}
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#endif
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if (mctrl & TIOCM_RTS)
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control |= ATMEL_US_RTSEN;
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else
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control |= ATMEL_US_RTSDIS;
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if (mctrl & TIOCM_DTR)
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control |= ATMEL_US_DTREN;
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else
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control |= ATMEL_US_DTRDIS;
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UART_PUT_CR(port, control);
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/* Local loopback mode? */
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mode = UART_GET_MR(port) & ~ATMEL_US_CHMODE;
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if (mctrl & TIOCM_LOOP)
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mode |= ATMEL_US_CHMODE_LOC_LOOP;
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else
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mode |= ATMEL_US_CHMODE_NORMAL;
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/* Resetting serial mode to RS232 (0x0) */
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mode &= ~ATMEL_US_USMODE;
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if (atmel_port->rs485.flags & SER_RS485_ENABLED) {
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dev_dbg(port->dev, "Setting UART to RS485\n");
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if ((atmel_port->rs485.delay_rts_after_send) > 0)
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UART_PUT_TTGR(port,
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atmel_port->rs485.delay_rts_after_send);
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mode |= ATMEL_US_USMODE_RS485;
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} else {
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dev_dbg(port->dev, "Setting UART to RS232\n");
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}
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UART_PUT_MR(port, mode);
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}
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/*
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* Get state of the modem control input lines
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*/
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static u_int atmel_get_mctrl(struct uart_port *port)
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{
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unsigned int status, ret = 0;
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status = UART_GET_CSR(port);
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/*
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* The control signals are active low.
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*/
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if (!(status & ATMEL_US_DCD))
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ret |= TIOCM_CD;
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if (!(status & ATMEL_US_CTS))
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ret |= TIOCM_CTS;
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if (!(status & ATMEL_US_DSR))
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ret |= TIOCM_DSR;
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if (!(status & ATMEL_US_RI))
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ret |= TIOCM_RI;
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return ret;
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}
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/*
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* Stop transmitting.
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*/
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static void atmel_stop_tx(struct uart_port *port)
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{
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struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
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if (atmel_use_dma_tx(port)) {
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/* disable PDC transmit */
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UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
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}
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/* Disable interrupts */
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UART_PUT_IDR(port, atmel_port->tx_done_mask);
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if ((atmel_port->rs485.flags & SER_RS485_ENABLED) &&
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!(atmel_port->rs485.flags & SER_RS485_RX_DURING_TX))
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atmel_start_rx(port);
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}
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/*
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* Start transmitting.
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*/
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static void atmel_start_tx(struct uart_port *port)
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{
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struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
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if (atmel_use_dma_tx(port)) {
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if (UART_GET_PTSR(port) & ATMEL_PDC_TXTEN)
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/* The transmitter is already running. Yes, we
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really need this.*/
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return;
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if ((atmel_port->rs485.flags & SER_RS485_ENABLED) &&
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!(atmel_port->rs485.flags & SER_RS485_RX_DURING_TX))
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atmel_stop_rx(port);
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/* re-enable PDC transmit */
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UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
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}
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/* Enable interrupts */
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UART_PUT_IER(port, atmel_port->tx_done_mask);
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}
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/*
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* start receiving - port is in process of being opened.
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*/
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static void atmel_start_rx(struct uart_port *port)
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{
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UART_PUT_CR(port, ATMEL_US_RSTSTA); /* reset status and receiver */
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UART_PUT_CR(port, ATMEL_US_RXEN);
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if (atmel_use_dma_rx(port)) {
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/* enable PDC controller */
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UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT |
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port->read_status_mask);
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UART_PUT_PTCR(port, ATMEL_PDC_RXTEN);
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} else {
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UART_PUT_IER(port, ATMEL_US_RXRDY);
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}
|
|
}
|
|
|
|
/*
|
|
* Stop receiving - port is in process of being closed.
|
|
*/
|
|
static void atmel_stop_rx(struct uart_port *port)
|
|
{
|
|
UART_PUT_CR(port, ATMEL_US_RXDIS);
|
|
|
|
if (atmel_use_dma_rx(port)) {
|
|
/* disable PDC receive */
|
|
UART_PUT_PTCR(port, ATMEL_PDC_RXTDIS);
|
|
UART_PUT_IDR(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT |
|
|
port->read_status_mask);
|
|
} else {
|
|
UART_PUT_IDR(port, ATMEL_US_RXRDY);
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Enable modem status interrupts
|
|
*/
|
|
static void atmel_enable_ms(struct uart_port *port)
|
|
{
|
|
UART_PUT_IER(port, ATMEL_US_RIIC | ATMEL_US_DSRIC
|
|
| ATMEL_US_DCDIC | ATMEL_US_CTSIC);
|
|
}
|
|
|
|
/*
|
|
* Control the transmission of a break signal
|
|
*/
|
|
static void atmel_break_ctl(struct uart_port *port, int break_state)
|
|
{
|
|
if (break_state != 0)
|
|
UART_PUT_CR(port, ATMEL_US_STTBRK); /* start break */
|
|
else
|
|
UART_PUT_CR(port, ATMEL_US_STPBRK); /* stop break */
|
|
}
|
|
|
|
/*
|
|
* Stores the incoming character in the ring buffer
|
|
*/
|
|
static void
|
|
atmel_buffer_rx_char(struct uart_port *port, unsigned int status,
|
|
unsigned int ch)
|
|
{
|
|
struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
|
|
struct circ_buf *ring = &atmel_port->rx_ring;
|
|
struct atmel_uart_char *c;
|
|
|
|
if (!CIRC_SPACE(ring->head, ring->tail, ATMEL_SERIAL_RINGSIZE))
|
|
/* Buffer overflow, ignore char */
|
|
return;
|
|
|
|
c = &((struct atmel_uart_char *)ring->buf)[ring->head];
|
|
c->status = status;
|
|
c->ch = ch;
|
|
|
|
/* Make sure the character is stored before we update head. */
|
|
smp_wmb();
|
|
|
|
ring->head = (ring->head + 1) & (ATMEL_SERIAL_RINGSIZE - 1);
|
|
}
|
|
|
|
/*
|
|
* Deal with parity, framing and overrun errors.
|
|
*/
|
|
static void atmel_pdc_rxerr(struct uart_port *port, unsigned int status)
|
|
{
|
|
/* clear error */
|
|
UART_PUT_CR(port, ATMEL_US_RSTSTA);
|
|
|
|
if (status & ATMEL_US_RXBRK) {
|
|
/* ignore side-effect */
|
|
status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);
|
|
port->icount.brk++;
|
|
}
|
|
if (status & ATMEL_US_PARE)
|
|
port->icount.parity++;
|
|
if (status & ATMEL_US_FRAME)
|
|
port->icount.frame++;
|
|
if (status & ATMEL_US_OVRE)
|
|
port->icount.overrun++;
|
|
}
|
|
|
|
/*
|
|
* Characters received (called from interrupt handler)
|
|
*/
|
|
static void atmel_rx_chars(struct uart_port *port)
|
|
{
|
|
struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
|
|
unsigned int status, ch;
|
|
|
|
status = UART_GET_CSR(port);
|
|
while (status & ATMEL_US_RXRDY) {
|
|
ch = UART_GET_CHAR(port);
|
|
|
|
/*
|
|
* note that the error handling code is
|
|
* out of the main execution path
|
|
*/
|
|
if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
|
|
| ATMEL_US_OVRE | ATMEL_US_RXBRK)
|
|
|| atmel_port->break_active)) {
|
|
|
|
/* clear error */
|
|
UART_PUT_CR(port, ATMEL_US_RSTSTA);
|
|
|
|
if (status & ATMEL_US_RXBRK
|
|
&& !atmel_port->break_active) {
|
|
atmel_port->break_active = 1;
|
|
UART_PUT_IER(port, ATMEL_US_RXBRK);
|
|
} else {
|
|
/*
|
|
* This is either the end-of-break
|
|
* condition or we've received at
|
|
* least one character without RXBRK
|
|
* being set. In both cases, the next
|
|
* RXBRK will indicate start-of-break.
|
|
*/
|
|
UART_PUT_IDR(port, ATMEL_US_RXBRK);
|
|
status &= ~ATMEL_US_RXBRK;
|
|
atmel_port->break_active = 0;
|
|
}
|
|
}
|
|
|
|
atmel_buffer_rx_char(port, status, ch);
|
|
status = UART_GET_CSR(port);
|
|
}
|
|
|
|
tasklet_schedule(&atmel_port->tasklet);
|
|
}
|
|
|
|
/*
|
|
* Transmit characters (called from tasklet with TXRDY interrupt
|
|
* disabled)
|
|
*/
|
|
static void atmel_tx_chars(struct uart_port *port)
|
|
{
|
|
struct circ_buf *xmit = &port->state->xmit;
|
|
struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
|
|
|
|
if (port->x_char && UART_GET_CSR(port) & atmel_port->tx_done_mask) {
|
|
UART_PUT_CHAR(port, port->x_char);
|
|
port->icount.tx++;
|
|
port->x_char = 0;
|
|
}
|
|
if (uart_circ_empty(xmit) || uart_tx_stopped(port))
|
|
return;
|
|
|
|
while (UART_GET_CSR(port) & atmel_port->tx_done_mask) {
|
|
UART_PUT_CHAR(port, xmit->buf[xmit->tail]);
|
|
xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
|
|
port->icount.tx++;
|
|
if (uart_circ_empty(xmit))
|
|
break;
|
|
}
|
|
|
|
if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
|
|
uart_write_wakeup(port);
|
|
|
|
if (!uart_circ_empty(xmit))
|
|
/* Enable interrupts */
|
|
UART_PUT_IER(port, atmel_port->tx_done_mask);
|
|
}
|
|
|
|
/*
|
|
* receive interrupt handler.
|
|
*/
|
|
static void
|
|
atmel_handle_receive(struct uart_port *port, unsigned int pending)
|
|
{
|
|
struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
|
|
|
|
if (atmel_use_dma_rx(port)) {
|
|
/*
|
|
* PDC receive. Just schedule the tasklet and let it
|
|
* figure out the details.
|
|
*
|
|
* TODO: We're not handling error flags correctly at
|
|
* the moment.
|
|
*/
|
|
if (pending & (ATMEL_US_ENDRX | ATMEL_US_TIMEOUT)) {
|
|
UART_PUT_IDR(port, (ATMEL_US_ENDRX
|
|
| ATMEL_US_TIMEOUT));
|
|
tasklet_schedule(&atmel_port->tasklet);
|
|
}
|
|
|
|
if (pending & (ATMEL_US_RXBRK | ATMEL_US_OVRE |
|
|
ATMEL_US_FRAME | ATMEL_US_PARE))
|
|
atmel_pdc_rxerr(port, pending);
|
|
}
|
|
|
|
/* Interrupt receive */
|
|
if (pending & ATMEL_US_RXRDY)
|
|
atmel_rx_chars(port);
|
|
else if (pending & ATMEL_US_RXBRK) {
|
|
/*
|
|
* End of break detected. If it came along with a
|
|
* character, atmel_rx_chars will handle it.
|
|
*/
|
|
UART_PUT_CR(port, ATMEL_US_RSTSTA);
|
|
UART_PUT_IDR(port, ATMEL_US_RXBRK);
|
|
atmel_port->break_active = 0;
|
|
}
|
|
}
|
|
|
|
/*
|
|
* transmit interrupt handler. (Transmit is IRQF_NODELAY safe)
|
|
*/
|
|
static void
|
|
atmel_handle_transmit(struct uart_port *port, unsigned int pending)
|
|
{
|
|
struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
|
|
|
|
if (pending & atmel_port->tx_done_mask) {
|
|
/* Either PDC or interrupt transmission */
|
|
UART_PUT_IDR(port, atmel_port->tx_done_mask);
|
|
tasklet_schedule(&atmel_port->tasklet);
|
|
}
|
|
}
|
|
|
|
/*
|
|
* status flags interrupt handler.
|
|
*/
|
|
static void
|
|
atmel_handle_status(struct uart_port *port, unsigned int pending,
|
|
unsigned int status)
|
|
{
|
|
struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
|
|
|
|
if (pending & (ATMEL_US_RIIC | ATMEL_US_DSRIC | ATMEL_US_DCDIC
|
|
| ATMEL_US_CTSIC)) {
|
|
atmel_port->irq_status = status;
|
|
tasklet_schedule(&atmel_port->tasklet);
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Interrupt handler
|
|
*/
|
|
static irqreturn_t atmel_interrupt(int irq, void *dev_id)
|
|
{
|
|
struct uart_port *port = dev_id;
|
|
unsigned int status, pending, pass_counter = 0;
|
|
|
|
do {
|
|
status = UART_GET_CSR(port);
|
|
pending = status & UART_GET_IMR(port);
|
|
if (!pending)
|
|
break;
|
|
|
|
atmel_handle_receive(port, pending);
|
|
atmel_handle_status(port, pending, status);
|
|
atmel_handle_transmit(port, pending);
|
|
} while (pass_counter++ < ATMEL_ISR_PASS_LIMIT);
|
|
|
|
return pass_counter ? IRQ_HANDLED : IRQ_NONE;
|
|
}
|
|
|
|
/*
|
|
* Called from tasklet with ENDTX and TXBUFE interrupts disabled.
|
|
*/
|
|
static void atmel_tx_dma(struct uart_port *port)
|
|
{
|
|
struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
|
|
struct circ_buf *xmit = &port->state->xmit;
|
|
struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
|
|
int count;
|
|
|
|
/* nothing left to transmit? */
|
|
if (UART_GET_TCR(port))
|
|
return;
|
|
|
|
xmit->tail += pdc->ofs;
|
|
xmit->tail &= UART_XMIT_SIZE - 1;
|
|
|
|
port->icount.tx += pdc->ofs;
|
|
pdc->ofs = 0;
|
|
|
|
/* more to transmit - setup next transfer */
|
|
|
|
/* disable PDC transmit */
|
|
UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
|
|
|
|
if (!uart_circ_empty(xmit) && !uart_tx_stopped(port)) {
|
|
dma_sync_single_for_device(port->dev,
|
|
pdc->dma_addr,
|
|
pdc->dma_size,
|
|
DMA_TO_DEVICE);
|
|
|
|
count = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE);
|
|
pdc->ofs = count;
|
|
|
|
UART_PUT_TPR(port, pdc->dma_addr + xmit->tail);
|
|
UART_PUT_TCR(port, count);
|
|
/* re-enable PDC transmit */
|
|
UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
|
|
/* Enable interrupts */
|
|
UART_PUT_IER(port, atmel_port->tx_done_mask);
|
|
} else {
|
|
if ((atmel_port->rs485.flags & SER_RS485_ENABLED) &&
|
|
!(atmel_port->rs485.flags & SER_RS485_RX_DURING_TX)) {
|
|
/* DMA done, stop TX, start RX for RS485 */
|
|
atmel_start_rx(port);
|
|
}
|
|
}
|
|
|
|
if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
|
|
uart_write_wakeup(port);
|
|
}
|
|
|
|
static void atmel_rx_from_ring(struct uart_port *port)
|
|
{
|
|
struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
|
|
struct circ_buf *ring = &atmel_port->rx_ring;
|
|
unsigned int flg;
|
|
unsigned int status;
|
|
|
|
while (ring->head != ring->tail) {
|
|
struct atmel_uart_char c;
|
|
|
|
/* Make sure c is loaded after head. */
|
|
smp_rmb();
|
|
|
|
c = ((struct atmel_uart_char *)ring->buf)[ring->tail];
|
|
|
|
ring->tail = (ring->tail + 1) & (ATMEL_SERIAL_RINGSIZE - 1);
|
|
|
|
port->icount.rx++;
|
|
status = c.status;
|
|
flg = TTY_NORMAL;
|
|
|
|
/*
|
|
* note that the error handling code is
|
|
* out of the main execution path
|
|
*/
|
|
if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
|
|
| ATMEL_US_OVRE | ATMEL_US_RXBRK))) {
|
|
if (status & ATMEL_US_RXBRK) {
|
|
/* ignore side-effect */
|
|
status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);
|
|
|
|
port->icount.brk++;
|
|
if (uart_handle_break(port))
|
|
continue;
|
|
}
|
|
if (status & ATMEL_US_PARE)
|
|
port->icount.parity++;
|
|
if (status & ATMEL_US_FRAME)
|
|
port->icount.frame++;
|
|
if (status & ATMEL_US_OVRE)
|
|
port->icount.overrun++;
|
|
|
|
status &= port->read_status_mask;
|
|
|
|
if (status & ATMEL_US_RXBRK)
|
|
flg = TTY_BREAK;
|
|
else if (status & ATMEL_US_PARE)
|
|
flg = TTY_PARITY;
|
|
else if (status & ATMEL_US_FRAME)
|
|
flg = TTY_FRAME;
|
|
}
|
|
|
|
|
|
if (uart_handle_sysrq_char(port, c.ch))
|
|
continue;
|
|
|
|
uart_insert_char(port, status, ATMEL_US_OVRE, c.ch, flg);
|
|
}
|
|
|
|
/*
|
|
* Drop the lock here since it might end up calling
|
|
* uart_start(), which takes the lock.
|
|
*/
|
|
spin_unlock(&port->lock);
|
|
tty_flip_buffer_push(port->state->port.tty);
|
|
spin_lock(&port->lock);
|
|
}
|
|
|
|
static void atmel_rx_from_dma(struct uart_port *port)
|
|
{
|
|
struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
|
|
struct tty_struct *tty = port->state->port.tty;
|
|
struct atmel_dma_buffer *pdc;
|
|
int rx_idx = atmel_port->pdc_rx_idx;
|
|
unsigned int head;
|
|
unsigned int tail;
|
|
unsigned int count;
|
|
|
|
do {
|
|
/* Reset the UART timeout early so that we don't miss one */
|
|
UART_PUT_CR(port, ATMEL_US_STTTO);
|
|
|
|
pdc = &atmel_port->pdc_rx[rx_idx];
|
|
head = UART_GET_RPR(port) - pdc->dma_addr;
|
|
tail = pdc->ofs;
|
|
|
|
/* If the PDC has switched buffers, RPR won't contain
|
|
* any address within the current buffer. Since head
|
|
* is unsigned, we just need a one-way comparison to
|
|
* find out.
|
|
*
|
|
* In this case, we just need to consume the entire
|
|
* buffer and resubmit it for DMA. This will clear the
|
|
* ENDRX bit as well, so that we can safely re-enable
|
|
* all interrupts below.
|
|
*/
|
|
head = min(head, pdc->dma_size);
|
|
|
|
if (likely(head != tail)) {
|
|
dma_sync_single_for_cpu(port->dev, pdc->dma_addr,
|
|
pdc->dma_size, DMA_FROM_DEVICE);
|
|
|
|
/*
|
|
* head will only wrap around when we recycle
|
|
* the DMA buffer, and when that happens, we
|
|
* explicitly set tail to 0. So head will
|
|
* always be greater than tail.
|
|
*/
|
|
count = head - tail;
|
|
|
|
tty_insert_flip_string(tty, pdc->buf + pdc->ofs, count);
|
|
|
|
dma_sync_single_for_device(port->dev, pdc->dma_addr,
|
|
pdc->dma_size, DMA_FROM_DEVICE);
|
|
|
|
port->icount.rx += count;
|
|
pdc->ofs = head;
|
|
}
|
|
|
|
/*
|
|
* If the current buffer is full, we need to check if
|
|
* the next one contains any additional data.
|
|
*/
|
|
if (head >= pdc->dma_size) {
|
|
pdc->ofs = 0;
|
|
UART_PUT_RNPR(port, pdc->dma_addr);
|
|
UART_PUT_RNCR(port, pdc->dma_size);
|
|
|
|
rx_idx = !rx_idx;
|
|
atmel_port->pdc_rx_idx = rx_idx;
|
|
}
|
|
} while (head >= pdc->dma_size);
|
|
|
|
/*
|
|
* Drop the lock here since it might end up calling
|
|
* uart_start(), which takes the lock.
|
|
*/
|
|
spin_unlock(&port->lock);
|
|
tty_flip_buffer_push(tty);
|
|
spin_lock(&port->lock);
|
|
|
|
UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
|
|
}
|
|
|
|
/*
|
|
* tasklet handling tty stuff outside the interrupt handler.
|
|
*/
|
|
static void atmel_tasklet_func(unsigned long data)
|
|
{
|
|
struct uart_port *port = (struct uart_port *)data;
|
|
struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
|
|
unsigned int status;
|
|
unsigned int status_change;
|
|
|
|
/* The interrupt handler does not take the lock */
|
|
spin_lock(&port->lock);
|
|
|
|
if (atmel_use_dma_tx(port))
|
|
atmel_tx_dma(port);
|
|
else
|
|
atmel_tx_chars(port);
|
|
|
|
status = atmel_port->irq_status;
|
|
status_change = status ^ atmel_port->irq_status_prev;
|
|
|
|
if (status_change & (ATMEL_US_RI | ATMEL_US_DSR
|
|
| ATMEL_US_DCD | ATMEL_US_CTS)) {
|
|
/* TODO: All reads to CSR will clear these interrupts! */
|
|
if (status_change & ATMEL_US_RI)
|
|
port->icount.rng++;
|
|
if (status_change & ATMEL_US_DSR)
|
|
port->icount.dsr++;
|
|
if (status_change & ATMEL_US_DCD)
|
|
uart_handle_dcd_change(port, !(status & ATMEL_US_DCD));
|
|
if (status_change & ATMEL_US_CTS)
|
|
uart_handle_cts_change(port, !(status & ATMEL_US_CTS));
|
|
|
|
wake_up_interruptible(&port->state->port.delta_msr_wait);
|
|
|
|
atmel_port->irq_status_prev = status;
|
|
}
|
|
|
|
if (atmel_use_dma_rx(port))
|
|
atmel_rx_from_dma(port);
|
|
else
|
|
atmel_rx_from_ring(port);
|
|
|
|
spin_unlock(&port->lock);
|
|
}
|
|
|
|
/*
|
|
* Perform initialization and enable port for reception
|
|
*/
|
|
static int atmel_startup(struct uart_port *port)
|
|
{
|
|
struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
|
|
struct tty_struct *tty = port->state->port.tty;
|
|
int retval;
|
|
|
|
/*
|
|
* Ensure that no interrupts are enabled otherwise when
|
|
* request_irq() is called we could get stuck trying to
|
|
* handle an unexpected interrupt
|
|
*/
|
|
UART_PUT_IDR(port, -1);
|
|
|
|
/*
|
|
* Allocate the IRQ
|
|
*/
|
|
retval = request_irq(port->irq, atmel_interrupt, IRQF_SHARED,
|
|
tty ? tty->name : "atmel_serial", port);
|
|
if (retval) {
|
|
printk("atmel_serial: atmel_startup - Can't get irq\n");
|
|
return retval;
|
|
}
|
|
|
|
/*
|
|
* Initialize DMA (if necessary)
|
|
*/
|
|
if (atmel_use_dma_rx(port)) {
|
|
int i;
|
|
|
|
for (i = 0; i < 2; i++) {
|
|
struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
|
|
|
|
pdc->buf = kmalloc(PDC_BUFFER_SIZE, GFP_KERNEL);
|
|
if (pdc->buf == NULL) {
|
|
if (i != 0) {
|
|
dma_unmap_single(port->dev,
|
|
atmel_port->pdc_rx[0].dma_addr,
|
|
PDC_BUFFER_SIZE,
|
|
DMA_FROM_DEVICE);
|
|
kfree(atmel_port->pdc_rx[0].buf);
|
|
}
|
|
free_irq(port->irq, port);
|
|
return -ENOMEM;
|
|
}
|
|
pdc->dma_addr = dma_map_single(port->dev,
|
|
pdc->buf,
|
|
PDC_BUFFER_SIZE,
|
|
DMA_FROM_DEVICE);
|
|
pdc->dma_size = PDC_BUFFER_SIZE;
|
|
pdc->ofs = 0;
|
|
}
|
|
|
|
atmel_port->pdc_rx_idx = 0;
|
|
|
|
UART_PUT_RPR(port, atmel_port->pdc_rx[0].dma_addr);
|
|
UART_PUT_RCR(port, PDC_BUFFER_SIZE);
|
|
|
|
UART_PUT_RNPR(port, atmel_port->pdc_rx[1].dma_addr);
|
|
UART_PUT_RNCR(port, PDC_BUFFER_SIZE);
|
|
}
|
|
if (atmel_use_dma_tx(port)) {
|
|
struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
|
|
struct circ_buf *xmit = &port->state->xmit;
|
|
|
|
pdc->buf = xmit->buf;
|
|
pdc->dma_addr = dma_map_single(port->dev,
|
|
pdc->buf,
|
|
UART_XMIT_SIZE,
|
|
DMA_TO_DEVICE);
|
|
pdc->dma_size = UART_XMIT_SIZE;
|
|
pdc->ofs = 0;
|
|
}
|
|
|
|
/*
|
|
* If there is a specific "open" function (to register
|
|
* control line interrupts)
|
|
*/
|
|
if (atmel_open_hook) {
|
|
retval = atmel_open_hook(port);
|
|
if (retval) {
|
|
free_irq(port->irq, port);
|
|
return retval;
|
|
}
|
|
}
|
|
|
|
/* Save current CSR for comparison in atmel_tasklet_func() */
|
|
atmel_port->irq_status_prev = UART_GET_CSR(port);
|
|
atmel_port->irq_status = atmel_port->irq_status_prev;
|
|
|
|
/*
|
|
* Finally, enable the serial port
|
|
*/
|
|
UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
|
|
/* enable xmit & rcvr */
|
|
UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
|
|
|
|
if (atmel_use_dma_rx(port)) {
|
|
/* set UART timeout */
|
|
UART_PUT_RTOR(port, PDC_RX_TIMEOUT);
|
|
UART_PUT_CR(port, ATMEL_US_STTTO);
|
|
|
|
UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
|
|
/* enable PDC controller */
|
|
UART_PUT_PTCR(port, ATMEL_PDC_RXTEN);
|
|
} else {
|
|
/* enable receive only */
|
|
UART_PUT_IER(port, ATMEL_US_RXRDY);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Disable the port
|
|
*/
|
|
static void atmel_shutdown(struct uart_port *port)
|
|
{
|
|
struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
|
|
/*
|
|
* Ensure everything is stopped.
|
|
*/
|
|
atmel_stop_rx(port);
|
|
atmel_stop_tx(port);
|
|
|
|
/*
|
|
* Shut-down the DMA.
|
|
*/
|
|
if (atmel_use_dma_rx(port)) {
|
|
int i;
|
|
|
|
for (i = 0; i < 2; i++) {
|
|
struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
|
|
|
|
dma_unmap_single(port->dev,
|
|
pdc->dma_addr,
|
|
pdc->dma_size,
|
|
DMA_FROM_DEVICE);
|
|
kfree(pdc->buf);
|
|
}
|
|
}
|
|
if (atmel_use_dma_tx(port)) {
|
|
struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
|
|
|
|
dma_unmap_single(port->dev,
|
|
pdc->dma_addr,
|
|
pdc->dma_size,
|
|
DMA_TO_DEVICE);
|
|
}
|
|
|
|
/*
|
|
* Disable all interrupts, port and break condition.
|
|
*/
|
|
UART_PUT_CR(port, ATMEL_US_RSTSTA);
|
|
UART_PUT_IDR(port, -1);
|
|
|
|
/*
|
|
* Free the interrupt
|
|
*/
|
|
free_irq(port->irq, port);
|
|
|
|
/*
|
|
* If there is a specific "close" function (to unregister
|
|
* control line interrupts)
|
|
*/
|
|
if (atmel_close_hook)
|
|
atmel_close_hook(port);
|
|
}
|
|
|
|
/*
|
|
* Flush any TX data submitted for DMA. Called when the TX circular
|
|
* buffer is reset.
|
|
*/
|
|
static void atmel_flush_buffer(struct uart_port *port)
|
|
{
|
|
struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
|
|
|
|
if (atmel_use_dma_tx(port)) {
|
|
UART_PUT_TCR(port, 0);
|
|
atmel_port->pdc_tx.ofs = 0;
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Power / Clock management.
|
|
*/
|
|
static void atmel_serial_pm(struct uart_port *port, unsigned int state,
|
|
unsigned int oldstate)
|
|
{
|
|
struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
|
|
|
|
switch (state) {
|
|
case 0:
|
|
/*
|
|
* Enable the peripheral clock for this serial port.
|
|
* This is called on uart_open() or a resume event.
|
|
*/
|
|
clk_enable(atmel_port->clk);
|
|
|
|
/* re-enable interrupts if we disabled some on suspend */
|
|
UART_PUT_IER(port, atmel_port->backup_imr);
|
|
break;
|
|
case 3:
|
|
/* Back up the interrupt mask and disable all interrupts */
|
|
atmel_port->backup_imr = UART_GET_IMR(port);
|
|
UART_PUT_IDR(port, -1);
|
|
|
|
/*
|
|
* Disable the peripheral clock for this serial port.
|
|
* This is called on uart_close() or a suspend event.
|
|
*/
|
|
clk_disable(atmel_port->clk);
|
|
break;
|
|
default:
|
|
printk(KERN_ERR "atmel_serial: unknown pm %d\n", state);
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Change the port parameters
|
|
*/
|
|
static void atmel_set_termios(struct uart_port *port, struct ktermios *termios,
|
|
struct ktermios *old)
|
|
{
|
|
unsigned long flags;
|
|
unsigned int mode, imr, quot, baud;
|
|
struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
|
|
|
|
/* Get current mode register */
|
|
mode = UART_GET_MR(port) & ~(ATMEL_US_USCLKS | ATMEL_US_CHRL
|
|
| ATMEL_US_NBSTOP | ATMEL_US_PAR
|
|
| ATMEL_US_USMODE);
|
|
|
|
baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
|
|
quot = uart_get_divisor(port, baud);
|
|
|
|
if (quot > 65535) { /* BRGR is 16-bit, so switch to slower clock */
|
|
quot /= 8;
|
|
mode |= ATMEL_US_USCLKS_MCK_DIV8;
|
|
}
|
|
|
|
/* byte size */
|
|
switch (termios->c_cflag & CSIZE) {
|
|
case CS5:
|
|
mode |= ATMEL_US_CHRL_5;
|
|
break;
|
|
case CS6:
|
|
mode |= ATMEL_US_CHRL_6;
|
|
break;
|
|
case CS7:
|
|
mode |= ATMEL_US_CHRL_7;
|
|
break;
|
|
default:
|
|
mode |= ATMEL_US_CHRL_8;
|
|
break;
|
|
}
|
|
|
|
/* stop bits */
|
|
if (termios->c_cflag & CSTOPB)
|
|
mode |= ATMEL_US_NBSTOP_2;
|
|
|
|
/* parity */
|
|
if (termios->c_cflag & PARENB) {
|
|
/* Mark or Space parity */
|
|
if (termios->c_cflag & CMSPAR) {
|
|
if (termios->c_cflag & PARODD)
|
|
mode |= ATMEL_US_PAR_MARK;
|
|
else
|
|
mode |= ATMEL_US_PAR_SPACE;
|
|
} else if (termios->c_cflag & PARODD)
|
|
mode |= ATMEL_US_PAR_ODD;
|
|
else
|
|
mode |= ATMEL_US_PAR_EVEN;
|
|
} else
|
|
mode |= ATMEL_US_PAR_NONE;
|
|
|
|
/* hardware handshake (RTS/CTS) */
|
|
if (termios->c_cflag & CRTSCTS)
|
|
mode |= ATMEL_US_USMODE_HWHS;
|
|
else
|
|
mode |= ATMEL_US_USMODE_NORMAL;
|
|
|
|
spin_lock_irqsave(&port->lock, flags);
|
|
|
|
port->read_status_mask = ATMEL_US_OVRE;
|
|
if (termios->c_iflag & INPCK)
|
|
port->read_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE);
|
|
if (termios->c_iflag & (BRKINT | PARMRK))
|
|
port->read_status_mask |= ATMEL_US_RXBRK;
|
|
|
|
if (atmel_use_dma_rx(port))
|
|
/* need to enable error interrupts */
|
|
UART_PUT_IER(port, port->read_status_mask);
|
|
|
|
/*
|
|
* Characters to ignore
|
|
*/
|
|
port->ignore_status_mask = 0;
|
|
if (termios->c_iflag & IGNPAR)
|
|
port->ignore_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE);
|
|
if (termios->c_iflag & IGNBRK) {
|
|
port->ignore_status_mask |= ATMEL_US_RXBRK;
|
|
/*
|
|
* If we're ignoring parity and break indicators,
|
|
* ignore overruns too (for real raw support).
|
|
*/
|
|
if (termios->c_iflag & IGNPAR)
|
|
port->ignore_status_mask |= ATMEL_US_OVRE;
|
|
}
|
|
/* TODO: Ignore all characters if CREAD is set.*/
|
|
|
|
/* update the per-port timeout */
|
|
uart_update_timeout(port, termios->c_cflag, baud);
|
|
|
|
/*
|
|
* save/disable interrupts. The tty layer will ensure that the
|
|
* transmitter is empty if requested by the caller, so there's
|
|
* no need to wait for it here.
|
|
*/
|
|
imr = UART_GET_IMR(port);
|
|
UART_PUT_IDR(port, -1);
|
|
|
|
/* disable receiver and transmitter */
|
|
UART_PUT_CR(port, ATMEL_US_TXDIS | ATMEL_US_RXDIS);
|
|
|
|
/* Resetting serial mode to RS232 (0x0) */
|
|
mode &= ~ATMEL_US_USMODE;
|
|
|
|
if (atmel_port->rs485.flags & SER_RS485_ENABLED) {
|
|
dev_dbg(port->dev, "Setting UART to RS485\n");
|
|
if ((atmel_port->rs485.delay_rts_after_send) > 0)
|
|
UART_PUT_TTGR(port,
|
|
atmel_port->rs485.delay_rts_after_send);
|
|
mode |= ATMEL_US_USMODE_RS485;
|
|
} else {
|
|
dev_dbg(port->dev, "Setting UART to RS232\n");
|
|
}
|
|
|
|
/* set the parity, stop bits and data size */
|
|
UART_PUT_MR(port, mode);
|
|
|
|
/* set the baud rate */
|
|
UART_PUT_BRGR(port, quot);
|
|
UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
|
|
UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
|
|
|
|
/* restore interrupts */
|
|
UART_PUT_IER(port, imr);
|
|
|
|
/* CTS flow-control and modem-status interrupts */
|
|
if (UART_ENABLE_MS(port, termios->c_cflag))
|
|
port->ops->enable_ms(port);
|
|
|
|
spin_unlock_irqrestore(&port->lock, flags);
|
|
}
|
|
|
|
static void atmel_set_ldisc(struct uart_port *port, int new)
|
|
{
|
|
if (new == N_PPS) {
|
|
port->flags |= UPF_HARDPPS_CD;
|
|
atmel_enable_ms(port);
|
|
} else {
|
|
port->flags &= ~UPF_HARDPPS_CD;
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Return string describing the specified port
|
|
*/
|
|
static const char *atmel_type(struct uart_port *port)
|
|
{
|
|
return (port->type == PORT_ATMEL) ? "ATMEL_SERIAL" : NULL;
|
|
}
|
|
|
|
/*
|
|
* Release the memory region(s) being used by 'port'.
|
|
*/
|
|
static void atmel_release_port(struct uart_port *port)
|
|
{
|
|
struct platform_device *pdev = to_platform_device(port->dev);
|
|
int size = pdev->resource[0].end - pdev->resource[0].start + 1;
|
|
|
|
release_mem_region(port->mapbase, size);
|
|
|
|
if (port->flags & UPF_IOREMAP) {
|
|
iounmap(port->membase);
|
|
port->membase = NULL;
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Request the memory region(s) being used by 'port'.
|
|
*/
|
|
static int atmel_request_port(struct uart_port *port)
|
|
{
|
|
struct platform_device *pdev = to_platform_device(port->dev);
|
|
int size = pdev->resource[0].end - pdev->resource[0].start + 1;
|
|
|
|
if (!request_mem_region(port->mapbase, size, "atmel_serial"))
|
|
return -EBUSY;
|
|
|
|
if (port->flags & UPF_IOREMAP) {
|
|
port->membase = ioremap(port->mapbase, size);
|
|
if (port->membase == NULL) {
|
|
release_mem_region(port->mapbase, size);
|
|
return -ENOMEM;
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Configure/autoconfigure the port.
|
|
*/
|
|
static void atmel_config_port(struct uart_port *port, int flags)
|
|
{
|
|
if (flags & UART_CONFIG_TYPE) {
|
|
port->type = PORT_ATMEL;
|
|
atmel_request_port(port);
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Verify the new serial_struct (for TIOCSSERIAL).
|
|
*/
|
|
static int atmel_verify_port(struct uart_port *port, struct serial_struct *ser)
|
|
{
|
|
int ret = 0;
|
|
if (ser->type != PORT_UNKNOWN && ser->type != PORT_ATMEL)
|
|
ret = -EINVAL;
|
|
if (port->irq != ser->irq)
|
|
ret = -EINVAL;
|
|
if (ser->io_type != SERIAL_IO_MEM)
|
|
ret = -EINVAL;
|
|
if (port->uartclk / 16 != ser->baud_base)
|
|
ret = -EINVAL;
|
|
if ((void *)port->mapbase != ser->iomem_base)
|
|
ret = -EINVAL;
|
|
if (port->iobase != ser->port)
|
|
ret = -EINVAL;
|
|
if (ser->hub6 != 0)
|
|
ret = -EINVAL;
|
|
return ret;
|
|
}
|
|
|
|
#ifdef CONFIG_CONSOLE_POLL
|
|
static int atmel_poll_get_char(struct uart_port *port)
|
|
{
|
|
while (!(UART_GET_CSR(port) & ATMEL_US_RXRDY))
|
|
cpu_relax();
|
|
|
|
return UART_GET_CHAR(port);
|
|
}
|
|
|
|
static void atmel_poll_put_char(struct uart_port *port, unsigned char ch)
|
|
{
|
|
while (!(UART_GET_CSR(port) & ATMEL_US_TXRDY))
|
|
cpu_relax();
|
|
|
|
UART_PUT_CHAR(port, ch);
|
|
}
|
|
#endif
|
|
|
|
static int
|
|
atmel_ioctl(struct uart_port *port, unsigned int cmd, unsigned long arg)
|
|
{
|
|
struct serial_rs485 rs485conf;
|
|
|
|
switch (cmd) {
|
|
case TIOCSRS485:
|
|
if (copy_from_user(&rs485conf, (struct serial_rs485 *) arg,
|
|
sizeof(rs485conf)))
|
|
return -EFAULT;
|
|
|
|
atmel_config_rs485(port, &rs485conf);
|
|
break;
|
|
|
|
case TIOCGRS485:
|
|
if (copy_to_user((struct serial_rs485 *) arg,
|
|
&(to_atmel_uart_port(port)->rs485),
|
|
sizeof(rs485conf)))
|
|
return -EFAULT;
|
|
break;
|
|
|
|
default:
|
|
return -ENOIOCTLCMD;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
|
|
|
|
static struct uart_ops atmel_pops = {
|
|
.tx_empty = atmel_tx_empty,
|
|
.set_mctrl = atmel_set_mctrl,
|
|
.get_mctrl = atmel_get_mctrl,
|
|
.stop_tx = atmel_stop_tx,
|
|
.start_tx = atmel_start_tx,
|
|
.stop_rx = atmel_stop_rx,
|
|
.enable_ms = atmel_enable_ms,
|
|
.break_ctl = atmel_break_ctl,
|
|
.startup = atmel_startup,
|
|
.shutdown = atmel_shutdown,
|
|
.flush_buffer = atmel_flush_buffer,
|
|
.set_termios = atmel_set_termios,
|
|
.set_ldisc = atmel_set_ldisc,
|
|
.type = atmel_type,
|
|
.release_port = atmel_release_port,
|
|
.request_port = atmel_request_port,
|
|
.config_port = atmel_config_port,
|
|
.verify_port = atmel_verify_port,
|
|
.pm = atmel_serial_pm,
|
|
.ioctl = atmel_ioctl,
|
|
#ifdef CONFIG_CONSOLE_POLL
|
|
.poll_get_char = atmel_poll_get_char,
|
|
.poll_put_char = atmel_poll_put_char,
|
|
#endif
|
|
};
|
|
|
|
static void atmel_of_init_port(struct atmel_uart_port *atmel_port,
|
|
struct device_node *np)
|
|
{
|
|
u32 rs485_delay[2];
|
|
|
|
/* DMA/PDC usage specification */
|
|
if (of_get_property(np, "atmel,use-dma-rx", NULL))
|
|
atmel_port->use_dma_rx = 1;
|
|
else
|
|
atmel_port->use_dma_rx = 0;
|
|
if (of_get_property(np, "atmel,use-dma-tx", NULL))
|
|
atmel_port->use_dma_tx = 1;
|
|
else
|
|
atmel_port->use_dma_tx = 0;
|
|
|
|
/* rs485 properties */
|
|
if (of_property_read_u32_array(np, "rs485-rts-delay",
|
|
rs485_delay, 2) == 0) {
|
|
struct serial_rs485 *rs485conf = &atmel_port->rs485;
|
|
|
|
rs485conf->delay_rts_before_send = rs485_delay[0];
|
|
rs485conf->delay_rts_after_send = rs485_delay[1];
|
|
rs485conf->flags = 0;
|
|
|
|
if (of_get_property(np, "rs485-rx-during-tx", NULL))
|
|
rs485conf->flags |= SER_RS485_RX_DURING_TX;
|
|
|
|
if (of_get_property(np, "linux,rs485-enabled-at-boot-time", NULL))
|
|
rs485conf->flags |= SER_RS485_ENABLED;
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Configure the port from the platform device resource info.
|
|
*/
|
|
static void atmel_init_port(struct atmel_uart_port *atmel_port,
|
|
struct platform_device *pdev)
|
|
{
|
|
struct uart_port *port = &atmel_port->uart;
|
|
struct atmel_uart_data *pdata = pdev->dev.platform_data;
|
|
|
|
if (pdev->dev.of_node) {
|
|
atmel_of_init_port(atmel_port, pdev->dev.of_node);
|
|
} else {
|
|
atmel_port->use_dma_rx = pdata->use_dma_rx;
|
|
atmel_port->use_dma_tx = pdata->use_dma_tx;
|
|
atmel_port->rs485 = pdata->rs485;
|
|
}
|
|
|
|
port->iotype = UPIO_MEM;
|
|
port->flags = UPF_BOOT_AUTOCONF;
|
|
port->ops = &atmel_pops;
|
|
port->fifosize = 1;
|
|
port->dev = &pdev->dev;
|
|
port->mapbase = pdev->resource[0].start;
|
|
port->irq = pdev->resource[1].start;
|
|
|
|
tasklet_init(&atmel_port->tasklet, atmel_tasklet_func,
|
|
(unsigned long)port);
|
|
|
|
memset(&atmel_port->rx_ring, 0, sizeof(atmel_port->rx_ring));
|
|
|
|
if (pdata && pdata->regs) {
|
|
/* Already mapped by setup code */
|
|
port->membase = pdata->regs;
|
|
} else {
|
|
port->flags |= UPF_IOREMAP;
|
|
port->membase = NULL;
|
|
}
|
|
|
|
/* for console, the clock could already be configured */
|
|
if (!atmel_port->clk) {
|
|
atmel_port->clk = clk_get(&pdev->dev, "usart");
|
|
clk_enable(atmel_port->clk);
|
|
port->uartclk = clk_get_rate(atmel_port->clk);
|
|
clk_disable(atmel_port->clk);
|
|
/* only enable clock when USART is in use */
|
|
}
|
|
|
|
/* Use TXEMPTY for interrupt when rs485 else TXRDY or ENDTX|TXBUFE */
|
|
if (atmel_port->rs485.flags & SER_RS485_ENABLED)
|
|
atmel_port->tx_done_mask = ATMEL_US_TXEMPTY;
|
|
else if (atmel_use_dma_tx(port)) {
|
|
port->fifosize = PDC_BUFFER_SIZE;
|
|
atmel_port->tx_done_mask = ATMEL_US_ENDTX | ATMEL_US_TXBUFE;
|
|
} else {
|
|
atmel_port->tx_done_mask = ATMEL_US_TXRDY;
|
|
}
|
|
}
|
|
|
|
struct platform_device *atmel_default_console_device; /* the serial console device */
|
|
|
|
#ifdef CONFIG_SERIAL_ATMEL_CONSOLE
|
|
static void atmel_console_putchar(struct uart_port *port, int ch)
|
|
{
|
|
while (!(UART_GET_CSR(port) & ATMEL_US_TXRDY))
|
|
cpu_relax();
|
|
UART_PUT_CHAR(port, ch);
|
|
}
|
|
|
|
/*
|
|
* Interrupts are disabled on entering
|
|
*/
|
|
static void atmel_console_write(struct console *co, const char *s, u_int count)
|
|
{
|
|
struct uart_port *port = &atmel_ports[co->index].uart;
|
|
struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
|
|
unsigned int status, imr;
|
|
unsigned int pdc_tx;
|
|
|
|
/*
|
|
* First, save IMR and then disable interrupts
|
|
*/
|
|
imr = UART_GET_IMR(port);
|
|
UART_PUT_IDR(port, ATMEL_US_RXRDY | atmel_port->tx_done_mask);
|
|
|
|
/* Store PDC transmit status and disable it */
|
|
pdc_tx = UART_GET_PTSR(port) & ATMEL_PDC_TXTEN;
|
|
UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
|
|
|
|
uart_console_write(port, s, count, atmel_console_putchar);
|
|
|
|
/*
|
|
* Finally, wait for transmitter to become empty
|
|
* and restore IMR
|
|
*/
|
|
do {
|
|
status = UART_GET_CSR(port);
|
|
} while (!(status & ATMEL_US_TXRDY));
|
|
|
|
/* Restore PDC transmit status */
|
|
if (pdc_tx)
|
|
UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
|
|
|
|
/* set interrupts back the way they were */
|
|
UART_PUT_IER(port, imr);
|
|
}
|
|
|
|
/*
|
|
* If the port was already initialised (eg, by a boot loader),
|
|
* try to determine the current setup.
|
|
*/
|
|
static void __init atmel_console_get_options(struct uart_port *port, int *baud,
|
|
int *parity, int *bits)
|
|
{
|
|
unsigned int mr, quot;
|
|
|
|
/*
|
|
* If the baud rate generator isn't running, the port wasn't
|
|
* initialized by the boot loader.
|
|
*/
|
|
quot = UART_GET_BRGR(port) & ATMEL_US_CD;
|
|
if (!quot)
|
|
return;
|
|
|
|
mr = UART_GET_MR(port) & ATMEL_US_CHRL;
|
|
if (mr == ATMEL_US_CHRL_8)
|
|
*bits = 8;
|
|
else
|
|
*bits = 7;
|
|
|
|
mr = UART_GET_MR(port) & ATMEL_US_PAR;
|
|
if (mr == ATMEL_US_PAR_EVEN)
|
|
*parity = 'e';
|
|
else if (mr == ATMEL_US_PAR_ODD)
|
|
*parity = 'o';
|
|
|
|
/*
|
|
* The serial core only rounds down when matching this to a
|
|
* supported baud rate. Make sure we don't end up slightly
|
|
* lower than one of those, as it would make us fall through
|
|
* to a much lower baud rate than we really want.
|
|
*/
|
|
*baud = port->uartclk / (16 * (quot - 1));
|
|
}
|
|
|
|
static int __init atmel_console_setup(struct console *co, char *options)
|
|
{
|
|
struct uart_port *port = &atmel_ports[co->index].uart;
|
|
int baud = 115200;
|
|
int bits = 8;
|
|
int parity = 'n';
|
|
int flow = 'n';
|
|
|
|
if (port->membase == NULL) {
|
|
/* Port not initialized yet - delay setup */
|
|
return -ENODEV;
|
|
}
|
|
|
|
clk_enable(atmel_ports[co->index].clk);
|
|
|
|
UART_PUT_IDR(port, -1);
|
|
UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
|
|
UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
|
|
|
|
if (options)
|
|
uart_parse_options(options, &baud, &parity, &bits, &flow);
|
|
else
|
|
atmel_console_get_options(port, &baud, &parity, &bits);
|
|
|
|
return uart_set_options(port, co, baud, parity, bits, flow);
|
|
}
|
|
|
|
static struct uart_driver atmel_uart;
|
|
|
|
static struct console atmel_console = {
|
|
.name = ATMEL_DEVICENAME,
|
|
.write = atmel_console_write,
|
|
.device = uart_console_device,
|
|
.setup = atmel_console_setup,
|
|
.flags = CON_PRINTBUFFER,
|
|
.index = -1,
|
|
.data = &atmel_uart,
|
|
};
|
|
|
|
#define ATMEL_CONSOLE_DEVICE (&atmel_console)
|
|
|
|
/*
|
|
* Early console initialization (before VM subsystem initialized).
|
|
*/
|
|
static int __init atmel_console_init(void)
|
|
{
|
|
if (atmel_default_console_device) {
|
|
struct atmel_uart_data *pdata =
|
|
atmel_default_console_device->dev.platform_data;
|
|
int id = pdata->num;
|
|
struct atmel_uart_port *port = &atmel_ports[id];
|
|
|
|
port->backup_imr = 0;
|
|
port->uart.line = id;
|
|
|
|
add_preferred_console(ATMEL_DEVICENAME, id, NULL);
|
|
atmel_init_port(port, atmel_default_console_device);
|
|
register_console(&atmel_console);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
console_initcall(atmel_console_init);
|
|
|
|
/*
|
|
* Late console initialization.
|
|
*/
|
|
static int __init atmel_late_console_init(void)
|
|
{
|
|
if (atmel_default_console_device
|
|
&& !(atmel_console.flags & CON_ENABLED))
|
|
register_console(&atmel_console);
|
|
|
|
return 0;
|
|
}
|
|
|
|
core_initcall(atmel_late_console_init);
|
|
|
|
static inline bool atmel_is_console_port(struct uart_port *port)
|
|
{
|
|
return port->cons && port->cons->index == port->line;
|
|
}
|
|
|
|
#else
|
|
#define ATMEL_CONSOLE_DEVICE NULL
|
|
|
|
static inline bool atmel_is_console_port(struct uart_port *port)
|
|
{
|
|
return false;
|
|
}
|
|
#endif
|
|
|
|
static struct uart_driver atmel_uart = {
|
|
.owner = THIS_MODULE,
|
|
.driver_name = "atmel_serial",
|
|
.dev_name = ATMEL_DEVICENAME,
|
|
.major = SERIAL_ATMEL_MAJOR,
|
|
.minor = MINOR_START,
|
|
.nr = ATMEL_MAX_UART,
|
|
.cons = ATMEL_CONSOLE_DEVICE,
|
|
};
|
|
|
|
#ifdef CONFIG_PM
|
|
static bool atmel_serial_clk_will_stop(void)
|
|
{
|
|
#ifdef CONFIG_ARCH_AT91
|
|
return at91_suspend_entering_slow_clock();
|
|
#else
|
|
return false;
|
|
#endif
|
|
}
|
|
|
|
static int atmel_serial_suspend(struct platform_device *pdev,
|
|
pm_message_t state)
|
|
{
|
|
struct uart_port *port = platform_get_drvdata(pdev);
|
|
struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
|
|
|
|
if (atmel_is_console_port(port) && console_suspend_enabled) {
|
|
/* Drain the TX shifter */
|
|
while (!(UART_GET_CSR(port) & ATMEL_US_TXEMPTY))
|
|
cpu_relax();
|
|
}
|
|
|
|
/* we can not wake up if we're running on slow clock */
|
|
atmel_port->may_wakeup = device_may_wakeup(&pdev->dev);
|
|
if (atmel_serial_clk_will_stop())
|
|
device_set_wakeup_enable(&pdev->dev, 0);
|
|
|
|
uart_suspend_port(&atmel_uart, port);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int atmel_serial_resume(struct platform_device *pdev)
|
|
{
|
|
struct uart_port *port = platform_get_drvdata(pdev);
|
|
struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
|
|
|
|
uart_resume_port(&atmel_uart, port);
|
|
device_set_wakeup_enable(&pdev->dev, atmel_port->may_wakeup);
|
|
|
|
return 0;
|
|
}
|
|
#else
|
|
#define atmel_serial_suspend NULL
|
|
#define atmel_serial_resume NULL
|
|
#endif
|
|
|
|
static int atmel_serial_probe(struct platform_device *pdev)
|
|
{
|
|
struct atmel_uart_port *port;
|
|
struct device_node *np = pdev->dev.of_node;
|
|
struct atmel_uart_data *pdata = pdev->dev.platform_data;
|
|
void *data;
|
|
int ret = -ENODEV;
|
|
struct pinctrl *pinctrl;
|
|
|
|
BUILD_BUG_ON(ATMEL_SERIAL_RINGSIZE & (ATMEL_SERIAL_RINGSIZE - 1));
|
|
|
|
if (np)
|
|
ret = of_alias_get_id(np, "serial");
|
|
else
|
|
if (pdata)
|
|
ret = pdata->num;
|
|
|
|
if (ret < 0)
|
|
/* port id not found in platform data nor device-tree aliases:
|
|
* auto-enumerate it */
|
|
ret = find_first_zero_bit(&atmel_ports_in_use,
|
|
sizeof(atmel_ports_in_use));
|
|
|
|
if (ret > ATMEL_MAX_UART) {
|
|
ret = -ENODEV;
|
|
goto err;
|
|
}
|
|
|
|
if (test_and_set_bit(ret, &atmel_ports_in_use)) {
|
|
/* port already in use */
|
|
ret = -EBUSY;
|
|
goto err;
|
|
}
|
|
|
|
port = &atmel_ports[ret];
|
|
port->backup_imr = 0;
|
|
port->uart.line = ret;
|
|
|
|
atmel_init_port(port, pdev);
|
|
|
|
pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
|
|
if (IS_ERR(pinctrl)) {
|
|
ret = PTR_ERR(pinctrl);
|
|
goto err;
|
|
}
|
|
|
|
if (!atmel_use_dma_rx(&port->uart)) {
|
|
ret = -ENOMEM;
|
|
data = kmalloc(sizeof(struct atmel_uart_char)
|
|
* ATMEL_SERIAL_RINGSIZE, GFP_KERNEL);
|
|
if (!data)
|
|
goto err_alloc_ring;
|
|
port->rx_ring.buf = data;
|
|
}
|
|
|
|
ret = uart_add_one_port(&atmel_uart, &port->uart);
|
|
if (ret)
|
|
goto err_add_port;
|
|
|
|
#ifdef CONFIG_SERIAL_ATMEL_CONSOLE
|
|
if (atmel_is_console_port(&port->uart)
|
|
&& ATMEL_CONSOLE_DEVICE->flags & CON_ENABLED) {
|
|
/*
|
|
* The serial core enabled the clock for us, so undo
|
|
* the clk_enable() in atmel_console_setup()
|
|
*/
|
|
clk_disable(port->clk);
|
|
}
|
|
#endif
|
|
|
|
device_init_wakeup(&pdev->dev, 1);
|
|
platform_set_drvdata(pdev, port);
|
|
|
|
if (port->rs485.flags & SER_RS485_ENABLED) {
|
|
UART_PUT_MR(&port->uart, ATMEL_US_USMODE_NORMAL);
|
|
UART_PUT_CR(&port->uart, ATMEL_US_RTSEN);
|
|
}
|
|
|
|
return 0;
|
|
|
|
err_add_port:
|
|
kfree(port->rx_ring.buf);
|
|
port->rx_ring.buf = NULL;
|
|
err_alloc_ring:
|
|
if (!atmel_is_console_port(&port->uart)) {
|
|
clk_put(port->clk);
|
|
port->clk = NULL;
|
|
}
|
|
err:
|
|
return ret;
|
|
}
|
|
|
|
static int atmel_serial_remove(struct platform_device *pdev)
|
|
{
|
|
struct uart_port *port = platform_get_drvdata(pdev);
|
|
struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
|
|
int ret = 0;
|
|
|
|
device_init_wakeup(&pdev->dev, 0);
|
|
platform_set_drvdata(pdev, NULL);
|
|
|
|
ret = uart_remove_one_port(&atmel_uart, port);
|
|
|
|
tasklet_kill(&atmel_port->tasklet);
|
|
kfree(atmel_port->rx_ring.buf);
|
|
|
|
/* "port" is allocated statically, so we shouldn't free it */
|
|
|
|
clear_bit(port->line, &atmel_ports_in_use);
|
|
|
|
clk_put(atmel_port->clk);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static struct platform_driver atmel_serial_driver = {
|
|
.probe = atmel_serial_probe,
|
|
.remove = atmel_serial_remove,
|
|
.suspend = atmel_serial_suspend,
|
|
.resume = atmel_serial_resume,
|
|
.driver = {
|
|
.name = "atmel_usart",
|
|
.owner = THIS_MODULE,
|
|
.of_match_table = of_match_ptr(atmel_serial_dt_ids),
|
|
},
|
|
};
|
|
|
|
static int __init atmel_serial_init(void)
|
|
{
|
|
int ret;
|
|
|
|
ret = uart_register_driver(&atmel_uart);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = platform_driver_register(&atmel_serial_driver);
|
|
if (ret)
|
|
uart_unregister_driver(&atmel_uart);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static void __exit atmel_serial_exit(void)
|
|
{
|
|
platform_driver_unregister(&atmel_serial_driver);
|
|
uart_unregister_driver(&atmel_uart);
|
|
}
|
|
|
|
module_init(atmel_serial_init);
|
|
module_exit(atmel_serial_exit);
|
|
|
|
MODULE_AUTHOR("Rick Bronson");
|
|
MODULE_DESCRIPTION("Atmel AT91 / AT32 serial port driver");
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_ALIAS("platform:atmel_usart");
|