![Bill Pemberton](/assets/img/avatar_default.png)
CONFIG_HOTPLUG is going away as an option so __devexit is no longer needed. Signed-off-by: Bill Pemberton <wfp5p@virginia.edu> Cc: Jiri Slaby <jirislaby@gmail.com> Cc: Alan Cox <alan@linux.intel.com> Acked-by: Tobias Klauser <tklauser@distanz.ch> Cc: Lucas Tavares <lucaskt@linux.vnet.ibm.com> Cc: Daniel Walker <dwalker@fifo99.com> Cc: Bryan Huntsman <bryanh@codeaurora.org> Cc: "David S. Miller" <davem@davemloft.net> Cc: Peter Korsgaard <jacmet@sunsite.dk> Cc: Tony Prisk <linux@prisktech.co.nz> Acked-by: David Brown <davidb@codeaurora.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
538 lines
13 KiB
C
538 lines
13 KiB
C
/*
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* Driver for CLPS711x serial ports
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*
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* Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
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*
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* Copyright 1999 ARM Limited
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* Copyright (C) 2000 Deep Blue Solutions Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#if defined(CONFIG_SERIAL_CLPS711X_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
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#define SUPPORT_SYSRQ
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#endif
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#include <linux/module.h>
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#include <linux/device.h>
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#include <linux/console.h>
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#include <linux/serial_core.h>
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#include <linux/serial.h>
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#include <linux/io.h>
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#include <linux/clk.h>
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#include <linux/tty.h>
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#include <linux/tty_flip.h>
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#include <linux/ioport.h>
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#include <linux/platform_device.h>
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#include <mach/hardware.h>
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#define UART_CLPS711X_NAME "uart-clps711x"
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#define UART_CLPS711X_NR 2
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#define UART_CLPS711X_MAJOR 204
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#define UART_CLPS711X_MINOR 40
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#define UBRLCR(port) ((port)->line ? UBRLCR2 : UBRLCR1)
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#define UARTDR(port) ((port)->line ? UARTDR2 : UARTDR1)
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#define SYSFLG(port) ((port)->line ? SYSFLG2 : SYSFLG1)
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#define SYSCON(port) ((port)->line ? SYSCON2 : SYSCON1)
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#define TX_IRQ(port) ((port)->line ? IRQ_UTXINT2 : IRQ_UTXINT1)
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#define RX_IRQ(port) ((port)->line ? IRQ_URXINT2 : IRQ_URXINT1)
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struct clps711x_port {
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struct uart_driver uart;
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struct clk *uart_clk;
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struct uart_port port[UART_CLPS711X_NR];
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int tx_enabled[UART_CLPS711X_NR];
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#ifdef CONFIG_SERIAL_CLPS711X_CONSOLE
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struct console console;
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#endif
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};
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static void uart_clps711x_stop_tx(struct uart_port *port)
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{
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struct clps711x_port *s = dev_get_drvdata(port->dev);
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if (s->tx_enabled[port->line]) {
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disable_irq(TX_IRQ(port));
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s->tx_enabled[port->line] = 0;
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}
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}
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static void uart_clps711x_start_tx(struct uart_port *port)
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{
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struct clps711x_port *s = dev_get_drvdata(port->dev);
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if (!s->tx_enabled[port->line]) {
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enable_irq(TX_IRQ(port));
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s->tx_enabled[port->line] = 1;
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}
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}
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static void uart_clps711x_stop_rx(struct uart_port *port)
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{
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disable_irq(RX_IRQ(port));
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}
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static void uart_clps711x_enable_ms(struct uart_port *port)
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{
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/* Do nothing */
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}
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static irqreturn_t uart_clps711x_int_rx(int irq, void *dev_id)
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{
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struct uart_port *port = dev_id;
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struct tty_struct *tty = tty_port_tty_get(&port->state->port);
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unsigned int status, ch, flg;
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if (!tty)
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return IRQ_HANDLED;
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for (;;) {
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status = clps_readl(SYSFLG(port));
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if (status & SYSFLG_URXFE)
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break;
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ch = clps_readw(UARTDR(port));
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status = ch & (UARTDR_FRMERR | UARTDR_PARERR | UARTDR_OVERR);
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ch &= 0xff;
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port->icount.rx++;
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flg = TTY_NORMAL;
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if (unlikely(status)) {
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if (status & UARTDR_PARERR)
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port->icount.parity++;
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else if (status & UARTDR_FRMERR)
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port->icount.frame++;
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else if (status & UARTDR_OVERR)
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port->icount.overrun++;
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status &= port->read_status_mask;
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if (status & UARTDR_PARERR)
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flg = TTY_PARITY;
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else if (status & UARTDR_FRMERR)
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flg = TTY_FRAME;
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else if (status & UARTDR_OVERR)
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flg = TTY_OVERRUN;
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}
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if (uart_handle_sysrq_char(port, ch))
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continue;
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if (status & port->ignore_status_mask)
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continue;
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uart_insert_char(port, status, UARTDR_OVERR, ch, flg);
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}
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tty_flip_buffer_push(tty);
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tty_kref_put(tty);
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return IRQ_HANDLED;
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}
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static irqreturn_t uart_clps711x_int_tx(int irq, void *dev_id)
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{
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struct uart_port *port = dev_id;
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struct clps711x_port *s = dev_get_drvdata(port->dev);
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struct circ_buf *xmit = &port->state->xmit;
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if (port->x_char) {
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clps_writew(port->x_char, UARTDR(port));
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port->icount.tx++;
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port->x_char = 0;
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return IRQ_HANDLED;
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}
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if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
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disable_irq_nosync(TX_IRQ(port));
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s->tx_enabled[port->line] = 0;
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return IRQ_HANDLED;
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}
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while (!uart_circ_empty(xmit)) {
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clps_writew(xmit->buf[xmit->tail], UARTDR(port));
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xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
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port->icount.tx++;
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if (clps_readl(SYSFLG(port) & SYSFLG_UTXFF))
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break;
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}
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if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
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uart_write_wakeup(port);
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return IRQ_HANDLED;
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}
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static unsigned int uart_clps711x_tx_empty(struct uart_port *port)
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{
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return (clps_readl(SYSFLG(port) & SYSFLG_UBUSY)) ? 0 : TIOCSER_TEMT;
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}
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static unsigned int uart_clps711x_get_mctrl(struct uart_port *port)
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{
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unsigned int status, result = 0;
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if (port->line == 0) {
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status = clps_readl(SYSFLG1);
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if (status & SYSFLG1_DCD)
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result |= TIOCM_CAR;
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if (status & SYSFLG1_DSR)
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result |= TIOCM_DSR;
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if (status & SYSFLG1_CTS)
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result |= TIOCM_CTS;
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} else
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result = TIOCM_DSR | TIOCM_CTS | TIOCM_CAR;
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return result;
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}
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static void uart_clps711x_set_mctrl(struct uart_port *port, unsigned int mctrl)
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{
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/* Do nothing */
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}
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static void uart_clps711x_break_ctl(struct uart_port *port, int break_state)
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{
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unsigned long flags;
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unsigned int ubrlcr;
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spin_lock_irqsave(&port->lock, flags);
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ubrlcr = clps_readl(UBRLCR(port));
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if (break_state)
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ubrlcr |= UBRLCR_BREAK;
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else
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ubrlcr &= ~UBRLCR_BREAK;
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clps_writel(ubrlcr, UBRLCR(port));
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spin_unlock_irqrestore(&port->lock, flags);
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}
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static int uart_clps711x_startup(struct uart_port *port)
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{
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struct clps711x_port *s = dev_get_drvdata(port->dev);
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int ret;
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s->tx_enabled[port->line] = 1;
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/* Allocate the IRQs */
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ret = devm_request_irq(port->dev, TX_IRQ(port), uart_clps711x_int_tx,
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0, UART_CLPS711X_NAME " TX", port);
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if (ret)
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return ret;
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ret = devm_request_irq(port->dev, RX_IRQ(port), uart_clps711x_int_rx,
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0, UART_CLPS711X_NAME " RX", port);
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if (ret) {
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devm_free_irq(port->dev, TX_IRQ(port), port);
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return ret;
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}
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/* Disable break */
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clps_writel(clps_readl(UBRLCR(port)) & ~UBRLCR_BREAK, UBRLCR(port));
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/* Enable the port */
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clps_writel(clps_readl(SYSCON(port)) | SYSCON_UARTEN, SYSCON(port));
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return 0;
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}
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static void uart_clps711x_shutdown(struct uart_port *port)
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{
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/* Free the interrupts */
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devm_free_irq(port->dev, TX_IRQ(port), port);
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devm_free_irq(port->dev, RX_IRQ(port), port);
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/* Disable the port */
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clps_writel(clps_readl(SYSCON(port)) & ~SYSCON_UARTEN, SYSCON(port));
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}
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static void uart_clps711x_set_termios(struct uart_port *port,
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struct ktermios *termios,
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struct ktermios *old)
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{
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unsigned int ubrlcr, baud, quot;
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unsigned long flags;
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/* Mask termios capabilities we don't support */
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termios->c_cflag &= ~CMSPAR;
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termios->c_iflag &= ~(BRKINT | IGNBRK);
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/* Ask the core to calculate the divisor for us */
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baud = uart_get_baud_rate(port, termios, old, port->uartclk / 4096,
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port->uartclk / 16);
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quot = uart_get_divisor(port, baud);
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switch (termios->c_cflag & CSIZE) {
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case CS5:
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ubrlcr = UBRLCR_WRDLEN5;
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break;
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case CS6:
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ubrlcr = UBRLCR_WRDLEN6;
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break;
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case CS7:
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ubrlcr = UBRLCR_WRDLEN7;
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break;
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case CS8:
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default:
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ubrlcr = UBRLCR_WRDLEN8;
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break;
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}
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if (termios->c_cflag & CSTOPB)
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ubrlcr |= UBRLCR_XSTOP;
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if (termios->c_cflag & PARENB) {
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ubrlcr |= UBRLCR_PRTEN;
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if (!(termios->c_cflag & PARODD))
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ubrlcr |= UBRLCR_EVENPRT;
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}
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/* Enable FIFO */
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ubrlcr |= UBRLCR_FIFOEN;
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spin_lock_irqsave(&port->lock, flags);
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/* Set read status mask */
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port->read_status_mask = UARTDR_OVERR;
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if (termios->c_iflag & INPCK)
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port->read_status_mask |= UARTDR_PARERR | UARTDR_FRMERR;
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/* Set status ignore mask */
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port->ignore_status_mask = 0;
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if (!(termios->c_cflag & CREAD))
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port->ignore_status_mask |= UARTDR_OVERR | UARTDR_PARERR |
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UARTDR_FRMERR;
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uart_update_timeout(port, termios->c_cflag, baud);
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clps_writel(ubrlcr | (quot - 1), UBRLCR(port));
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spin_unlock_irqrestore(&port->lock, flags);
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}
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static const char *uart_clps711x_type(struct uart_port *port)
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{
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return (port->type == PORT_CLPS711X) ? "CLPS711X" : NULL;
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}
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static void uart_clps711x_config_port(struct uart_port *port, int flags)
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{
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if (flags & UART_CONFIG_TYPE)
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port->type = PORT_CLPS711X;
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}
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static void uart_clps711x_release_port(struct uart_port *port)
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{
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/* Do nothing */
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}
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static int uart_clps711x_request_port(struct uart_port *port)
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{
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/* Do nothing */
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return 0;
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}
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static const struct uart_ops uart_clps711x_ops = {
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.tx_empty = uart_clps711x_tx_empty,
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.set_mctrl = uart_clps711x_set_mctrl,
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.get_mctrl = uart_clps711x_get_mctrl,
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.stop_tx = uart_clps711x_stop_tx,
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.start_tx = uart_clps711x_start_tx,
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.stop_rx = uart_clps711x_stop_rx,
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.enable_ms = uart_clps711x_enable_ms,
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.break_ctl = uart_clps711x_break_ctl,
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.startup = uart_clps711x_startup,
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.shutdown = uart_clps711x_shutdown,
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.set_termios = uart_clps711x_set_termios,
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.type = uart_clps711x_type,
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.config_port = uart_clps711x_config_port,
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.release_port = uart_clps711x_release_port,
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.request_port = uart_clps711x_request_port,
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};
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#ifdef CONFIG_SERIAL_CLPS711X_CONSOLE
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static void uart_clps711x_console_putchar(struct uart_port *port, int ch)
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{
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while (clps_readl(SYSFLG(port)) & SYSFLG_UTXFF)
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barrier();
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clps_writew(ch, UARTDR(port));
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}
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static void uart_clps711x_console_write(struct console *co, const char *c,
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unsigned n)
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{
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struct clps711x_port *s = (struct clps711x_port *)co->data;
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struct uart_port *port = &s->port[co->index];
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u32 syscon;
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/* Ensure that the port is enabled */
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syscon = clps_readl(SYSCON(port));
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clps_writel(syscon | SYSCON_UARTEN, SYSCON(port));
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uart_console_write(port, c, n, uart_clps711x_console_putchar);
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/* Wait for transmitter to become empty */
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while (clps_readl(SYSFLG(port)) & SYSFLG_UBUSY)
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barrier();
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/* Restore the uart state */
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clps_writel(syscon, SYSCON(port));
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}
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static void uart_clps711x_console_get_options(struct uart_port *port,
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int *baud, int *parity,
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int *bits)
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{
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if (clps_readl(SYSCON(port)) & SYSCON_UARTEN) {
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unsigned int ubrlcr, quot;
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ubrlcr = clps_readl(UBRLCR(port));
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*parity = 'n';
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if (ubrlcr & UBRLCR_PRTEN) {
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if (ubrlcr & UBRLCR_EVENPRT)
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*parity = 'e';
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else
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*parity = 'o';
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}
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if ((ubrlcr & UBRLCR_WRDLEN_MASK) == UBRLCR_WRDLEN7)
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*bits = 7;
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else
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*bits = 8;
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quot = ubrlcr & UBRLCR_BAUD_MASK;
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*baud = port->uartclk / (16 * (quot + 1));
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}
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}
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static int uart_clps711x_console_setup(struct console *co, char *options)
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{
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int baud = 38400, bits = 8, parity = 'n', flow = 'n';
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struct clps711x_port *s = (struct clps711x_port *)co->data;
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struct uart_port *port = &s->port[(co->index > 0) ? co->index : 0];
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if (options)
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uart_parse_options(options, &baud, &parity, &bits, &flow);
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else
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uart_clps711x_console_get_options(port, &baud, &parity, &bits);
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return uart_set_options(port, co, baud, parity, bits, flow);
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}
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#endif
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static int uart_clps711x_probe(struct platform_device *pdev)
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{
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struct clps711x_port *s;
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int ret, i;
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s = devm_kzalloc(&pdev->dev, sizeof(struct clps711x_port), GFP_KERNEL);
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if (!s) {
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dev_err(&pdev->dev, "Error allocating port structure\n");
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return -ENOMEM;
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}
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platform_set_drvdata(pdev, s);
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s->uart_clk = devm_clk_get(&pdev->dev, "uart");
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if (IS_ERR(s->uart_clk)) {
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dev_err(&pdev->dev, "Can't get UART clocks\n");
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ret = PTR_ERR(s->uart_clk);
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goto err_out;
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}
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s->uart.owner = THIS_MODULE;
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s->uart.dev_name = "ttyCL";
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s->uart.major = UART_CLPS711X_MAJOR;
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s->uart.minor = UART_CLPS711X_MINOR;
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s->uart.nr = UART_CLPS711X_NR;
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#ifdef CONFIG_SERIAL_CLPS711X_CONSOLE
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s->uart.cons = &s->console;
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s->uart.cons->device = uart_console_device;
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s->uart.cons->write = uart_clps711x_console_write;
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s->uart.cons->setup = uart_clps711x_console_setup;
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s->uart.cons->flags = CON_PRINTBUFFER;
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s->uart.cons->index = -1;
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s->uart.cons->data = s;
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strcpy(s->uart.cons->name, "ttyCL");
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#endif
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ret = uart_register_driver(&s->uart);
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if (ret) {
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dev_err(&pdev->dev, "Registering UART driver failed\n");
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devm_clk_put(&pdev->dev, s->uart_clk);
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goto err_out;
|
|
}
|
|
|
|
for (i = 0; i < UART_CLPS711X_NR; i++) {
|
|
s->port[i].line = i;
|
|
s->port[i].dev = &pdev->dev;
|
|
s->port[i].irq = TX_IRQ(&s->port[i]);
|
|
s->port[i].iobase = SYSCON(&s->port[i]);
|
|
s->port[i].type = PORT_CLPS711X;
|
|
s->port[i].fifosize = 16;
|
|
s->port[i].flags = UPF_SKIP_TEST | UPF_FIXED_TYPE;
|
|
s->port[i].uartclk = clk_get_rate(s->uart_clk);
|
|
s->port[i].ops = &uart_clps711x_ops;
|
|
WARN_ON(uart_add_one_port(&s->uart, &s->port[i]));
|
|
}
|
|
|
|
return 0;
|
|
|
|
err_out:
|
|
platform_set_drvdata(pdev, NULL);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int uart_clps711x_remove(struct platform_device *pdev)
|
|
{
|
|
struct clps711x_port *s = platform_get_drvdata(pdev);
|
|
int i;
|
|
|
|
for (i = 0; i < UART_CLPS711X_NR; i++)
|
|
uart_remove_one_port(&s->uart, &s->port[i]);
|
|
|
|
devm_clk_put(&pdev->dev, s->uart_clk);
|
|
uart_unregister_driver(&s->uart);
|
|
platform_set_drvdata(pdev, NULL);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct platform_driver clps711x_uart_driver = {
|
|
.driver = {
|
|
.name = UART_CLPS711X_NAME,
|
|
.owner = THIS_MODULE,
|
|
},
|
|
.probe = uart_clps711x_probe,
|
|
.remove = uart_clps711x_remove,
|
|
};
|
|
module_platform_driver(clps711x_uart_driver);
|
|
|
|
static struct platform_device clps711x_uart_device = {
|
|
.name = UART_CLPS711X_NAME,
|
|
};
|
|
|
|
static int __init uart_clps711x_init(void)
|
|
{
|
|
return platform_device_register(&clps711x_uart_device);
|
|
}
|
|
module_init(uart_clps711x_init);
|
|
|
|
static void __exit uart_clps711x_exit(void)
|
|
{
|
|
platform_device_unregister(&clps711x_uart_device);
|
|
}
|
|
module_exit(uart_clps711x_exit);
|
|
|
|
MODULE_AUTHOR("Deep Blue Solutions Ltd");
|
|
MODULE_DESCRIPTION("CLPS711X serial driver");
|
|
MODULE_LICENSE("GPL");
|