![Stephen Boyd](/assets/img/avatar_default.png)
We don't need dev_err() messages when platform_get_irq() fails now that platform_get_irq() prints an error message itself when something goes wrong. Let's remove these prints with a simple semantic patch. // <smpl> @@ expression ret; struct platform_device *E; @@ ret = ( platform_get_irq(E, ...) | platform_get_irq_byname(E, ...) ); if ( \( ret < 0 \| ret <= 0 \) ) { ( -if (ret != -EPROBE_DEFER) -{ ... -dev_err(...); -... } | ... -dev_err(...); ) ... } // </smpl> While we're here, remove braces on if statements that only have one statement (manually). Cc: Alessandro Zummo <a.zummo@towertech.it> Cc: Alexandre Belloni <alexandre.belloni@bootlin.com> Cc: linux-rtc@vger.kernel.org Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20190730181557.90391-40-swboyd@chromium.org Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
550 lines
13 KiB
C
550 lines
13 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* "RTT as Real Time Clock" driver for AT91SAM9 SoC family
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*
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* (C) 2007 Michel Benoit
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*
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* Based on rtc-at91rm9200.c by Rick Bronson
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*/
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#include <linux/clk.h>
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#include <linux/interrupt.h>
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#include <linux/ioctl.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/mfd/syscon.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#include <linux/rtc.h>
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#include <linux/slab.h>
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#include <linux/suspend.h>
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#include <linux/time.h>
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/*
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* This driver uses two configurable hardware resources that live in the
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* AT91SAM9 backup power domain (intended to be powered at all times)
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* to implement the Real Time Clock interfaces
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*
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* - A "Real-time Timer" (RTT) counts up in seconds from a base time.
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* We can't assign the counter value (CRTV) ... but we can reset it.
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*
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* - One of the "General Purpose Backup Registers" (GPBRs) holds the
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* base time, normally an offset from the beginning of the POSIX
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* epoch (1970-Jan-1 00:00:00 UTC). Some systems also include the
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* local timezone's offset.
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*
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* The RTC's value is the RTT counter plus that offset. The RTC's alarm
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* is likewise a base (ALMV) plus that offset.
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*
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* Not all RTTs will be used as RTCs; some systems have multiple RTTs to
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* choose from, or a "real" RTC module. All systems have multiple GPBR
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* registers available, likewise usable for more than "RTC" support.
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*/
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#define AT91_RTT_MR 0x00 /* Real-time Mode Register */
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#define AT91_RTT_RTPRES (0xffff << 0) /* Timer Prescaler Value */
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#define AT91_RTT_ALMIEN BIT(16) /* Alarm Interrupt Enable */
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#define AT91_RTT_RTTINCIEN BIT(17) /* Increment Interrupt Enable */
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#define AT91_RTT_RTTRST BIT(18) /* Timer Restart */
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#define AT91_RTT_AR 0x04 /* Real-time Alarm Register */
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#define AT91_RTT_ALMV (0xffffffff) /* Alarm Value */
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#define AT91_RTT_VR 0x08 /* Real-time Value Register */
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#define AT91_RTT_CRTV (0xffffffff) /* Current Real-time Value */
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#define AT91_RTT_SR 0x0c /* Real-time Status Register */
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#define AT91_RTT_ALMS BIT(0) /* Alarm Status */
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#define AT91_RTT_RTTINC BIT(1) /* Timer Increment */
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/*
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* We store ALARM_DISABLED in ALMV to record that no alarm is set.
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* It's also the reset value for that field.
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*/
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#define ALARM_DISABLED ((u32)~0)
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struct sam9_rtc {
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void __iomem *rtt;
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struct rtc_device *rtcdev;
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u32 imr;
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struct regmap *gpbr;
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unsigned int gpbr_offset;
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int irq;
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struct clk *sclk;
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bool suspended;
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unsigned long events;
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spinlock_t lock;
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};
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#define rtt_readl(rtc, field) \
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readl((rtc)->rtt + AT91_RTT_ ## field)
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#define rtt_writel(rtc, field, val) \
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writel((val), (rtc)->rtt + AT91_RTT_ ## field)
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static inline unsigned int gpbr_readl(struct sam9_rtc *rtc)
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{
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unsigned int val;
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regmap_read(rtc->gpbr, rtc->gpbr_offset, &val);
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return val;
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}
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static inline void gpbr_writel(struct sam9_rtc *rtc, unsigned int val)
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{
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regmap_write(rtc->gpbr, rtc->gpbr_offset, val);
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}
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/*
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* Read current time and date in RTC
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*/
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static int at91_rtc_readtime(struct device *dev, struct rtc_time *tm)
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{
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struct sam9_rtc *rtc = dev_get_drvdata(dev);
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u32 secs, secs2;
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u32 offset;
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/* read current time offset */
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offset = gpbr_readl(rtc);
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if (offset == 0)
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return -EILSEQ;
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/* reread the counter to help sync the two clock domains */
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secs = rtt_readl(rtc, VR);
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secs2 = rtt_readl(rtc, VR);
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if (secs != secs2)
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secs = rtt_readl(rtc, VR);
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rtc_time64_to_tm(offset + secs, tm);
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dev_dbg(dev, "%s: %ptR\n", __func__, tm);
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return 0;
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}
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/*
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* Set current time and date in RTC
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*/
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static int at91_rtc_settime(struct device *dev, struct rtc_time *tm)
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{
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struct sam9_rtc *rtc = dev_get_drvdata(dev);
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u32 offset, alarm, mr;
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unsigned long secs;
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dev_dbg(dev, "%s: %ptR\n", __func__, tm);
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secs = rtc_tm_to_time64(tm);
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mr = rtt_readl(rtc, MR);
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/* disable interrupts */
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rtt_writel(rtc, MR, mr & ~(AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN));
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/* read current time offset */
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offset = gpbr_readl(rtc);
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/* store the new base time in a battery backup register */
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secs += 1;
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gpbr_writel(rtc, secs);
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/* adjust the alarm time for the new base */
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alarm = rtt_readl(rtc, AR);
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if (alarm != ALARM_DISABLED) {
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if (offset > secs) {
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/* time jumped backwards, increase time until alarm */
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alarm += (offset - secs);
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} else if ((alarm + offset) > secs) {
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/* time jumped forwards, decrease time until alarm */
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alarm -= (secs - offset);
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} else {
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/* time jumped past the alarm, disable alarm */
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alarm = ALARM_DISABLED;
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mr &= ~AT91_RTT_ALMIEN;
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}
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rtt_writel(rtc, AR, alarm);
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}
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/* reset the timer, and re-enable interrupts */
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rtt_writel(rtc, MR, mr | AT91_RTT_RTTRST);
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return 0;
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}
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static int at91_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm)
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{
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struct sam9_rtc *rtc = dev_get_drvdata(dev);
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struct rtc_time *tm = &alrm->time;
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u32 alarm = rtt_readl(rtc, AR);
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u32 offset;
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offset = gpbr_readl(rtc);
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if (offset == 0)
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return -EILSEQ;
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memset(alrm, 0, sizeof(*alrm));
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if (alarm != ALARM_DISABLED && offset != 0) {
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rtc_time64_to_tm(offset + alarm, tm);
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dev_dbg(dev, "%s: %ptR\n", __func__, tm);
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if (rtt_readl(rtc, MR) & AT91_RTT_ALMIEN)
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alrm->enabled = 1;
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}
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return 0;
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}
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static int at91_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
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{
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struct sam9_rtc *rtc = dev_get_drvdata(dev);
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struct rtc_time *tm = &alrm->time;
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unsigned long secs;
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u32 offset;
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u32 mr;
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secs = rtc_tm_to_time64(tm);
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offset = gpbr_readl(rtc);
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if (offset == 0) {
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/* time is not set */
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return -EILSEQ;
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}
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mr = rtt_readl(rtc, MR);
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rtt_writel(rtc, MR, mr & ~AT91_RTT_ALMIEN);
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/* alarm in the past? finish and leave disabled */
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if (secs <= offset) {
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rtt_writel(rtc, AR, ALARM_DISABLED);
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return 0;
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}
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/* else set alarm and maybe enable it */
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rtt_writel(rtc, AR, secs - offset);
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if (alrm->enabled)
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rtt_writel(rtc, MR, mr | AT91_RTT_ALMIEN);
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dev_dbg(dev, "%s: %ptR\n", __func__, tm);
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return 0;
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}
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static int at91_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
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{
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struct sam9_rtc *rtc = dev_get_drvdata(dev);
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u32 mr = rtt_readl(rtc, MR);
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dev_dbg(dev, "alarm_irq_enable: enabled=%08x, mr %08x\n", enabled, mr);
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if (enabled)
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rtt_writel(rtc, MR, mr | AT91_RTT_ALMIEN);
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else
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rtt_writel(rtc, MR, mr & ~AT91_RTT_ALMIEN);
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return 0;
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}
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/*
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* Provide additional RTC information in /proc/driver/rtc
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*/
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static int at91_rtc_proc(struct device *dev, struct seq_file *seq)
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{
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struct sam9_rtc *rtc = dev_get_drvdata(dev);
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u32 mr = rtt_readl(rtc, MR);
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seq_printf(seq, "update_IRQ\t: %s\n",
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(mr & AT91_RTT_RTTINCIEN) ? "yes" : "no");
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return 0;
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}
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static irqreturn_t at91_rtc_cache_events(struct sam9_rtc *rtc)
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{
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u32 sr, mr;
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/* Shared interrupt may be for another device. Note: reading
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* SR clears it, so we must only read it in this irq handler!
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*/
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mr = rtt_readl(rtc, MR) & (AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN);
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sr = rtt_readl(rtc, SR) & (mr >> 16);
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if (!sr)
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return IRQ_NONE;
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/* alarm status */
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if (sr & AT91_RTT_ALMS)
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rtc->events |= (RTC_AF | RTC_IRQF);
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/* timer update/increment */
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if (sr & AT91_RTT_RTTINC)
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rtc->events |= (RTC_UF | RTC_IRQF);
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return IRQ_HANDLED;
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}
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static void at91_rtc_flush_events(struct sam9_rtc *rtc)
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{
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if (!rtc->events)
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return;
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rtc_update_irq(rtc->rtcdev, 1, rtc->events);
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rtc->events = 0;
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pr_debug("%s: num=%ld, events=0x%02lx\n", __func__,
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rtc->events >> 8, rtc->events & 0x000000FF);
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}
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/*
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* IRQ handler for the RTC
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*/
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static irqreturn_t at91_rtc_interrupt(int irq, void *_rtc)
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{
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struct sam9_rtc *rtc = _rtc;
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int ret;
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spin_lock(&rtc->lock);
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ret = at91_rtc_cache_events(rtc);
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/* We're called in suspended state */
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if (rtc->suspended) {
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/* Mask irqs coming from this peripheral */
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rtt_writel(rtc, MR,
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rtt_readl(rtc, MR) &
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~(AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN));
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/* Trigger a system wakeup */
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pm_system_wakeup();
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} else {
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at91_rtc_flush_events(rtc);
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}
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spin_unlock(&rtc->lock);
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return ret;
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}
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static const struct rtc_class_ops at91_rtc_ops = {
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.read_time = at91_rtc_readtime,
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.set_time = at91_rtc_settime,
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.read_alarm = at91_rtc_readalarm,
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.set_alarm = at91_rtc_setalarm,
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.proc = at91_rtc_proc,
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.alarm_irq_enable = at91_rtc_alarm_irq_enable,
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};
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/*
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* Initialize and install RTC driver
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*/
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static int at91_rtc_probe(struct platform_device *pdev)
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{
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struct resource *r;
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struct sam9_rtc *rtc;
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int ret, irq;
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u32 mr;
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unsigned int sclk_rate;
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struct of_phandle_args args;
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irq = platform_get_irq(pdev, 0);
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if (irq < 0)
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return irq;
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rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
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if (!rtc)
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return -ENOMEM;
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spin_lock_init(&rtc->lock);
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rtc->irq = irq;
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/* platform setup code should have handled this; sigh */
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if (!device_can_wakeup(&pdev->dev))
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device_init_wakeup(&pdev->dev, 1);
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platform_set_drvdata(pdev, rtc);
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r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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rtc->rtt = devm_ioremap_resource(&pdev->dev, r);
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if (IS_ERR(rtc->rtt))
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return PTR_ERR(rtc->rtt);
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ret = of_parse_phandle_with_fixed_args(pdev->dev.of_node,
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"atmel,rtt-rtc-time-reg", 1, 0,
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&args);
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if (ret)
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return ret;
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rtc->gpbr = syscon_node_to_regmap(args.np);
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rtc->gpbr_offset = args.args[0];
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if (IS_ERR(rtc->gpbr)) {
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dev_err(&pdev->dev, "failed to retrieve gpbr regmap, aborting.\n");
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return -ENOMEM;
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}
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rtc->sclk = devm_clk_get(&pdev->dev, NULL);
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if (IS_ERR(rtc->sclk))
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return PTR_ERR(rtc->sclk);
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ret = clk_prepare_enable(rtc->sclk);
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if (ret) {
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dev_err(&pdev->dev, "Could not enable slow clock\n");
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return ret;
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}
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sclk_rate = clk_get_rate(rtc->sclk);
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if (!sclk_rate || sclk_rate > AT91_RTT_RTPRES) {
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dev_err(&pdev->dev, "Invalid slow clock rate\n");
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ret = -EINVAL;
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goto err_clk;
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}
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mr = rtt_readl(rtc, MR);
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/* unless RTT is counting at 1 Hz, re-initialize it */
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if ((mr & AT91_RTT_RTPRES) != sclk_rate) {
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mr = AT91_RTT_RTTRST | (sclk_rate & AT91_RTT_RTPRES);
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gpbr_writel(rtc, 0);
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}
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/* disable all interrupts (same as on shutdown path) */
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mr &= ~(AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN);
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rtt_writel(rtc, MR, mr);
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rtc->rtcdev = devm_rtc_allocate_device(&pdev->dev);
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if (IS_ERR(rtc->rtcdev)) {
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ret = PTR_ERR(rtc->rtcdev);
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goto err_clk;
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}
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rtc->rtcdev->ops = &at91_rtc_ops;
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rtc->rtcdev->range_max = U32_MAX;
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/* register irq handler after we know what name we'll use */
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ret = devm_request_irq(&pdev->dev, rtc->irq, at91_rtc_interrupt,
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IRQF_SHARED | IRQF_COND_SUSPEND,
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dev_name(&rtc->rtcdev->dev), rtc);
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if (ret) {
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dev_dbg(&pdev->dev, "can't share IRQ %d?\n", rtc->irq);
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goto err_clk;
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}
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/* NOTE: sam9260 rev A silicon has a ROM bug which resets the
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* RTT on at least some reboots. If you have that chip, you must
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* initialize the time from some external source like a GPS, wall
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* clock, discrete RTC, etc
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*/
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if (gpbr_readl(rtc) == 0)
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dev_warn(&pdev->dev, "%s: SET TIME!\n",
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dev_name(&rtc->rtcdev->dev));
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return rtc_register_device(rtc->rtcdev);
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err_clk:
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clk_disable_unprepare(rtc->sclk);
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return ret;
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}
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/*
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* Disable and remove the RTC driver
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*/
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static int at91_rtc_remove(struct platform_device *pdev)
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{
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struct sam9_rtc *rtc = platform_get_drvdata(pdev);
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u32 mr = rtt_readl(rtc, MR);
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/* disable all interrupts */
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rtt_writel(rtc, MR, mr & ~(AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN));
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clk_disable_unprepare(rtc->sclk);
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return 0;
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}
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static void at91_rtc_shutdown(struct platform_device *pdev)
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{
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struct sam9_rtc *rtc = platform_get_drvdata(pdev);
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u32 mr = rtt_readl(rtc, MR);
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rtc->imr = mr & (AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN);
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rtt_writel(rtc, MR, mr & ~rtc->imr);
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}
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#ifdef CONFIG_PM_SLEEP
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/* AT91SAM9 RTC Power management control */
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static int at91_rtc_suspend(struct device *dev)
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{
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struct sam9_rtc *rtc = dev_get_drvdata(dev);
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u32 mr = rtt_readl(rtc, MR);
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/*
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* This IRQ is shared with DBGU and other hardware which isn't
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* necessarily a wakeup event source.
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*/
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rtc->imr = mr & (AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN);
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if (rtc->imr) {
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if (device_may_wakeup(dev) && (mr & AT91_RTT_ALMIEN)) {
|
|
unsigned long flags;
|
|
|
|
enable_irq_wake(rtc->irq);
|
|
spin_lock_irqsave(&rtc->lock, flags);
|
|
rtc->suspended = true;
|
|
spin_unlock_irqrestore(&rtc->lock, flags);
|
|
/* don't let RTTINC cause wakeups */
|
|
if (mr & AT91_RTT_RTTINCIEN)
|
|
rtt_writel(rtc, MR, mr & ~AT91_RTT_RTTINCIEN);
|
|
} else {
|
|
rtt_writel(rtc, MR, mr & ~rtc->imr);
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int at91_rtc_resume(struct device *dev)
|
|
{
|
|
struct sam9_rtc *rtc = dev_get_drvdata(dev);
|
|
u32 mr;
|
|
|
|
if (rtc->imr) {
|
|
unsigned long flags;
|
|
|
|
if (device_may_wakeup(dev))
|
|
disable_irq_wake(rtc->irq);
|
|
mr = rtt_readl(rtc, MR);
|
|
rtt_writel(rtc, MR, mr | rtc->imr);
|
|
|
|
spin_lock_irqsave(&rtc->lock, flags);
|
|
rtc->suspended = false;
|
|
at91_rtc_cache_events(rtc);
|
|
at91_rtc_flush_events(rtc);
|
|
spin_unlock_irqrestore(&rtc->lock, flags);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
static SIMPLE_DEV_PM_OPS(at91_rtc_pm_ops, at91_rtc_suspend, at91_rtc_resume);
|
|
|
|
static const struct of_device_id at91_rtc_dt_ids[] = {
|
|
{ .compatible = "atmel,at91sam9260-rtt" },
|
|
{ /* sentinel */ }
|
|
};
|
|
MODULE_DEVICE_TABLE(of, at91_rtc_dt_ids);
|
|
|
|
static struct platform_driver at91_rtc_driver = {
|
|
.probe = at91_rtc_probe,
|
|
.remove = at91_rtc_remove,
|
|
.shutdown = at91_rtc_shutdown,
|
|
.driver = {
|
|
.name = "rtc-at91sam9",
|
|
.pm = &at91_rtc_pm_ops,
|
|
.of_match_table = of_match_ptr(at91_rtc_dt_ids),
|
|
},
|
|
};
|
|
|
|
module_platform_driver(at91_rtc_driver);
|
|
|
|
MODULE_AUTHOR("Michel Benoit");
|
|
MODULE_DESCRIPTION("RTC driver for Atmel AT91SAM9x");
|
|
MODULE_LICENSE("GPL");
|