![Alexandre Belloni](/assets/img/avatar_default.png)
The RTC core now has error messages in case of registration failure, there is no need to have other messages in the drivers. Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Link: https://lore.kernel.org/r/20190818220041.17833-2-alexandre.belloni@bootlin.com Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
411 lines
9.4 KiB
C
411 lines
9.4 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2014-2015 MediaTek Inc.
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* Author: Tianping.Fang <tianping.fang@mediatek.com>
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*/
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/regmap.h>
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#include <linux/rtc.h>
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#include <linux/irqdomain.h>
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#include <linux/platform_device.h>
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#include <linux/io.h>
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#include <linux/mfd/mt6397/core.h>
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#define RTC_BBPU 0x0000
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#define RTC_BBPU_CBUSY BIT(6)
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#define RTC_WRTGR 0x003c
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#define RTC_IRQ_STA 0x0002
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#define RTC_IRQ_STA_AL BIT(0)
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#define RTC_IRQ_STA_LP BIT(3)
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#define RTC_IRQ_EN 0x0004
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#define RTC_IRQ_EN_AL BIT(0)
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#define RTC_IRQ_EN_ONESHOT BIT(2)
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#define RTC_IRQ_EN_LP BIT(3)
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#define RTC_IRQ_EN_ONESHOT_AL (RTC_IRQ_EN_ONESHOT | RTC_IRQ_EN_AL)
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#define RTC_AL_MASK 0x0008
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#define RTC_AL_MASK_DOW BIT(4)
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#define RTC_TC_SEC 0x000a
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/* Min, Hour, Dom... register offset to RTC_TC_SEC */
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#define RTC_OFFSET_SEC 0
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#define RTC_OFFSET_MIN 1
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#define RTC_OFFSET_HOUR 2
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#define RTC_OFFSET_DOM 3
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#define RTC_OFFSET_DOW 4
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#define RTC_OFFSET_MTH 5
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#define RTC_OFFSET_YEAR 6
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#define RTC_OFFSET_COUNT 7
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#define RTC_AL_SEC 0x0018
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#define RTC_PDN2 0x002e
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#define RTC_PDN2_PWRON_ALARM BIT(4)
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#define RTC_MIN_YEAR 1968
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#define RTC_BASE_YEAR 1900
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#define RTC_NUM_YEARS 128
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#define RTC_MIN_YEAR_OFFSET (RTC_MIN_YEAR - RTC_BASE_YEAR)
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struct mt6397_rtc {
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struct device *dev;
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struct rtc_device *rtc_dev;
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struct mutex lock;
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struct regmap *regmap;
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int irq;
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u32 addr_base;
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};
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static int mtk_rtc_write_trigger(struct mt6397_rtc *rtc)
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{
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unsigned long timeout = jiffies + HZ;
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int ret;
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u32 data;
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ret = regmap_write(rtc->regmap, rtc->addr_base + RTC_WRTGR, 1);
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if (ret < 0)
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return ret;
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while (1) {
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ret = regmap_read(rtc->regmap, rtc->addr_base + RTC_BBPU,
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&data);
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if (ret < 0)
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break;
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if (!(data & RTC_BBPU_CBUSY))
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break;
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if (time_after(jiffies, timeout)) {
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ret = -ETIMEDOUT;
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break;
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}
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cpu_relax();
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}
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return ret;
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}
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static irqreturn_t mtk_rtc_irq_handler_thread(int irq, void *data)
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{
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struct mt6397_rtc *rtc = data;
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u32 irqsta, irqen;
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int ret;
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ret = regmap_read(rtc->regmap, rtc->addr_base + RTC_IRQ_STA, &irqsta);
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if ((ret >= 0) && (irqsta & RTC_IRQ_STA_AL)) {
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rtc_update_irq(rtc->rtc_dev, 1, RTC_IRQF | RTC_AF);
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irqen = irqsta & ~RTC_IRQ_EN_AL;
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mutex_lock(&rtc->lock);
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if (regmap_write(rtc->regmap, rtc->addr_base + RTC_IRQ_EN,
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irqen) < 0)
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mtk_rtc_write_trigger(rtc);
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mutex_unlock(&rtc->lock);
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return IRQ_HANDLED;
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}
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return IRQ_NONE;
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}
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static int __mtk_rtc_read_time(struct mt6397_rtc *rtc,
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struct rtc_time *tm, int *sec)
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{
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int ret;
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u16 data[RTC_OFFSET_COUNT];
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mutex_lock(&rtc->lock);
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ret = regmap_bulk_read(rtc->regmap, rtc->addr_base + RTC_TC_SEC,
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data, RTC_OFFSET_COUNT);
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if (ret < 0)
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goto exit;
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tm->tm_sec = data[RTC_OFFSET_SEC];
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tm->tm_min = data[RTC_OFFSET_MIN];
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tm->tm_hour = data[RTC_OFFSET_HOUR];
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tm->tm_mday = data[RTC_OFFSET_DOM];
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tm->tm_mon = data[RTC_OFFSET_MTH];
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tm->tm_year = data[RTC_OFFSET_YEAR];
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ret = regmap_read(rtc->regmap, rtc->addr_base + RTC_TC_SEC, sec);
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exit:
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mutex_unlock(&rtc->lock);
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return ret;
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}
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static int mtk_rtc_read_time(struct device *dev, struct rtc_time *tm)
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{
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time64_t time;
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struct mt6397_rtc *rtc = dev_get_drvdata(dev);
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int days, sec, ret;
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do {
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ret = __mtk_rtc_read_time(rtc, tm, &sec);
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if (ret < 0)
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goto exit;
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} while (sec < tm->tm_sec);
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/* HW register use 7 bits to store year data, minus
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* RTC_MIN_YEAR_OFFSET before write year data to register, and plus
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* RTC_MIN_YEAR_OFFSET back after read year from register
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*/
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tm->tm_year += RTC_MIN_YEAR_OFFSET;
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/* HW register start mon from one, but tm_mon start from zero. */
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tm->tm_mon--;
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time = rtc_tm_to_time64(tm);
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/* rtc_tm_to_time64 covert Gregorian date to seconds since
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* 01-01-1970 00:00:00, and this date is Thursday.
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*/
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days = div_s64(time, 86400);
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tm->tm_wday = (days + 4) % 7;
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exit:
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return ret;
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}
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static int mtk_rtc_set_time(struct device *dev, struct rtc_time *tm)
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{
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struct mt6397_rtc *rtc = dev_get_drvdata(dev);
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int ret;
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u16 data[RTC_OFFSET_COUNT];
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tm->tm_year -= RTC_MIN_YEAR_OFFSET;
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tm->tm_mon++;
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data[RTC_OFFSET_SEC] = tm->tm_sec;
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data[RTC_OFFSET_MIN] = tm->tm_min;
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data[RTC_OFFSET_HOUR] = tm->tm_hour;
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data[RTC_OFFSET_DOM] = tm->tm_mday;
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data[RTC_OFFSET_MTH] = tm->tm_mon;
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data[RTC_OFFSET_YEAR] = tm->tm_year;
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mutex_lock(&rtc->lock);
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ret = regmap_bulk_write(rtc->regmap, rtc->addr_base + RTC_TC_SEC,
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data, RTC_OFFSET_COUNT);
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if (ret < 0)
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goto exit;
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/* Time register write to hardware after call trigger function */
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ret = mtk_rtc_write_trigger(rtc);
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exit:
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mutex_unlock(&rtc->lock);
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return ret;
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}
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static int mtk_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
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{
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struct rtc_time *tm = &alm->time;
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struct mt6397_rtc *rtc = dev_get_drvdata(dev);
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u32 irqen, pdn2;
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int ret;
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u16 data[RTC_OFFSET_COUNT];
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mutex_lock(&rtc->lock);
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ret = regmap_read(rtc->regmap, rtc->addr_base + RTC_IRQ_EN, &irqen);
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if (ret < 0)
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goto err_exit;
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ret = regmap_read(rtc->regmap, rtc->addr_base + RTC_PDN2, &pdn2);
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if (ret < 0)
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goto err_exit;
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ret = regmap_bulk_read(rtc->regmap, rtc->addr_base + RTC_AL_SEC,
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data, RTC_OFFSET_COUNT);
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if (ret < 0)
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goto err_exit;
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alm->enabled = !!(irqen & RTC_IRQ_EN_AL);
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alm->pending = !!(pdn2 & RTC_PDN2_PWRON_ALARM);
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mutex_unlock(&rtc->lock);
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tm->tm_sec = data[RTC_OFFSET_SEC];
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tm->tm_min = data[RTC_OFFSET_MIN];
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tm->tm_hour = data[RTC_OFFSET_HOUR];
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tm->tm_mday = data[RTC_OFFSET_DOM];
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tm->tm_mon = data[RTC_OFFSET_MTH];
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tm->tm_year = data[RTC_OFFSET_YEAR];
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tm->tm_year += RTC_MIN_YEAR_OFFSET;
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tm->tm_mon--;
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return 0;
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err_exit:
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mutex_unlock(&rtc->lock);
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return ret;
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}
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static int mtk_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
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{
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struct rtc_time *tm = &alm->time;
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struct mt6397_rtc *rtc = dev_get_drvdata(dev);
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int ret;
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u16 data[RTC_OFFSET_COUNT];
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tm->tm_year -= RTC_MIN_YEAR_OFFSET;
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tm->tm_mon++;
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data[RTC_OFFSET_SEC] = tm->tm_sec;
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data[RTC_OFFSET_MIN] = tm->tm_min;
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data[RTC_OFFSET_HOUR] = tm->tm_hour;
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data[RTC_OFFSET_DOM] = tm->tm_mday;
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data[RTC_OFFSET_MTH] = tm->tm_mon;
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data[RTC_OFFSET_YEAR] = tm->tm_year;
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mutex_lock(&rtc->lock);
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if (alm->enabled) {
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ret = regmap_bulk_write(rtc->regmap,
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rtc->addr_base + RTC_AL_SEC,
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data, RTC_OFFSET_COUNT);
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if (ret < 0)
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goto exit;
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ret = regmap_write(rtc->regmap, rtc->addr_base + RTC_AL_MASK,
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RTC_AL_MASK_DOW);
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if (ret < 0)
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goto exit;
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ret = regmap_update_bits(rtc->regmap,
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rtc->addr_base + RTC_IRQ_EN,
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RTC_IRQ_EN_ONESHOT_AL,
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RTC_IRQ_EN_ONESHOT_AL);
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if (ret < 0)
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goto exit;
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} else {
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ret = regmap_update_bits(rtc->regmap,
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rtc->addr_base + RTC_IRQ_EN,
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RTC_IRQ_EN_ONESHOT_AL, 0);
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if (ret < 0)
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goto exit;
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}
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/* All alarm time register write to hardware after calling
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* mtk_rtc_write_trigger. This can avoid race condition if alarm
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* occur happen during writing alarm time register.
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*/
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ret = mtk_rtc_write_trigger(rtc);
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exit:
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mutex_unlock(&rtc->lock);
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return ret;
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}
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static const struct rtc_class_ops mtk_rtc_ops = {
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.read_time = mtk_rtc_read_time,
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.set_time = mtk_rtc_set_time,
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.read_alarm = mtk_rtc_read_alarm,
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.set_alarm = mtk_rtc_set_alarm,
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};
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static int mtk_rtc_probe(struct platform_device *pdev)
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{
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struct resource *res;
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struct mt6397_chip *mt6397_chip = dev_get_drvdata(pdev->dev.parent);
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struct mt6397_rtc *rtc;
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int ret;
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rtc = devm_kzalloc(&pdev->dev, sizeof(struct mt6397_rtc), GFP_KERNEL);
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if (!rtc)
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return -ENOMEM;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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rtc->addr_base = res->start;
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rtc->irq = platform_get_irq(pdev, 0);
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if (rtc->irq < 0)
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return rtc->irq;
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rtc->regmap = mt6397_chip->regmap;
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rtc->dev = &pdev->dev;
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mutex_init(&rtc->lock);
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platform_set_drvdata(pdev, rtc);
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rtc->rtc_dev = devm_rtc_allocate_device(rtc->dev);
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if (IS_ERR(rtc->rtc_dev))
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return PTR_ERR(rtc->rtc_dev);
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ret = request_threaded_irq(rtc->irq, NULL,
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mtk_rtc_irq_handler_thread,
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IRQF_ONESHOT | IRQF_TRIGGER_HIGH,
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"mt6397-rtc", rtc);
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if (ret) {
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dev_err(&pdev->dev, "Failed to request alarm IRQ: %d: %d\n",
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rtc->irq, ret);
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return ret;
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}
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device_init_wakeup(&pdev->dev, 1);
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rtc->rtc_dev->ops = &mtk_rtc_ops;
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ret = rtc_register_device(rtc->rtc_dev);
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if (ret)
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goto out_free_irq;
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return 0;
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out_free_irq:
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free_irq(rtc->irq, rtc);
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return ret;
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}
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static int mtk_rtc_remove(struct platform_device *pdev)
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{
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struct mt6397_rtc *rtc = platform_get_drvdata(pdev);
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free_irq(rtc->irq, rtc);
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return 0;
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}
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#ifdef CONFIG_PM_SLEEP
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static int mt6397_rtc_suspend(struct device *dev)
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{
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struct mt6397_rtc *rtc = dev_get_drvdata(dev);
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if (device_may_wakeup(dev))
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enable_irq_wake(rtc->irq);
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return 0;
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}
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static int mt6397_rtc_resume(struct device *dev)
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{
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struct mt6397_rtc *rtc = dev_get_drvdata(dev);
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if (device_may_wakeup(dev))
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disable_irq_wake(rtc->irq);
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return 0;
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}
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#endif
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static SIMPLE_DEV_PM_OPS(mt6397_pm_ops, mt6397_rtc_suspend,
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mt6397_rtc_resume);
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static const struct of_device_id mt6397_rtc_of_match[] = {
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{ .compatible = "mediatek,mt6397-rtc", },
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{ }
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};
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MODULE_DEVICE_TABLE(of, mt6397_rtc_of_match);
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static struct platform_driver mtk_rtc_driver = {
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.driver = {
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.name = "mt6397-rtc",
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.of_match_table = mt6397_rtc_of_match,
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.pm = &mt6397_pm_ops,
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},
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.probe = mtk_rtc_probe,
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.remove = mtk_rtc_remove,
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};
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module_platform_driver(mtk_rtc_driver);
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MODULE_LICENSE("GPL v2");
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MODULE_AUTHOR("Tianping Fang <tianping.fang@mediatek.com>");
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MODULE_DESCRIPTION("RTC Driver for MediaTek MT6397 PMIC");
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